1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Heiko Carstens <heiko.carstens@de.ibm.com>, 9 * 10 * based on other smp stuff by 11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 12 * (c) 1998 Ingo Molnar 13 * 14 * The code outside of smp.c uses logical cpu numbers, only smp.c does 15 * the translation of logical to physical cpu ids. All new code that 16 * operates on physical cpu numbers needs to go into smp.c. 17 */ 18 19 #define KMSG_COMPONENT "cpu" 20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 21 22 #include <linux/workqueue.h> 23 #include <linux/bootmem.h> 24 #include <linux/export.h> 25 #include <linux/init.h> 26 #include <linux/mm.h> 27 #include <linux/err.h> 28 #include <linux/spinlock.h> 29 #include <linux/kernel_stat.h> 30 #include <linux/kmemleak.h> 31 #include <linux/delay.h> 32 #include <linux/interrupt.h> 33 #include <linux/irqflags.h> 34 #include <linux/cpu.h> 35 #include <linux/slab.h> 36 #include <linux/sched/hotplug.h> 37 #include <linux/sched/task_stack.h> 38 #include <linux/crash_dump.h> 39 #include <linux/memblock.h> 40 #include <linux/kprobes.h> 41 #include <asm/asm-offsets.h> 42 #include <asm/diag.h> 43 #include <asm/switch_to.h> 44 #include <asm/facility.h> 45 #include <asm/ipl.h> 46 #include <asm/setup.h> 47 #include <asm/irq.h> 48 #include <asm/tlbflush.h> 49 #include <asm/vtimer.h> 50 #include <asm/lowcore.h> 51 #include <asm/sclp.h> 52 #include <asm/vdso.h> 53 #include <asm/debug.h> 54 #include <asm/os_info.h> 55 #include <asm/sigp.h> 56 #include <asm/idle.h> 57 #include <asm/nmi.h> 58 #include <asm/topology.h> 59 #include "entry.h" 60 61 enum { 62 ec_schedule = 0, 63 ec_call_function_single, 64 ec_stop_cpu, 65 }; 66 67 enum { 68 CPU_STATE_STANDBY, 69 CPU_STATE_CONFIGURED, 70 }; 71 72 static DEFINE_PER_CPU(struct cpu *, cpu_device); 73 74 struct pcpu { 75 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 76 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 77 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 78 signed char state; /* physical cpu state */ 79 signed char polarization; /* physical polarization */ 80 u16 address; /* physical cpu address */ 81 }; 82 83 static u8 boot_core_type; 84 static struct pcpu pcpu_devices[NR_CPUS]; 85 86 unsigned int smp_cpu_mt_shift; 87 EXPORT_SYMBOL(smp_cpu_mt_shift); 88 89 unsigned int smp_cpu_mtid; 90 EXPORT_SYMBOL(smp_cpu_mtid); 91 92 #ifdef CONFIG_CRASH_DUMP 93 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 94 #endif 95 96 static unsigned int smp_max_threads __initdata = -1U; 97 98 static int __init early_nosmt(char *s) 99 { 100 smp_max_threads = 1; 101 return 0; 102 } 103 early_param("nosmt", early_nosmt); 104 105 static int __init early_smt(char *s) 106 { 107 get_option(&s, &smp_max_threads); 108 return 0; 109 } 110 early_param("smt", early_smt); 111 112 /* 113 * The smp_cpu_state_mutex must be held when changing the state or polarization 114 * member of a pcpu data structure within the pcpu_devices arreay. 115 */ 116 DEFINE_MUTEX(smp_cpu_state_mutex); 117 118 /* 119 * Signal processor helper functions. 120 */ 121 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 122 { 123 int cc; 124 125 while (1) { 126 cc = __pcpu_sigp(addr, order, parm, NULL); 127 if (cc != SIGP_CC_BUSY) 128 return cc; 129 cpu_relax(); 130 } 131 } 132 133 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 134 { 135 int cc, retry; 136 137 for (retry = 0; ; retry++) { 138 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 139 if (cc != SIGP_CC_BUSY) 140 break; 141 if (retry >= 3) 142 udelay(10); 143 } 144 return cc; 145 } 146 147 static inline int pcpu_stopped(struct pcpu *pcpu) 148 { 149 u32 uninitialized_var(status); 150 151 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 152 0, &status) != SIGP_CC_STATUS_STORED) 153 return 0; 154 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 155 } 156 157 static inline int pcpu_running(struct pcpu *pcpu) 158 { 159 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 160 0, NULL) != SIGP_CC_STATUS_STORED) 161 return 1; 162 /* Status stored condition code is equivalent to cpu not running. */ 163 return 0; 164 } 165 166 /* 167 * Find struct pcpu by cpu address. 168 */ 169 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 170 { 171 int cpu; 172 173 for_each_cpu(cpu, mask) 174 if (pcpu_devices[cpu].address == address) 175 return pcpu_devices + cpu; 176 return NULL; 177 } 178 179 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 180 { 181 int order; 182 183 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 184 return; 185 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 186 pcpu->ec_clk = get_tod_clock_fast(); 187 pcpu_sigp_retry(pcpu, order, 0); 188 } 189 190 #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 191 #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 192 193 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 194 { 195 unsigned long async_stack, panic_stack; 196 struct lowcore *lc; 197 198 if (pcpu != &pcpu_devices[0]) { 199 pcpu->lowcore = (struct lowcore *) 200 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 201 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); 202 panic_stack = __get_free_page(GFP_KERNEL); 203 if (!pcpu->lowcore || !panic_stack || !async_stack) 204 goto out; 205 } else { 206 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET; 207 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET; 208 } 209 lc = pcpu->lowcore; 210 memcpy(lc, &S390_lowcore, 512); 211 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 212 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET; 213 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET; 214 lc->cpu_nr = cpu; 215 lc->spinlock_lockval = arch_spin_lockval(cpu); 216 lc->spinlock_index = 0; 217 if (nmi_alloc_per_cpu(lc)) 218 goto out; 219 if (vdso_alloc_per_cpu(lc)) 220 goto out_mcesa; 221 lowcore_ptr[cpu] = lc; 222 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 223 return 0; 224 225 out_mcesa: 226 nmi_free_per_cpu(lc); 227 out: 228 if (pcpu != &pcpu_devices[0]) { 229 free_page(panic_stack); 230 free_pages(async_stack, ASYNC_ORDER); 231 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 232 } 233 return -ENOMEM; 234 } 235 236 #ifdef CONFIG_HOTPLUG_CPU 237 238 static void pcpu_free_lowcore(struct pcpu *pcpu) 239 { 240 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 241 lowcore_ptr[pcpu - pcpu_devices] = NULL; 242 vdso_free_per_cpu(pcpu->lowcore); 243 nmi_free_per_cpu(pcpu->lowcore); 244 if (pcpu == &pcpu_devices[0]) 245 return; 246 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET); 247 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER); 248 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 249 } 250 251 #endif /* CONFIG_HOTPLUG_CPU */ 252 253 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 254 { 255 struct lowcore *lc = pcpu->lowcore; 256 257 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 258 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 259 lc->cpu_nr = cpu; 260 lc->spinlock_lockval = arch_spin_lockval(cpu); 261 lc->spinlock_index = 0; 262 lc->percpu_offset = __per_cpu_offset[cpu]; 263 lc->kernel_asce = S390_lowcore.kernel_asce; 264 lc->machine_flags = S390_lowcore.machine_flags; 265 lc->user_timer = lc->system_timer = lc->steal_timer = 0; 266 __ctl_store(lc->cregs_save_area, 0, 15); 267 save_access_regs((unsigned int *) lc->access_regs_save_area); 268 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 269 MAX_FACILITY_BIT/8); 270 arch_spin_lock_setup(cpu); 271 } 272 273 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 274 { 275 struct lowcore *lc = pcpu->lowcore; 276 277 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 278 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 279 lc->current_task = (unsigned long) tsk; 280 lc->lpp = LPP_MAGIC; 281 lc->current_pid = tsk->pid; 282 lc->user_timer = tsk->thread.user_timer; 283 lc->guest_timer = tsk->thread.guest_timer; 284 lc->system_timer = tsk->thread.system_timer; 285 lc->hardirq_timer = tsk->thread.hardirq_timer; 286 lc->softirq_timer = tsk->thread.softirq_timer; 287 lc->steal_timer = 0; 288 } 289 290 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 291 { 292 struct lowcore *lc = pcpu->lowcore; 293 294 lc->restart_stack = lc->kernel_stack; 295 lc->restart_fn = (unsigned long) func; 296 lc->restart_data = (unsigned long) data; 297 lc->restart_source = -1UL; 298 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 299 } 300 301 /* 302 * Call function via PSW restart on pcpu and stop the current cpu. 303 */ 304 static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *), 305 void *data, unsigned long stack) 306 { 307 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 308 unsigned long source_cpu = stap(); 309 310 __load_psw_mask(PSW_KERNEL_BITS); 311 if (pcpu->address == source_cpu) 312 func(data); /* should not return */ 313 /* Stop target cpu (if func returns this stops the current cpu). */ 314 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 315 /* Restart func on the target cpu and stop the current cpu. */ 316 mem_assign_absolute(lc->restart_stack, stack); 317 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 318 mem_assign_absolute(lc->restart_data, (unsigned long) data); 319 mem_assign_absolute(lc->restart_source, source_cpu); 320 asm volatile( 321 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 322 " brc 2,0b # busy, try again\n" 323 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 324 " brc 2,1b # busy, try again\n" 325 : : "d" (pcpu->address), "d" (source_cpu), 326 "K" (SIGP_RESTART), "K" (SIGP_STOP) 327 : "0", "1", "cc"); 328 for (;;) ; 329 } 330 331 /* 332 * Enable additional logical cpus for multi-threading. 333 */ 334 static int pcpu_set_smt(unsigned int mtid) 335 { 336 int cc; 337 338 if (smp_cpu_mtid == mtid) 339 return 0; 340 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 341 if (cc == 0) { 342 smp_cpu_mtid = mtid; 343 smp_cpu_mt_shift = 0; 344 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 345 smp_cpu_mt_shift++; 346 pcpu_devices[0].address = stap(); 347 } 348 return cc; 349 } 350 351 /* 352 * Call function on an online CPU. 353 */ 354 void smp_call_online_cpu(void (*func)(void *), void *data) 355 { 356 struct pcpu *pcpu; 357 358 /* Use the current cpu if it is online. */ 359 pcpu = pcpu_find_address(cpu_online_mask, stap()); 360 if (!pcpu) 361 /* Use the first online cpu. */ 362 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 363 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 364 } 365 366 /* 367 * Call function on the ipl CPU. 368 */ 369 void smp_call_ipl_cpu(void (*func)(void *), void *data) 370 { 371 pcpu_delegate(&pcpu_devices[0], func, data, 372 pcpu_devices->lowcore->panic_stack - 373 PANIC_FRAME_OFFSET + PAGE_SIZE); 374 } 375 376 int smp_find_processor_id(u16 address) 377 { 378 int cpu; 379 380 for_each_present_cpu(cpu) 381 if (pcpu_devices[cpu].address == address) 382 return cpu; 383 return -1; 384 } 385 386 bool arch_vcpu_is_preempted(int cpu) 387 { 388 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 389 return false; 390 if (pcpu_running(pcpu_devices + cpu)) 391 return false; 392 return true; 393 } 394 EXPORT_SYMBOL(arch_vcpu_is_preempted); 395 396 void smp_yield_cpu(int cpu) 397 { 398 if (MACHINE_HAS_DIAG9C) { 399 diag_stat_inc_norecursion(DIAG_STAT_X09C); 400 asm volatile("diag %0,0,0x9c" 401 : : "d" (pcpu_devices[cpu].address)); 402 } else if (MACHINE_HAS_DIAG44) { 403 diag_stat_inc_norecursion(DIAG_STAT_X044); 404 asm volatile("diag 0,0,0x44"); 405 } 406 } 407 408 /* 409 * Send cpus emergency shutdown signal. This gives the cpus the 410 * opportunity to complete outstanding interrupts. 411 */ 412 void notrace smp_emergency_stop(void) 413 { 414 cpumask_t cpumask; 415 u64 end; 416 int cpu; 417 418 cpumask_copy(&cpumask, cpu_online_mask); 419 cpumask_clear_cpu(smp_processor_id(), &cpumask); 420 421 end = get_tod_clock() + (1000000UL << 12); 422 for_each_cpu(cpu, &cpumask) { 423 struct pcpu *pcpu = pcpu_devices + cpu; 424 set_bit(ec_stop_cpu, &pcpu->ec_mask); 425 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 426 0, NULL) == SIGP_CC_BUSY && 427 get_tod_clock() < end) 428 cpu_relax(); 429 } 430 while (get_tod_clock() < end) { 431 for_each_cpu(cpu, &cpumask) 432 if (pcpu_stopped(pcpu_devices + cpu)) 433 cpumask_clear_cpu(cpu, &cpumask); 434 if (cpumask_empty(&cpumask)) 435 break; 436 cpu_relax(); 437 } 438 } 439 NOKPROBE_SYMBOL(smp_emergency_stop); 440 441 /* 442 * Stop all cpus but the current one. 443 */ 444 void smp_send_stop(void) 445 { 446 int cpu; 447 448 /* Disable all interrupts/machine checks */ 449 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 450 trace_hardirqs_off(); 451 452 debug_set_critical(); 453 454 if (oops_in_progress) 455 smp_emergency_stop(); 456 457 /* stop all processors */ 458 for_each_online_cpu(cpu) { 459 if (cpu == smp_processor_id()) 460 continue; 461 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 462 while (!pcpu_stopped(pcpu_devices + cpu)) 463 cpu_relax(); 464 } 465 } 466 467 /* 468 * This is the main routine where commands issued by other 469 * cpus are handled. 470 */ 471 static void smp_handle_ext_call(void) 472 { 473 unsigned long bits; 474 475 /* handle bit signal external calls */ 476 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 477 if (test_bit(ec_stop_cpu, &bits)) 478 smp_stop_cpu(); 479 if (test_bit(ec_schedule, &bits)) 480 scheduler_ipi(); 481 if (test_bit(ec_call_function_single, &bits)) 482 generic_smp_call_function_single_interrupt(); 483 } 484 485 static void do_ext_call_interrupt(struct ext_code ext_code, 486 unsigned int param32, unsigned long param64) 487 { 488 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 489 smp_handle_ext_call(); 490 } 491 492 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 493 { 494 int cpu; 495 496 for_each_cpu(cpu, mask) 497 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 498 } 499 500 void arch_send_call_function_single_ipi(int cpu) 501 { 502 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 503 } 504 505 /* 506 * this function sends a 'reschedule' IPI to another CPU. 507 * it goes straight through and wastes no time serializing 508 * anything. Worst case is that we lose a reschedule ... 509 */ 510 void smp_send_reschedule(int cpu) 511 { 512 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 513 } 514 515 /* 516 * parameter area for the set/clear control bit callbacks 517 */ 518 struct ec_creg_mask_parms { 519 unsigned long orval; 520 unsigned long andval; 521 int cr; 522 }; 523 524 /* 525 * callback for setting/clearing control bits 526 */ 527 static void smp_ctl_bit_callback(void *info) 528 { 529 struct ec_creg_mask_parms *pp = info; 530 unsigned long cregs[16]; 531 532 __ctl_store(cregs, 0, 15); 533 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 534 __ctl_load(cregs, 0, 15); 535 } 536 537 /* 538 * Set a bit in a control register of all cpus 539 */ 540 void smp_ctl_set_bit(int cr, int bit) 541 { 542 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 543 544 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 545 } 546 EXPORT_SYMBOL(smp_ctl_set_bit); 547 548 /* 549 * Clear a bit in a control register of all cpus 550 */ 551 void smp_ctl_clear_bit(int cr, int bit) 552 { 553 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 554 555 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 556 } 557 EXPORT_SYMBOL(smp_ctl_clear_bit); 558 559 #ifdef CONFIG_CRASH_DUMP 560 561 int smp_store_status(int cpu) 562 { 563 struct pcpu *pcpu = pcpu_devices + cpu; 564 unsigned long pa; 565 566 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 567 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 568 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 569 return -EIO; 570 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 571 return 0; 572 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 573 if (MACHINE_HAS_GS) 574 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 575 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 576 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 577 return -EIO; 578 return 0; 579 } 580 581 /* 582 * Collect CPU state of the previous, crashed system. 583 * There are four cases: 584 * 1) standard zfcp dump 585 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 586 * The state for all CPUs except the boot CPU needs to be collected 587 * with sigp stop-and-store-status. The boot CPU state is located in 588 * the absolute lowcore of the memory stored in the HSA. The zcore code 589 * will copy the boot CPU state from the HSA. 590 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 591 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 592 * The state for all CPUs except the boot CPU needs to be collected 593 * with sigp stop-and-store-status. The firmware or the boot-loader 594 * stored the registers of the boot CPU in the absolute lowcore in the 595 * memory of the old system. 596 * 3) kdump and the old kernel did not store the CPU state, 597 * or stand-alone kdump for DASD 598 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 599 * The state for all CPUs except the boot CPU needs to be collected 600 * with sigp stop-and-store-status. The kexec code or the boot-loader 601 * stored the registers of the boot CPU in the memory of the old system. 602 * 4) kdump and the old kernel stored the CPU state 603 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 604 * This case does not exist for s390 anymore, setup_arch explicitly 605 * deactivates the elfcorehdr= kernel parameter 606 */ 607 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 608 bool is_boot_cpu, unsigned long page) 609 { 610 __vector128 *vxrs = (__vector128 *) page; 611 612 if (is_boot_cpu) 613 vxrs = boot_cpu_vector_save_area; 614 else 615 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 616 save_area_add_vxrs(sa, vxrs); 617 } 618 619 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 620 bool is_boot_cpu, unsigned long page) 621 { 622 void *regs = (void *) page; 623 624 if (is_boot_cpu) 625 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 626 else 627 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 628 save_area_add_regs(sa, regs); 629 } 630 631 void __init smp_save_dump_cpus(void) 632 { 633 int addr, boot_cpu_addr, max_cpu_addr; 634 struct save_area *sa; 635 unsigned long page; 636 bool is_boot_cpu; 637 638 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 639 /* No previous system present, normal boot. */ 640 return; 641 /* Allocate a page as dumping area for the store status sigps */ 642 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31); 643 /* Set multi-threading state to the previous system. */ 644 pcpu_set_smt(sclp.mtid_prev); 645 boot_cpu_addr = stap(); 646 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 647 for (addr = 0; addr <= max_cpu_addr; addr++) { 648 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 649 SIGP_CC_NOT_OPERATIONAL) 650 continue; 651 is_boot_cpu = (addr == boot_cpu_addr); 652 /* Allocate save area */ 653 sa = save_area_alloc(is_boot_cpu); 654 if (!sa) 655 panic("could not allocate memory for save area\n"); 656 if (MACHINE_HAS_VX) 657 /* Get the vector registers */ 658 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 659 /* 660 * For a zfcp dump OLDMEM_BASE == NULL and the registers 661 * of the boot CPU are stored in the HSA. To retrieve 662 * these registers an SCLP request is required which is 663 * done by drivers/s390/char/zcore.c:init_cpu_info() 664 */ 665 if (!is_boot_cpu || OLDMEM_BASE) 666 /* Get the CPU registers */ 667 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 668 } 669 memblock_free(page, PAGE_SIZE); 670 diag308_reset(); 671 pcpu_set_smt(0); 672 } 673 #endif /* CONFIG_CRASH_DUMP */ 674 675 void smp_cpu_set_polarization(int cpu, int val) 676 { 677 pcpu_devices[cpu].polarization = val; 678 } 679 680 int smp_cpu_get_polarization(int cpu) 681 { 682 return pcpu_devices[cpu].polarization; 683 } 684 685 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 686 { 687 static int use_sigp_detection; 688 int address; 689 690 if (use_sigp_detection || sclp_get_core_info(info, early)) { 691 use_sigp_detection = 1; 692 for (address = 0; 693 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 694 address += (1U << smp_cpu_mt_shift)) { 695 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 696 SIGP_CC_NOT_OPERATIONAL) 697 continue; 698 info->core[info->configured].core_id = 699 address >> smp_cpu_mt_shift; 700 info->configured++; 701 } 702 info->combined = info->configured; 703 } 704 } 705 706 static int smp_add_present_cpu(int cpu); 707 708 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add) 709 { 710 struct pcpu *pcpu; 711 cpumask_t avail; 712 int cpu, nr, i, j; 713 u16 address; 714 715 nr = 0; 716 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 717 cpu = cpumask_first(&avail); 718 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 719 if (sclp.has_core_type && info->core[i].type != boot_core_type) 720 continue; 721 address = info->core[i].core_id << smp_cpu_mt_shift; 722 for (j = 0; j <= smp_cpu_mtid; j++) { 723 if (pcpu_find_address(cpu_present_mask, address + j)) 724 continue; 725 pcpu = pcpu_devices + cpu; 726 pcpu->address = address + j; 727 pcpu->state = 728 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 729 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 730 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 731 set_cpu_present(cpu, true); 732 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 733 set_cpu_present(cpu, false); 734 else 735 nr++; 736 cpu = cpumask_next(cpu, &avail); 737 if (cpu >= nr_cpu_ids) 738 break; 739 } 740 } 741 return nr; 742 } 743 744 void __init smp_detect_cpus(void) 745 { 746 unsigned int cpu, mtid, c_cpus, s_cpus; 747 struct sclp_core_info *info; 748 u16 address; 749 750 /* Get CPU information */ 751 info = memblock_virt_alloc(sizeof(*info), 8); 752 smp_get_core_info(info, 1); 753 /* Find boot CPU type */ 754 if (sclp.has_core_type) { 755 address = stap(); 756 for (cpu = 0; cpu < info->combined; cpu++) 757 if (info->core[cpu].core_id == address) { 758 /* The boot cpu dictates the cpu type. */ 759 boot_core_type = info->core[cpu].type; 760 break; 761 } 762 if (cpu >= info->combined) 763 panic("Could not find boot CPU type"); 764 } 765 766 /* Set multi-threading state for the current system */ 767 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 768 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 769 pcpu_set_smt(mtid); 770 771 /* Print number of CPUs */ 772 c_cpus = s_cpus = 0; 773 for (cpu = 0; cpu < info->combined; cpu++) { 774 if (sclp.has_core_type && 775 info->core[cpu].type != boot_core_type) 776 continue; 777 if (cpu < info->configured) 778 c_cpus += smp_cpu_mtid + 1; 779 else 780 s_cpus += smp_cpu_mtid + 1; 781 } 782 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 783 784 /* Add CPUs present at boot */ 785 get_online_cpus(); 786 __smp_rescan_cpus(info, 0); 787 put_online_cpus(); 788 memblock_free_early((unsigned long)info, sizeof(*info)); 789 } 790 791 /* 792 * Activate a secondary processor. 793 */ 794 static void smp_start_secondary(void *cpuvoid) 795 { 796 int cpu = smp_processor_id(); 797 798 S390_lowcore.last_update_clock = get_tod_clock(); 799 S390_lowcore.restart_stack = (unsigned long) restart_stack; 800 S390_lowcore.restart_fn = (unsigned long) do_restart; 801 S390_lowcore.restart_data = 0; 802 S390_lowcore.restart_source = -1UL; 803 restore_access_regs(S390_lowcore.access_regs_save_area); 804 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 805 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 806 cpu_init(); 807 preempt_disable(); 808 init_cpu_timer(); 809 vtime_init(); 810 pfault_init(); 811 notify_cpu_starting(cpu); 812 if (topology_cpu_dedicated(cpu)) 813 set_cpu_flag(CIF_DEDICATED_CPU); 814 else 815 clear_cpu_flag(CIF_DEDICATED_CPU); 816 set_cpu_online(cpu, true); 817 inc_irq_stat(CPU_RST); 818 local_irq_enable(); 819 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 820 } 821 822 /* Upping and downing of CPUs */ 823 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 824 { 825 struct pcpu *pcpu; 826 int base, i, rc; 827 828 pcpu = pcpu_devices + cpu; 829 if (pcpu->state != CPU_STATE_CONFIGURED) 830 return -EIO; 831 base = smp_get_base_cpu(cpu); 832 for (i = 0; i <= smp_cpu_mtid; i++) { 833 if (base + i < nr_cpu_ids) 834 if (cpu_online(base + i)) 835 break; 836 } 837 /* 838 * If this is the first CPU of the core to get online 839 * do an initial CPU reset. 840 */ 841 if (i > smp_cpu_mtid && 842 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 843 SIGP_CC_ORDER_CODE_ACCEPTED) 844 return -EIO; 845 846 rc = pcpu_alloc_lowcore(pcpu, cpu); 847 if (rc) 848 return rc; 849 pcpu_prepare_secondary(pcpu, cpu); 850 pcpu_attach_task(pcpu, tidle); 851 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 852 /* Wait until cpu puts itself in the online & active maps */ 853 while (!cpu_online(cpu)) 854 cpu_relax(); 855 return 0; 856 } 857 858 static unsigned int setup_possible_cpus __initdata; 859 860 static int __init _setup_possible_cpus(char *s) 861 { 862 get_option(&s, &setup_possible_cpus); 863 return 0; 864 } 865 early_param("possible_cpus", _setup_possible_cpus); 866 867 #ifdef CONFIG_HOTPLUG_CPU 868 869 int __cpu_disable(void) 870 { 871 unsigned long cregs[16]; 872 873 /* Handle possible pending IPIs */ 874 smp_handle_ext_call(); 875 set_cpu_online(smp_processor_id(), false); 876 /* Disable pseudo page faults on this cpu. */ 877 pfault_fini(); 878 /* Disable interrupt sources via control register. */ 879 __ctl_store(cregs, 0, 15); 880 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 881 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 882 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 883 __ctl_load(cregs, 0, 15); 884 clear_cpu_flag(CIF_NOHZ_DELAY); 885 return 0; 886 } 887 888 void __cpu_die(unsigned int cpu) 889 { 890 struct pcpu *pcpu; 891 892 /* Wait until target cpu is down */ 893 pcpu = pcpu_devices + cpu; 894 while (!pcpu_stopped(pcpu)) 895 cpu_relax(); 896 pcpu_free_lowcore(pcpu); 897 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 898 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 899 } 900 901 void __noreturn cpu_die(void) 902 { 903 idle_task_exit(); 904 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 905 for (;;) ; 906 } 907 908 #endif /* CONFIG_HOTPLUG_CPU */ 909 910 void __init smp_fill_possible_mask(void) 911 { 912 unsigned int possible, sclp_max, cpu; 913 914 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 915 sclp_max = min(smp_max_threads, sclp_max); 916 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 917 possible = setup_possible_cpus ?: nr_cpu_ids; 918 possible = min(possible, sclp_max); 919 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 920 set_cpu_possible(cpu, true); 921 } 922 923 void __init smp_prepare_cpus(unsigned int max_cpus) 924 { 925 /* request the 0x1201 emergency signal external interrupt */ 926 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 927 panic("Couldn't request external interrupt 0x1201"); 928 /* request the 0x1202 external call external interrupt */ 929 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 930 panic("Couldn't request external interrupt 0x1202"); 931 } 932 933 void __init smp_prepare_boot_cpu(void) 934 { 935 struct pcpu *pcpu = pcpu_devices; 936 937 WARN_ON(!cpu_present(0) || !cpu_online(0)); 938 pcpu->state = CPU_STATE_CONFIGURED; 939 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 940 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 941 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 942 } 943 944 void __init smp_cpus_done(unsigned int max_cpus) 945 { 946 } 947 948 void __init smp_setup_processor_id(void) 949 { 950 pcpu_devices[0].address = stap(); 951 S390_lowcore.cpu_nr = 0; 952 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 953 S390_lowcore.spinlock_index = 0; 954 } 955 956 /* 957 * the frequency of the profiling timer can be changed 958 * by writing a multiplier value into /proc/profile. 959 * 960 * usually you want to run this on all CPUs ;) 961 */ 962 int setup_profiling_timer(unsigned int multiplier) 963 { 964 return 0; 965 } 966 967 #ifdef CONFIG_HOTPLUG_CPU 968 static ssize_t cpu_configure_show(struct device *dev, 969 struct device_attribute *attr, char *buf) 970 { 971 ssize_t count; 972 973 mutex_lock(&smp_cpu_state_mutex); 974 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 975 mutex_unlock(&smp_cpu_state_mutex); 976 return count; 977 } 978 979 static ssize_t cpu_configure_store(struct device *dev, 980 struct device_attribute *attr, 981 const char *buf, size_t count) 982 { 983 struct pcpu *pcpu; 984 int cpu, val, rc, i; 985 char delim; 986 987 if (sscanf(buf, "%d %c", &val, &delim) != 1) 988 return -EINVAL; 989 if (val != 0 && val != 1) 990 return -EINVAL; 991 get_online_cpus(); 992 mutex_lock(&smp_cpu_state_mutex); 993 rc = -EBUSY; 994 /* disallow configuration changes of online cpus and cpu 0 */ 995 cpu = dev->id; 996 cpu = smp_get_base_cpu(cpu); 997 if (cpu == 0) 998 goto out; 999 for (i = 0; i <= smp_cpu_mtid; i++) 1000 if (cpu_online(cpu + i)) 1001 goto out; 1002 pcpu = pcpu_devices + cpu; 1003 rc = 0; 1004 switch (val) { 1005 case 0: 1006 if (pcpu->state != CPU_STATE_CONFIGURED) 1007 break; 1008 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1009 if (rc) 1010 break; 1011 for (i = 0; i <= smp_cpu_mtid; i++) { 1012 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1013 continue; 1014 pcpu[i].state = CPU_STATE_STANDBY; 1015 smp_cpu_set_polarization(cpu + i, 1016 POLARIZATION_UNKNOWN); 1017 } 1018 topology_expect_change(); 1019 break; 1020 case 1: 1021 if (pcpu->state != CPU_STATE_STANDBY) 1022 break; 1023 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1024 if (rc) 1025 break; 1026 for (i = 0; i <= smp_cpu_mtid; i++) { 1027 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1028 continue; 1029 pcpu[i].state = CPU_STATE_CONFIGURED; 1030 smp_cpu_set_polarization(cpu + i, 1031 POLARIZATION_UNKNOWN); 1032 } 1033 topology_expect_change(); 1034 break; 1035 default: 1036 break; 1037 } 1038 out: 1039 mutex_unlock(&smp_cpu_state_mutex); 1040 put_online_cpus(); 1041 return rc ? rc : count; 1042 } 1043 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1044 #endif /* CONFIG_HOTPLUG_CPU */ 1045 1046 static ssize_t show_cpu_address(struct device *dev, 1047 struct device_attribute *attr, char *buf) 1048 { 1049 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1050 } 1051 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1052 1053 static struct attribute *cpu_common_attrs[] = { 1054 #ifdef CONFIG_HOTPLUG_CPU 1055 &dev_attr_configure.attr, 1056 #endif 1057 &dev_attr_address.attr, 1058 NULL, 1059 }; 1060 1061 static struct attribute_group cpu_common_attr_group = { 1062 .attrs = cpu_common_attrs, 1063 }; 1064 1065 static struct attribute *cpu_online_attrs[] = { 1066 &dev_attr_idle_count.attr, 1067 &dev_attr_idle_time_us.attr, 1068 NULL, 1069 }; 1070 1071 static struct attribute_group cpu_online_attr_group = { 1072 .attrs = cpu_online_attrs, 1073 }; 1074 1075 static int smp_cpu_online(unsigned int cpu) 1076 { 1077 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1078 1079 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1080 } 1081 static int smp_cpu_pre_down(unsigned int cpu) 1082 { 1083 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1084 1085 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1086 return 0; 1087 } 1088 1089 static int smp_add_present_cpu(int cpu) 1090 { 1091 struct device *s; 1092 struct cpu *c; 1093 int rc; 1094 1095 c = kzalloc(sizeof(*c), GFP_KERNEL); 1096 if (!c) 1097 return -ENOMEM; 1098 per_cpu(cpu_device, cpu) = c; 1099 s = &c->dev; 1100 c->hotpluggable = 1; 1101 rc = register_cpu(c, cpu); 1102 if (rc) 1103 goto out; 1104 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1105 if (rc) 1106 goto out_cpu; 1107 rc = topology_cpu_init(c); 1108 if (rc) 1109 goto out_topology; 1110 return 0; 1111 1112 out_topology: 1113 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1114 out_cpu: 1115 #ifdef CONFIG_HOTPLUG_CPU 1116 unregister_cpu(c); 1117 #endif 1118 out: 1119 return rc; 1120 } 1121 1122 #ifdef CONFIG_HOTPLUG_CPU 1123 1124 int __ref smp_rescan_cpus(void) 1125 { 1126 struct sclp_core_info *info; 1127 int nr; 1128 1129 info = kzalloc(sizeof(*info), GFP_KERNEL); 1130 if (!info) 1131 return -ENOMEM; 1132 smp_get_core_info(info, 0); 1133 get_online_cpus(); 1134 mutex_lock(&smp_cpu_state_mutex); 1135 nr = __smp_rescan_cpus(info, 1); 1136 mutex_unlock(&smp_cpu_state_mutex); 1137 put_online_cpus(); 1138 kfree(info); 1139 if (nr) 1140 topology_schedule_update(); 1141 return 0; 1142 } 1143 1144 static ssize_t __ref rescan_store(struct device *dev, 1145 struct device_attribute *attr, 1146 const char *buf, 1147 size_t count) 1148 { 1149 int rc; 1150 1151 rc = smp_rescan_cpus(); 1152 return rc ? rc : count; 1153 } 1154 static DEVICE_ATTR(rescan, 0200, NULL, rescan_store); 1155 #endif /* CONFIG_HOTPLUG_CPU */ 1156 1157 static int __init s390_smp_init(void) 1158 { 1159 int cpu, rc = 0; 1160 1161 #ifdef CONFIG_HOTPLUG_CPU 1162 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1163 if (rc) 1164 return rc; 1165 #endif 1166 for_each_present_cpu(cpu) { 1167 rc = smp_add_present_cpu(cpu); 1168 if (rc) 1169 goto out; 1170 } 1171 1172 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1173 smp_cpu_online, smp_cpu_pre_down); 1174 rc = rc <= 0 ? rc : 0; 1175 out: 1176 return rc; 1177 } 1178 subsys_initcall(s390_smp_init); 1179