1 /* 2 * SMP related functions 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Denis Joseph Barrow, 6 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 7 * Heiko Carstens <heiko.carstens@de.ibm.com>, 8 * 9 * based on other smp stuff by 10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 11 * (c) 1998 Ingo Molnar 12 * 13 * The code outside of smp.c uses logical cpu numbers, only smp.c does 14 * the translation of logical to physical cpu ids. All new code that 15 * operates on physical cpu numbers needs to go into smp.c. 16 */ 17 18 #define KMSG_COMPONENT "cpu" 19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 20 21 #include <linux/workqueue.h> 22 #include <linux/bootmem.h> 23 #include <linux/export.h> 24 #include <linux/init.h> 25 #include <linux/mm.h> 26 #include <linux/err.h> 27 #include <linux/spinlock.h> 28 #include <linux/kernel_stat.h> 29 #include <linux/delay.h> 30 #include <linux/interrupt.h> 31 #include <linux/irqflags.h> 32 #include <linux/cpu.h> 33 #include <linux/slab.h> 34 #include <linux/sched/hotplug.h> 35 #include <linux/sched/task_stack.h> 36 #include <linux/crash_dump.h> 37 #include <linux/memblock.h> 38 #include <asm/asm-offsets.h> 39 #include <asm/diag.h> 40 #include <asm/switch_to.h> 41 #include <asm/facility.h> 42 #include <asm/ipl.h> 43 #include <asm/setup.h> 44 #include <asm/irq.h> 45 #include <asm/tlbflush.h> 46 #include <asm/vtimer.h> 47 #include <asm/lowcore.h> 48 #include <asm/sclp.h> 49 #include <asm/vdso.h> 50 #include <asm/debug.h> 51 #include <asm/os_info.h> 52 #include <asm/sigp.h> 53 #include <asm/idle.h> 54 #include <asm/nmi.h> 55 #include "entry.h" 56 57 enum { 58 ec_schedule = 0, 59 ec_call_function_single, 60 ec_stop_cpu, 61 }; 62 63 enum { 64 CPU_STATE_STANDBY, 65 CPU_STATE_CONFIGURED, 66 }; 67 68 static DEFINE_PER_CPU(struct cpu *, cpu_device); 69 70 struct pcpu { 71 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 72 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 73 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 74 signed char state; /* physical cpu state */ 75 signed char polarization; /* physical polarization */ 76 u16 address; /* physical cpu address */ 77 }; 78 79 static u8 boot_core_type; 80 static struct pcpu pcpu_devices[NR_CPUS]; 81 82 static struct kmem_cache *pcpu_mcesa_cache; 83 84 unsigned int smp_cpu_mt_shift; 85 EXPORT_SYMBOL(smp_cpu_mt_shift); 86 87 unsigned int smp_cpu_mtid; 88 EXPORT_SYMBOL(smp_cpu_mtid); 89 90 #ifdef CONFIG_CRASH_DUMP 91 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 92 #endif 93 94 static unsigned int smp_max_threads __initdata = -1U; 95 96 static int __init early_nosmt(char *s) 97 { 98 smp_max_threads = 1; 99 return 0; 100 } 101 early_param("nosmt", early_nosmt); 102 103 static int __init early_smt(char *s) 104 { 105 get_option(&s, &smp_max_threads); 106 return 0; 107 } 108 early_param("smt", early_smt); 109 110 /* 111 * The smp_cpu_state_mutex must be held when changing the state or polarization 112 * member of a pcpu data structure within the pcpu_devices arreay. 113 */ 114 DEFINE_MUTEX(smp_cpu_state_mutex); 115 116 /* 117 * Signal processor helper functions. 118 */ 119 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 120 { 121 int cc; 122 123 while (1) { 124 cc = __pcpu_sigp(addr, order, parm, NULL); 125 if (cc != SIGP_CC_BUSY) 126 return cc; 127 cpu_relax(); 128 } 129 } 130 131 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 132 { 133 int cc, retry; 134 135 for (retry = 0; ; retry++) { 136 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 137 if (cc != SIGP_CC_BUSY) 138 break; 139 if (retry >= 3) 140 udelay(10); 141 } 142 return cc; 143 } 144 145 static inline int pcpu_stopped(struct pcpu *pcpu) 146 { 147 u32 uninitialized_var(status); 148 149 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 150 0, &status) != SIGP_CC_STATUS_STORED) 151 return 0; 152 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 153 } 154 155 static inline int pcpu_running(struct pcpu *pcpu) 156 { 157 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 158 0, NULL) != SIGP_CC_STATUS_STORED) 159 return 1; 160 /* Status stored condition code is equivalent to cpu not running. */ 161 return 0; 162 } 163 164 /* 165 * Find struct pcpu by cpu address. 166 */ 167 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 168 { 169 int cpu; 170 171 for_each_cpu(cpu, mask) 172 if (pcpu_devices[cpu].address == address) 173 return pcpu_devices + cpu; 174 return NULL; 175 } 176 177 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 178 { 179 int order; 180 181 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 182 return; 183 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 184 pcpu->ec_clk = get_tod_clock_fast(); 185 pcpu_sigp_retry(pcpu, order, 0); 186 } 187 188 #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 189 #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 190 191 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 192 { 193 unsigned long async_stack, panic_stack; 194 unsigned long mcesa_origin, mcesa_bits; 195 struct lowcore *lc; 196 197 mcesa_origin = mcesa_bits = 0; 198 if (pcpu != &pcpu_devices[0]) { 199 pcpu->lowcore = (struct lowcore *) 200 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 201 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); 202 panic_stack = __get_free_page(GFP_KERNEL); 203 if (!pcpu->lowcore || !panic_stack || !async_stack) 204 goto out; 205 if (MACHINE_HAS_VX || MACHINE_HAS_GS) { 206 mcesa_origin = (unsigned long) 207 kmem_cache_alloc(pcpu_mcesa_cache, GFP_KERNEL); 208 if (!mcesa_origin) 209 goto out; 210 mcesa_bits = MACHINE_HAS_GS ? 11 : 0; 211 } 212 } else { 213 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET; 214 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET; 215 mcesa_origin = pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK; 216 mcesa_bits = pcpu->lowcore->mcesad & MCESA_LC_MASK; 217 } 218 lc = pcpu->lowcore; 219 memcpy(lc, &S390_lowcore, 512); 220 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 221 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET; 222 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET; 223 lc->mcesad = mcesa_origin | mcesa_bits; 224 lc->cpu_nr = cpu; 225 lc->spinlock_lockval = arch_spin_lockval(cpu); 226 if (vdso_alloc_per_cpu(lc)) 227 goto out; 228 lowcore_ptr[cpu] = lc; 229 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 230 return 0; 231 out: 232 if (pcpu != &pcpu_devices[0]) { 233 if (mcesa_origin) 234 kmem_cache_free(pcpu_mcesa_cache, 235 (void *) mcesa_origin); 236 free_page(panic_stack); 237 free_pages(async_stack, ASYNC_ORDER); 238 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 239 } 240 return -ENOMEM; 241 } 242 243 #ifdef CONFIG_HOTPLUG_CPU 244 245 static void pcpu_free_lowcore(struct pcpu *pcpu) 246 { 247 unsigned long mcesa_origin; 248 249 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 250 lowcore_ptr[pcpu - pcpu_devices] = NULL; 251 vdso_free_per_cpu(pcpu->lowcore); 252 if (pcpu == &pcpu_devices[0]) 253 return; 254 if (MACHINE_HAS_VX || MACHINE_HAS_GS) { 255 mcesa_origin = pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK; 256 kmem_cache_free(pcpu_mcesa_cache, (void *) mcesa_origin); 257 } 258 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET); 259 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER); 260 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 261 } 262 263 #endif /* CONFIG_HOTPLUG_CPU */ 264 265 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 266 { 267 struct lowcore *lc = pcpu->lowcore; 268 269 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 270 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 271 lc->cpu_nr = cpu; 272 lc->spinlock_lockval = arch_spin_lockval(cpu); 273 lc->percpu_offset = __per_cpu_offset[cpu]; 274 lc->kernel_asce = S390_lowcore.kernel_asce; 275 lc->machine_flags = S390_lowcore.machine_flags; 276 lc->user_timer = lc->system_timer = lc->steal_timer = 0; 277 __ctl_store(lc->cregs_save_area, 0, 15); 278 save_access_regs((unsigned int *) lc->access_regs_save_area); 279 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 280 MAX_FACILITY_BIT/8); 281 } 282 283 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 284 { 285 struct lowcore *lc = pcpu->lowcore; 286 287 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 288 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 289 lc->current_task = (unsigned long) tsk; 290 lc->lpp = LPP_MAGIC; 291 lc->current_pid = tsk->pid; 292 lc->user_timer = tsk->thread.user_timer; 293 lc->system_timer = tsk->thread.system_timer; 294 lc->steal_timer = 0; 295 } 296 297 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 298 { 299 struct lowcore *lc = pcpu->lowcore; 300 301 lc->restart_stack = lc->kernel_stack; 302 lc->restart_fn = (unsigned long) func; 303 lc->restart_data = (unsigned long) data; 304 lc->restart_source = -1UL; 305 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 306 } 307 308 /* 309 * Call function via PSW restart on pcpu and stop the current cpu. 310 */ 311 static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *), 312 void *data, unsigned long stack) 313 { 314 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 315 unsigned long source_cpu = stap(); 316 317 __load_psw_mask(PSW_KERNEL_BITS); 318 if (pcpu->address == source_cpu) 319 func(data); /* should not return */ 320 /* Stop target cpu (if func returns this stops the current cpu). */ 321 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 322 /* Restart func on the target cpu and stop the current cpu. */ 323 mem_assign_absolute(lc->restart_stack, stack); 324 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 325 mem_assign_absolute(lc->restart_data, (unsigned long) data); 326 mem_assign_absolute(lc->restart_source, source_cpu); 327 asm volatile( 328 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 329 " brc 2,0b # busy, try again\n" 330 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 331 " brc 2,1b # busy, try again\n" 332 : : "d" (pcpu->address), "d" (source_cpu), 333 "K" (SIGP_RESTART), "K" (SIGP_STOP) 334 : "0", "1", "cc"); 335 for (;;) ; 336 } 337 338 /* 339 * Enable additional logical cpus for multi-threading. 340 */ 341 static int pcpu_set_smt(unsigned int mtid) 342 { 343 int cc; 344 345 if (smp_cpu_mtid == mtid) 346 return 0; 347 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 348 if (cc == 0) { 349 smp_cpu_mtid = mtid; 350 smp_cpu_mt_shift = 0; 351 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 352 smp_cpu_mt_shift++; 353 pcpu_devices[0].address = stap(); 354 } 355 return cc; 356 } 357 358 /* 359 * Call function on an online CPU. 360 */ 361 void smp_call_online_cpu(void (*func)(void *), void *data) 362 { 363 struct pcpu *pcpu; 364 365 /* Use the current cpu if it is online. */ 366 pcpu = pcpu_find_address(cpu_online_mask, stap()); 367 if (!pcpu) 368 /* Use the first online cpu. */ 369 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 370 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 371 } 372 373 /* 374 * Call function on the ipl CPU. 375 */ 376 void smp_call_ipl_cpu(void (*func)(void *), void *data) 377 { 378 pcpu_delegate(&pcpu_devices[0], func, data, 379 pcpu_devices->lowcore->panic_stack - 380 PANIC_FRAME_OFFSET + PAGE_SIZE); 381 } 382 383 int smp_find_processor_id(u16 address) 384 { 385 int cpu; 386 387 for_each_present_cpu(cpu) 388 if (pcpu_devices[cpu].address == address) 389 return cpu; 390 return -1; 391 } 392 393 bool arch_vcpu_is_preempted(int cpu) 394 { 395 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 396 return false; 397 if (pcpu_running(pcpu_devices + cpu)) 398 return false; 399 return true; 400 } 401 EXPORT_SYMBOL(arch_vcpu_is_preempted); 402 403 void smp_yield_cpu(int cpu) 404 { 405 if (MACHINE_HAS_DIAG9C) { 406 diag_stat_inc_norecursion(DIAG_STAT_X09C); 407 asm volatile("diag %0,0,0x9c" 408 : : "d" (pcpu_devices[cpu].address)); 409 } else if (MACHINE_HAS_DIAG44) { 410 diag_stat_inc_norecursion(DIAG_STAT_X044); 411 asm volatile("diag 0,0,0x44"); 412 } 413 } 414 415 /* 416 * Send cpus emergency shutdown signal. This gives the cpus the 417 * opportunity to complete outstanding interrupts. 418 */ 419 static void smp_emergency_stop(cpumask_t *cpumask) 420 { 421 u64 end; 422 int cpu; 423 424 end = get_tod_clock() + (1000000UL << 12); 425 for_each_cpu(cpu, cpumask) { 426 struct pcpu *pcpu = pcpu_devices + cpu; 427 set_bit(ec_stop_cpu, &pcpu->ec_mask); 428 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 429 0, NULL) == SIGP_CC_BUSY && 430 get_tod_clock() < end) 431 cpu_relax(); 432 } 433 while (get_tod_clock() < end) { 434 for_each_cpu(cpu, cpumask) 435 if (pcpu_stopped(pcpu_devices + cpu)) 436 cpumask_clear_cpu(cpu, cpumask); 437 if (cpumask_empty(cpumask)) 438 break; 439 cpu_relax(); 440 } 441 } 442 443 /* 444 * Stop all cpus but the current one. 445 */ 446 void smp_send_stop(void) 447 { 448 cpumask_t cpumask; 449 int cpu; 450 451 /* Disable all interrupts/machine checks */ 452 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 453 trace_hardirqs_off(); 454 455 debug_set_critical(); 456 cpumask_copy(&cpumask, cpu_online_mask); 457 cpumask_clear_cpu(smp_processor_id(), &cpumask); 458 459 if (oops_in_progress) 460 smp_emergency_stop(&cpumask); 461 462 /* stop all processors */ 463 for_each_cpu(cpu, &cpumask) { 464 struct pcpu *pcpu = pcpu_devices + cpu; 465 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 466 while (!pcpu_stopped(pcpu)) 467 cpu_relax(); 468 } 469 } 470 471 /* 472 * This is the main routine where commands issued by other 473 * cpus are handled. 474 */ 475 static void smp_handle_ext_call(void) 476 { 477 unsigned long bits; 478 479 /* handle bit signal external calls */ 480 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 481 if (test_bit(ec_stop_cpu, &bits)) 482 smp_stop_cpu(); 483 if (test_bit(ec_schedule, &bits)) 484 scheduler_ipi(); 485 if (test_bit(ec_call_function_single, &bits)) 486 generic_smp_call_function_single_interrupt(); 487 } 488 489 static void do_ext_call_interrupt(struct ext_code ext_code, 490 unsigned int param32, unsigned long param64) 491 { 492 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 493 smp_handle_ext_call(); 494 } 495 496 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 497 { 498 int cpu; 499 500 for_each_cpu(cpu, mask) 501 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 502 } 503 504 void arch_send_call_function_single_ipi(int cpu) 505 { 506 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 507 } 508 509 /* 510 * this function sends a 'reschedule' IPI to another CPU. 511 * it goes straight through and wastes no time serializing 512 * anything. Worst case is that we lose a reschedule ... 513 */ 514 void smp_send_reschedule(int cpu) 515 { 516 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 517 } 518 519 /* 520 * parameter area for the set/clear control bit callbacks 521 */ 522 struct ec_creg_mask_parms { 523 unsigned long orval; 524 unsigned long andval; 525 int cr; 526 }; 527 528 /* 529 * callback for setting/clearing control bits 530 */ 531 static void smp_ctl_bit_callback(void *info) 532 { 533 struct ec_creg_mask_parms *pp = info; 534 unsigned long cregs[16]; 535 536 __ctl_store(cregs, 0, 15); 537 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 538 __ctl_load(cregs, 0, 15); 539 } 540 541 /* 542 * Set a bit in a control register of all cpus 543 */ 544 void smp_ctl_set_bit(int cr, int bit) 545 { 546 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 547 548 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 549 } 550 EXPORT_SYMBOL(smp_ctl_set_bit); 551 552 /* 553 * Clear a bit in a control register of all cpus 554 */ 555 void smp_ctl_clear_bit(int cr, int bit) 556 { 557 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 558 559 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 560 } 561 EXPORT_SYMBOL(smp_ctl_clear_bit); 562 563 #ifdef CONFIG_CRASH_DUMP 564 565 int smp_store_status(int cpu) 566 { 567 struct pcpu *pcpu = pcpu_devices + cpu; 568 unsigned long pa; 569 570 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 571 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 572 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 573 return -EIO; 574 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 575 return 0; 576 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 577 if (MACHINE_HAS_GS) 578 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 579 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 580 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 581 return -EIO; 582 return 0; 583 } 584 585 /* 586 * Collect CPU state of the previous, crashed system. 587 * There are four cases: 588 * 1) standard zfcp dump 589 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 590 * The state for all CPUs except the boot CPU needs to be collected 591 * with sigp stop-and-store-status. The boot CPU state is located in 592 * the absolute lowcore of the memory stored in the HSA. The zcore code 593 * will copy the boot CPU state from the HSA. 594 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 595 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 596 * The state for all CPUs except the boot CPU needs to be collected 597 * with sigp stop-and-store-status. The firmware or the boot-loader 598 * stored the registers of the boot CPU in the absolute lowcore in the 599 * memory of the old system. 600 * 3) kdump and the old kernel did not store the CPU state, 601 * or stand-alone kdump for DASD 602 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 603 * The state for all CPUs except the boot CPU needs to be collected 604 * with sigp stop-and-store-status. The kexec code or the boot-loader 605 * stored the registers of the boot CPU in the memory of the old system. 606 * 4) kdump and the old kernel stored the CPU state 607 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 608 * This case does not exist for s390 anymore, setup_arch explicitly 609 * deactivates the elfcorehdr= kernel parameter 610 */ 611 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 612 bool is_boot_cpu, unsigned long page) 613 { 614 __vector128 *vxrs = (__vector128 *) page; 615 616 if (is_boot_cpu) 617 vxrs = boot_cpu_vector_save_area; 618 else 619 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 620 save_area_add_vxrs(sa, vxrs); 621 } 622 623 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 624 bool is_boot_cpu, unsigned long page) 625 { 626 void *regs = (void *) page; 627 628 if (is_boot_cpu) 629 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 630 else 631 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 632 save_area_add_regs(sa, regs); 633 } 634 635 void __init smp_save_dump_cpus(void) 636 { 637 int addr, boot_cpu_addr, max_cpu_addr; 638 struct save_area *sa; 639 unsigned long page; 640 bool is_boot_cpu; 641 642 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 643 /* No previous system present, normal boot. */ 644 return; 645 /* Allocate a page as dumping area for the store status sigps */ 646 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31); 647 /* Set multi-threading state to the previous system. */ 648 pcpu_set_smt(sclp.mtid_prev); 649 boot_cpu_addr = stap(); 650 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 651 for (addr = 0; addr <= max_cpu_addr; addr++) { 652 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 653 SIGP_CC_NOT_OPERATIONAL) 654 continue; 655 is_boot_cpu = (addr == boot_cpu_addr); 656 /* Allocate save area */ 657 sa = save_area_alloc(is_boot_cpu); 658 if (!sa) 659 panic("could not allocate memory for save area\n"); 660 if (MACHINE_HAS_VX) 661 /* Get the vector registers */ 662 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 663 /* 664 * For a zfcp dump OLDMEM_BASE == NULL and the registers 665 * of the boot CPU are stored in the HSA. To retrieve 666 * these registers an SCLP request is required which is 667 * done by drivers/s390/char/zcore.c:init_cpu_info() 668 */ 669 if (!is_boot_cpu || OLDMEM_BASE) 670 /* Get the CPU registers */ 671 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 672 } 673 memblock_free(page, PAGE_SIZE); 674 diag308_reset(); 675 pcpu_set_smt(0); 676 } 677 #endif /* CONFIG_CRASH_DUMP */ 678 679 void smp_cpu_set_polarization(int cpu, int val) 680 { 681 pcpu_devices[cpu].polarization = val; 682 } 683 684 int smp_cpu_get_polarization(int cpu) 685 { 686 return pcpu_devices[cpu].polarization; 687 } 688 689 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 690 { 691 static int use_sigp_detection; 692 int address; 693 694 if (use_sigp_detection || sclp_get_core_info(info, early)) { 695 use_sigp_detection = 1; 696 for (address = 0; 697 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 698 address += (1U << smp_cpu_mt_shift)) { 699 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 700 SIGP_CC_NOT_OPERATIONAL) 701 continue; 702 info->core[info->configured].core_id = 703 address >> smp_cpu_mt_shift; 704 info->configured++; 705 } 706 info->combined = info->configured; 707 } 708 } 709 710 static int smp_add_present_cpu(int cpu); 711 712 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add) 713 { 714 struct pcpu *pcpu; 715 cpumask_t avail; 716 int cpu, nr, i, j; 717 u16 address; 718 719 nr = 0; 720 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 721 cpu = cpumask_first(&avail); 722 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 723 if (sclp.has_core_type && info->core[i].type != boot_core_type) 724 continue; 725 address = info->core[i].core_id << smp_cpu_mt_shift; 726 for (j = 0; j <= smp_cpu_mtid; j++) { 727 if (pcpu_find_address(cpu_present_mask, address + j)) 728 continue; 729 pcpu = pcpu_devices + cpu; 730 pcpu->address = address + j; 731 pcpu->state = 732 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 733 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 734 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 735 set_cpu_present(cpu, true); 736 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 737 set_cpu_present(cpu, false); 738 else 739 nr++; 740 cpu = cpumask_next(cpu, &avail); 741 if (cpu >= nr_cpu_ids) 742 break; 743 } 744 } 745 return nr; 746 } 747 748 void __init smp_detect_cpus(void) 749 { 750 unsigned int cpu, mtid, c_cpus, s_cpus; 751 struct sclp_core_info *info; 752 u16 address; 753 754 /* Get CPU information */ 755 info = memblock_virt_alloc(sizeof(*info), 8); 756 smp_get_core_info(info, 1); 757 /* Find boot CPU type */ 758 if (sclp.has_core_type) { 759 address = stap(); 760 for (cpu = 0; cpu < info->combined; cpu++) 761 if (info->core[cpu].core_id == address) { 762 /* The boot cpu dictates the cpu type. */ 763 boot_core_type = info->core[cpu].type; 764 break; 765 } 766 if (cpu >= info->combined) 767 panic("Could not find boot CPU type"); 768 } 769 770 /* Set multi-threading state for the current system */ 771 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 772 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 773 pcpu_set_smt(mtid); 774 775 /* Print number of CPUs */ 776 c_cpus = s_cpus = 0; 777 for (cpu = 0; cpu < info->combined; cpu++) { 778 if (sclp.has_core_type && 779 info->core[cpu].type != boot_core_type) 780 continue; 781 if (cpu < info->configured) 782 c_cpus += smp_cpu_mtid + 1; 783 else 784 s_cpus += smp_cpu_mtid + 1; 785 } 786 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 787 788 /* Add CPUs present at boot */ 789 get_online_cpus(); 790 __smp_rescan_cpus(info, 0); 791 put_online_cpus(); 792 memblock_free_early((unsigned long)info, sizeof(*info)); 793 } 794 795 /* 796 * Activate a secondary processor. 797 */ 798 static void smp_start_secondary(void *cpuvoid) 799 { 800 S390_lowcore.last_update_clock = get_tod_clock(); 801 S390_lowcore.restart_stack = (unsigned long) restart_stack; 802 S390_lowcore.restart_fn = (unsigned long) do_restart; 803 S390_lowcore.restart_data = 0; 804 S390_lowcore.restart_source = -1UL; 805 restore_access_regs(S390_lowcore.access_regs_save_area); 806 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 807 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 808 cpu_init(); 809 preempt_disable(); 810 init_cpu_timer(); 811 vtime_init(); 812 pfault_init(); 813 notify_cpu_starting(smp_processor_id()); 814 set_cpu_online(smp_processor_id(), true); 815 inc_irq_stat(CPU_RST); 816 local_irq_enable(); 817 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 818 } 819 820 /* Upping and downing of CPUs */ 821 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 822 { 823 struct pcpu *pcpu; 824 int base, i, rc; 825 826 pcpu = pcpu_devices + cpu; 827 if (pcpu->state != CPU_STATE_CONFIGURED) 828 return -EIO; 829 base = smp_get_base_cpu(cpu); 830 for (i = 0; i <= smp_cpu_mtid; i++) { 831 if (base + i < nr_cpu_ids) 832 if (cpu_online(base + i)) 833 break; 834 } 835 /* 836 * If this is the first CPU of the core to get online 837 * do an initial CPU reset. 838 */ 839 if (i > smp_cpu_mtid && 840 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 841 SIGP_CC_ORDER_CODE_ACCEPTED) 842 return -EIO; 843 844 rc = pcpu_alloc_lowcore(pcpu, cpu); 845 if (rc) 846 return rc; 847 pcpu_prepare_secondary(pcpu, cpu); 848 pcpu_attach_task(pcpu, tidle); 849 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 850 /* Wait until cpu puts itself in the online & active maps */ 851 while (!cpu_online(cpu)) 852 cpu_relax(); 853 return 0; 854 } 855 856 static unsigned int setup_possible_cpus __initdata; 857 858 static int __init _setup_possible_cpus(char *s) 859 { 860 get_option(&s, &setup_possible_cpus); 861 return 0; 862 } 863 early_param("possible_cpus", _setup_possible_cpus); 864 865 #ifdef CONFIG_HOTPLUG_CPU 866 867 int __cpu_disable(void) 868 { 869 unsigned long cregs[16]; 870 871 /* Handle possible pending IPIs */ 872 smp_handle_ext_call(); 873 set_cpu_online(smp_processor_id(), false); 874 /* Disable pseudo page faults on this cpu. */ 875 pfault_fini(); 876 /* Disable interrupt sources via control register. */ 877 __ctl_store(cregs, 0, 15); 878 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 879 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 880 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 881 __ctl_load(cregs, 0, 15); 882 clear_cpu_flag(CIF_NOHZ_DELAY); 883 return 0; 884 } 885 886 void __cpu_die(unsigned int cpu) 887 { 888 struct pcpu *pcpu; 889 890 /* Wait until target cpu is down */ 891 pcpu = pcpu_devices + cpu; 892 while (!pcpu_stopped(pcpu)) 893 cpu_relax(); 894 pcpu_free_lowcore(pcpu); 895 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 896 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 897 } 898 899 void __noreturn cpu_die(void) 900 { 901 idle_task_exit(); 902 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 903 for (;;) ; 904 } 905 906 #endif /* CONFIG_HOTPLUG_CPU */ 907 908 void __init smp_fill_possible_mask(void) 909 { 910 unsigned int possible, sclp_max, cpu; 911 912 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 913 sclp_max = min(smp_max_threads, sclp_max); 914 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 915 possible = setup_possible_cpus ?: nr_cpu_ids; 916 possible = min(possible, sclp_max); 917 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 918 set_cpu_possible(cpu, true); 919 } 920 921 void __init smp_prepare_cpus(unsigned int max_cpus) 922 { 923 unsigned long size; 924 925 /* request the 0x1201 emergency signal external interrupt */ 926 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 927 panic("Couldn't request external interrupt 0x1201"); 928 /* request the 0x1202 external call external interrupt */ 929 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 930 panic("Couldn't request external interrupt 0x1202"); 931 /* create slab cache for the machine-check-extended-save-areas */ 932 if (MACHINE_HAS_VX || MACHINE_HAS_GS) { 933 size = 1UL << (MACHINE_HAS_GS ? 11 : 10); 934 pcpu_mcesa_cache = kmem_cache_create("nmi_save_areas", 935 size, size, 0, NULL); 936 if (!pcpu_mcesa_cache) 937 panic("Couldn't create nmi save area cache"); 938 } 939 } 940 941 void __init smp_prepare_boot_cpu(void) 942 { 943 struct pcpu *pcpu = pcpu_devices; 944 945 WARN_ON(!cpu_present(0) || !cpu_online(0)); 946 pcpu->state = CPU_STATE_CONFIGURED; 947 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 948 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 949 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 950 } 951 952 void __init smp_cpus_done(unsigned int max_cpus) 953 { 954 } 955 956 void __init smp_setup_processor_id(void) 957 { 958 pcpu_devices[0].address = stap(); 959 S390_lowcore.cpu_nr = 0; 960 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 961 } 962 963 /* 964 * the frequency of the profiling timer can be changed 965 * by writing a multiplier value into /proc/profile. 966 * 967 * usually you want to run this on all CPUs ;) 968 */ 969 int setup_profiling_timer(unsigned int multiplier) 970 { 971 return 0; 972 } 973 974 #ifdef CONFIG_HOTPLUG_CPU 975 static ssize_t cpu_configure_show(struct device *dev, 976 struct device_attribute *attr, char *buf) 977 { 978 ssize_t count; 979 980 mutex_lock(&smp_cpu_state_mutex); 981 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 982 mutex_unlock(&smp_cpu_state_mutex); 983 return count; 984 } 985 986 static ssize_t cpu_configure_store(struct device *dev, 987 struct device_attribute *attr, 988 const char *buf, size_t count) 989 { 990 struct pcpu *pcpu; 991 int cpu, val, rc, i; 992 char delim; 993 994 if (sscanf(buf, "%d %c", &val, &delim) != 1) 995 return -EINVAL; 996 if (val != 0 && val != 1) 997 return -EINVAL; 998 get_online_cpus(); 999 mutex_lock(&smp_cpu_state_mutex); 1000 rc = -EBUSY; 1001 /* disallow configuration changes of online cpus and cpu 0 */ 1002 cpu = dev->id; 1003 cpu = smp_get_base_cpu(cpu); 1004 if (cpu == 0) 1005 goto out; 1006 for (i = 0; i <= smp_cpu_mtid; i++) 1007 if (cpu_online(cpu + i)) 1008 goto out; 1009 pcpu = pcpu_devices + cpu; 1010 rc = 0; 1011 switch (val) { 1012 case 0: 1013 if (pcpu->state != CPU_STATE_CONFIGURED) 1014 break; 1015 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1016 if (rc) 1017 break; 1018 for (i = 0; i <= smp_cpu_mtid; i++) { 1019 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1020 continue; 1021 pcpu[i].state = CPU_STATE_STANDBY; 1022 smp_cpu_set_polarization(cpu + i, 1023 POLARIZATION_UNKNOWN); 1024 } 1025 topology_expect_change(); 1026 break; 1027 case 1: 1028 if (pcpu->state != CPU_STATE_STANDBY) 1029 break; 1030 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1031 if (rc) 1032 break; 1033 for (i = 0; i <= smp_cpu_mtid; i++) { 1034 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1035 continue; 1036 pcpu[i].state = CPU_STATE_CONFIGURED; 1037 smp_cpu_set_polarization(cpu + i, 1038 POLARIZATION_UNKNOWN); 1039 } 1040 topology_expect_change(); 1041 break; 1042 default: 1043 break; 1044 } 1045 out: 1046 mutex_unlock(&smp_cpu_state_mutex); 1047 put_online_cpus(); 1048 return rc ? rc : count; 1049 } 1050 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1051 #endif /* CONFIG_HOTPLUG_CPU */ 1052 1053 static ssize_t show_cpu_address(struct device *dev, 1054 struct device_attribute *attr, char *buf) 1055 { 1056 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1057 } 1058 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1059 1060 static struct attribute *cpu_common_attrs[] = { 1061 #ifdef CONFIG_HOTPLUG_CPU 1062 &dev_attr_configure.attr, 1063 #endif 1064 &dev_attr_address.attr, 1065 NULL, 1066 }; 1067 1068 static struct attribute_group cpu_common_attr_group = { 1069 .attrs = cpu_common_attrs, 1070 }; 1071 1072 static struct attribute *cpu_online_attrs[] = { 1073 &dev_attr_idle_count.attr, 1074 &dev_attr_idle_time_us.attr, 1075 NULL, 1076 }; 1077 1078 static struct attribute_group cpu_online_attr_group = { 1079 .attrs = cpu_online_attrs, 1080 }; 1081 1082 static int smp_cpu_online(unsigned int cpu) 1083 { 1084 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1085 1086 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1087 } 1088 static int smp_cpu_pre_down(unsigned int cpu) 1089 { 1090 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1091 1092 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1093 return 0; 1094 } 1095 1096 static int smp_add_present_cpu(int cpu) 1097 { 1098 struct device *s; 1099 struct cpu *c; 1100 int rc; 1101 1102 c = kzalloc(sizeof(*c), GFP_KERNEL); 1103 if (!c) 1104 return -ENOMEM; 1105 per_cpu(cpu_device, cpu) = c; 1106 s = &c->dev; 1107 c->hotpluggable = 1; 1108 rc = register_cpu(c, cpu); 1109 if (rc) 1110 goto out; 1111 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1112 if (rc) 1113 goto out_cpu; 1114 rc = topology_cpu_init(c); 1115 if (rc) 1116 goto out_topology; 1117 return 0; 1118 1119 out_topology: 1120 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1121 out_cpu: 1122 #ifdef CONFIG_HOTPLUG_CPU 1123 unregister_cpu(c); 1124 #endif 1125 out: 1126 return rc; 1127 } 1128 1129 #ifdef CONFIG_HOTPLUG_CPU 1130 1131 int __ref smp_rescan_cpus(void) 1132 { 1133 struct sclp_core_info *info; 1134 int nr; 1135 1136 info = kzalloc(sizeof(*info), GFP_KERNEL); 1137 if (!info) 1138 return -ENOMEM; 1139 smp_get_core_info(info, 0); 1140 get_online_cpus(); 1141 mutex_lock(&smp_cpu_state_mutex); 1142 nr = __smp_rescan_cpus(info, 1); 1143 mutex_unlock(&smp_cpu_state_mutex); 1144 put_online_cpus(); 1145 kfree(info); 1146 if (nr) 1147 topology_schedule_update(); 1148 return 0; 1149 } 1150 1151 static ssize_t __ref rescan_store(struct device *dev, 1152 struct device_attribute *attr, 1153 const char *buf, 1154 size_t count) 1155 { 1156 int rc; 1157 1158 rc = smp_rescan_cpus(); 1159 return rc ? rc : count; 1160 } 1161 static DEVICE_ATTR(rescan, 0200, NULL, rescan_store); 1162 #endif /* CONFIG_HOTPLUG_CPU */ 1163 1164 static int __init s390_smp_init(void) 1165 { 1166 int cpu, rc = 0; 1167 1168 #ifdef CONFIG_HOTPLUG_CPU 1169 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1170 if (rc) 1171 return rc; 1172 #endif 1173 for_each_present_cpu(cpu) { 1174 rc = smp_add_present_cpu(cpu); 1175 if (rc) 1176 goto out; 1177 } 1178 1179 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1180 smp_cpu_online, smp_cpu_pre_down); 1181 out: 1182 return rc; 1183 } 1184 subsys_initcall(s390_smp_init); 1185