1 /* 2 * SMP related functions 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Denis Joseph Barrow, 6 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 7 * Heiko Carstens <heiko.carstens@de.ibm.com>, 8 * 9 * based on other smp stuff by 10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 11 * (c) 1998 Ingo Molnar 12 * 13 * The code outside of smp.c uses logical cpu numbers, only smp.c does 14 * the translation of logical to physical cpu ids. All new code that 15 * operates on physical cpu numbers needs to go into smp.c. 16 */ 17 18 #define KMSG_COMPONENT "cpu" 19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 20 21 #include <linux/workqueue.h> 22 #include <linux/module.h> 23 #include <linux/init.h> 24 #include <linux/mm.h> 25 #include <linux/err.h> 26 #include <linux/spinlock.h> 27 #include <linux/kernel_stat.h> 28 #include <linux/delay.h> 29 #include <linux/interrupt.h> 30 #include <linux/irqflags.h> 31 #include <linux/cpu.h> 32 #include <linux/slab.h> 33 #include <linux/crash_dump.h> 34 #include <asm/asm-offsets.h> 35 #include <asm/switch_to.h> 36 #include <asm/facility.h> 37 #include <asm/ipl.h> 38 #include <asm/setup.h> 39 #include <asm/irq.h> 40 #include <asm/tlbflush.h> 41 #include <asm/vtimer.h> 42 #include <asm/lowcore.h> 43 #include <asm/sclp.h> 44 #include <asm/vdso.h> 45 #include <asm/debug.h> 46 #include <asm/os_info.h> 47 #include <asm/sigp.h> 48 #include <asm/idle.h> 49 #include "entry.h" 50 51 enum { 52 ec_schedule = 0, 53 ec_call_function_single, 54 ec_stop_cpu, 55 }; 56 57 enum { 58 CPU_STATE_STANDBY, 59 CPU_STATE_CONFIGURED, 60 }; 61 62 static DEFINE_PER_CPU(struct cpu *, cpu_device); 63 64 struct pcpu { 65 struct _lowcore *lowcore; /* lowcore page(s) for the cpu */ 66 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 67 signed char state; /* physical cpu state */ 68 signed char polarization; /* physical polarization */ 69 u16 address; /* physical cpu address */ 70 }; 71 72 static u8 boot_cpu_type; 73 static struct pcpu pcpu_devices[NR_CPUS]; 74 75 unsigned int smp_cpu_mt_shift; 76 EXPORT_SYMBOL(smp_cpu_mt_shift); 77 78 unsigned int smp_cpu_mtid; 79 EXPORT_SYMBOL(smp_cpu_mtid); 80 81 static unsigned int smp_max_threads __initdata = -1U; 82 83 static int __init early_nosmt(char *s) 84 { 85 smp_max_threads = 1; 86 return 0; 87 } 88 early_param("nosmt", early_nosmt); 89 90 static int __init early_smt(char *s) 91 { 92 get_option(&s, &smp_max_threads); 93 return 0; 94 } 95 early_param("smt", early_smt); 96 97 /* 98 * The smp_cpu_state_mutex must be held when changing the state or polarization 99 * member of a pcpu data structure within the pcpu_devices arreay. 100 */ 101 DEFINE_MUTEX(smp_cpu_state_mutex); 102 103 /* 104 * Signal processor helper functions. 105 */ 106 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm, 107 u32 *status) 108 { 109 int cc; 110 111 while (1) { 112 cc = __pcpu_sigp(addr, order, parm, NULL); 113 if (cc != SIGP_CC_BUSY) 114 return cc; 115 cpu_relax(); 116 } 117 } 118 119 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 120 { 121 int cc, retry; 122 123 for (retry = 0; ; retry++) { 124 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 125 if (cc != SIGP_CC_BUSY) 126 break; 127 if (retry >= 3) 128 udelay(10); 129 } 130 return cc; 131 } 132 133 static inline int pcpu_stopped(struct pcpu *pcpu) 134 { 135 u32 uninitialized_var(status); 136 137 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 138 0, &status) != SIGP_CC_STATUS_STORED) 139 return 0; 140 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 141 } 142 143 static inline int pcpu_running(struct pcpu *pcpu) 144 { 145 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 146 0, NULL) != SIGP_CC_STATUS_STORED) 147 return 1; 148 /* Status stored condition code is equivalent to cpu not running. */ 149 return 0; 150 } 151 152 /* 153 * Find struct pcpu by cpu address. 154 */ 155 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 156 { 157 int cpu; 158 159 for_each_cpu(cpu, mask) 160 if (pcpu_devices[cpu].address == address) 161 return pcpu_devices + cpu; 162 return NULL; 163 } 164 165 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 166 { 167 int order; 168 169 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 170 return; 171 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 172 pcpu_sigp_retry(pcpu, order, 0); 173 } 174 175 #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 176 #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 177 178 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 179 { 180 unsigned long async_stack, panic_stack; 181 struct _lowcore *lc; 182 183 if (pcpu != &pcpu_devices[0]) { 184 pcpu->lowcore = (struct _lowcore *) 185 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 186 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); 187 panic_stack = __get_free_page(GFP_KERNEL); 188 if (!pcpu->lowcore || !panic_stack || !async_stack) 189 goto out; 190 } else { 191 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET; 192 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET; 193 } 194 lc = pcpu->lowcore; 195 memcpy(lc, &S390_lowcore, 512); 196 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 197 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET; 198 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET; 199 lc->cpu_nr = cpu; 200 lc->spinlock_lockval = arch_spin_lockval(cpu); 201 #ifndef CONFIG_64BIT 202 if (MACHINE_HAS_IEEE) { 203 lc->extended_save_area_addr = get_zeroed_page(GFP_KERNEL); 204 if (!lc->extended_save_area_addr) 205 goto out; 206 } 207 #else 208 if (MACHINE_HAS_VX) 209 lc->vector_save_area_addr = 210 (unsigned long) &lc->vector_save_area; 211 if (vdso_alloc_per_cpu(lc)) 212 goto out; 213 #endif 214 lowcore_ptr[cpu] = lc; 215 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 216 return 0; 217 out: 218 if (pcpu != &pcpu_devices[0]) { 219 free_page(panic_stack); 220 free_pages(async_stack, ASYNC_ORDER); 221 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 222 } 223 return -ENOMEM; 224 } 225 226 #ifdef CONFIG_HOTPLUG_CPU 227 228 static void pcpu_free_lowcore(struct pcpu *pcpu) 229 { 230 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 231 lowcore_ptr[pcpu - pcpu_devices] = NULL; 232 #ifndef CONFIG_64BIT 233 if (MACHINE_HAS_IEEE) { 234 struct _lowcore *lc = pcpu->lowcore; 235 236 free_page((unsigned long) lc->extended_save_area_addr); 237 lc->extended_save_area_addr = 0; 238 } 239 #else 240 vdso_free_per_cpu(pcpu->lowcore); 241 #endif 242 if (pcpu == &pcpu_devices[0]) 243 return; 244 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET); 245 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER); 246 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 247 } 248 249 #endif /* CONFIG_HOTPLUG_CPU */ 250 251 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 252 { 253 struct _lowcore *lc = pcpu->lowcore; 254 255 if (MACHINE_HAS_TLB_LC) 256 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 257 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 258 atomic_inc(&init_mm.context.attach_count); 259 lc->cpu_nr = cpu; 260 lc->spinlock_lockval = arch_spin_lockval(cpu); 261 lc->percpu_offset = __per_cpu_offset[cpu]; 262 lc->kernel_asce = S390_lowcore.kernel_asce; 263 lc->machine_flags = S390_lowcore.machine_flags; 264 lc->user_timer = lc->system_timer = lc->steal_timer = 0; 265 __ctl_store(lc->cregs_save_area, 0, 15); 266 save_access_regs((unsigned int *) lc->access_regs_save_area); 267 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 268 MAX_FACILITY_BIT/8); 269 } 270 271 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 272 { 273 struct _lowcore *lc = pcpu->lowcore; 274 struct thread_info *ti = task_thread_info(tsk); 275 276 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 277 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 278 lc->thread_info = (unsigned long) task_thread_info(tsk); 279 lc->current_task = (unsigned long) tsk; 280 lc->user_timer = ti->user_timer; 281 lc->system_timer = ti->system_timer; 282 lc->steal_timer = 0; 283 } 284 285 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 286 { 287 struct _lowcore *lc = pcpu->lowcore; 288 289 lc->restart_stack = lc->kernel_stack; 290 lc->restart_fn = (unsigned long) func; 291 lc->restart_data = (unsigned long) data; 292 lc->restart_source = -1UL; 293 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 294 } 295 296 /* 297 * Call function via PSW restart on pcpu and stop the current cpu. 298 */ 299 static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *), 300 void *data, unsigned long stack) 301 { 302 struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 303 unsigned long source_cpu = stap(); 304 305 __load_psw_mask(PSW_KERNEL_BITS); 306 if (pcpu->address == source_cpu) 307 func(data); /* should not return */ 308 /* Stop target cpu (if func returns this stops the current cpu). */ 309 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 310 /* Restart func on the target cpu and stop the current cpu. */ 311 mem_assign_absolute(lc->restart_stack, stack); 312 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 313 mem_assign_absolute(lc->restart_data, (unsigned long) data); 314 mem_assign_absolute(lc->restart_source, source_cpu); 315 asm volatile( 316 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 317 " brc 2,0b # busy, try again\n" 318 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 319 " brc 2,1b # busy, try again\n" 320 : : "d" (pcpu->address), "d" (source_cpu), 321 "K" (SIGP_RESTART), "K" (SIGP_STOP) 322 : "0", "1", "cc"); 323 for (;;) ; 324 } 325 326 /* 327 * Enable additional logical cpus for multi-threading. 328 */ 329 static int pcpu_set_smt(unsigned int mtid) 330 { 331 register unsigned long reg1 asm ("1") = (unsigned long) mtid; 332 int cc; 333 334 if (smp_cpu_mtid == mtid) 335 return 0; 336 asm volatile( 337 " sigp %1,0,%2 # sigp set multi-threading\n" 338 " ipm %0\n" 339 " srl %0,28\n" 340 : "=d" (cc) : "d" (reg1), "K" (SIGP_SET_MULTI_THREADING) 341 : "cc"); 342 if (cc == 0) { 343 smp_cpu_mtid = mtid; 344 smp_cpu_mt_shift = 0; 345 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 346 smp_cpu_mt_shift++; 347 pcpu_devices[0].address = stap(); 348 } 349 return cc; 350 } 351 352 /* 353 * Call function on an online CPU. 354 */ 355 void smp_call_online_cpu(void (*func)(void *), void *data) 356 { 357 struct pcpu *pcpu; 358 359 /* Use the current cpu if it is online. */ 360 pcpu = pcpu_find_address(cpu_online_mask, stap()); 361 if (!pcpu) 362 /* Use the first online cpu. */ 363 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 364 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 365 } 366 367 /* 368 * Call function on the ipl CPU. 369 */ 370 void smp_call_ipl_cpu(void (*func)(void *), void *data) 371 { 372 pcpu_delegate(&pcpu_devices[0], func, data, 373 pcpu_devices->lowcore->panic_stack - 374 PANIC_FRAME_OFFSET + PAGE_SIZE); 375 } 376 377 int smp_find_processor_id(u16 address) 378 { 379 int cpu; 380 381 for_each_present_cpu(cpu) 382 if (pcpu_devices[cpu].address == address) 383 return cpu; 384 return -1; 385 } 386 387 int smp_vcpu_scheduled(int cpu) 388 { 389 return pcpu_running(pcpu_devices + cpu); 390 } 391 392 void smp_yield_cpu(int cpu) 393 { 394 if (MACHINE_HAS_DIAG9C) 395 asm volatile("diag %0,0,0x9c" 396 : : "d" (pcpu_devices[cpu].address)); 397 else if (MACHINE_HAS_DIAG44) 398 asm volatile("diag 0,0,0x44"); 399 } 400 401 /* 402 * Send cpus emergency shutdown signal. This gives the cpus the 403 * opportunity to complete outstanding interrupts. 404 */ 405 static void smp_emergency_stop(cpumask_t *cpumask) 406 { 407 u64 end; 408 int cpu; 409 410 end = get_tod_clock() + (1000000UL << 12); 411 for_each_cpu(cpu, cpumask) { 412 struct pcpu *pcpu = pcpu_devices + cpu; 413 set_bit(ec_stop_cpu, &pcpu->ec_mask); 414 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 415 0, NULL) == SIGP_CC_BUSY && 416 get_tod_clock() < end) 417 cpu_relax(); 418 } 419 while (get_tod_clock() < end) { 420 for_each_cpu(cpu, cpumask) 421 if (pcpu_stopped(pcpu_devices + cpu)) 422 cpumask_clear_cpu(cpu, cpumask); 423 if (cpumask_empty(cpumask)) 424 break; 425 cpu_relax(); 426 } 427 } 428 429 /* 430 * Stop all cpus but the current one. 431 */ 432 void smp_send_stop(void) 433 { 434 cpumask_t cpumask; 435 int cpu; 436 437 /* Disable all interrupts/machine checks */ 438 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 439 trace_hardirqs_off(); 440 441 debug_set_critical(); 442 cpumask_copy(&cpumask, cpu_online_mask); 443 cpumask_clear_cpu(smp_processor_id(), &cpumask); 444 445 if (oops_in_progress) 446 smp_emergency_stop(&cpumask); 447 448 /* stop all processors */ 449 for_each_cpu(cpu, &cpumask) { 450 struct pcpu *pcpu = pcpu_devices + cpu; 451 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 452 while (!pcpu_stopped(pcpu)) 453 cpu_relax(); 454 } 455 } 456 457 /* 458 * This is the main routine where commands issued by other 459 * cpus are handled. 460 */ 461 static void smp_handle_ext_call(void) 462 { 463 unsigned long bits; 464 465 /* handle bit signal external calls */ 466 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 467 if (test_bit(ec_stop_cpu, &bits)) 468 smp_stop_cpu(); 469 if (test_bit(ec_schedule, &bits)) 470 scheduler_ipi(); 471 if (test_bit(ec_call_function_single, &bits)) 472 generic_smp_call_function_single_interrupt(); 473 } 474 475 static void do_ext_call_interrupt(struct ext_code ext_code, 476 unsigned int param32, unsigned long param64) 477 { 478 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 479 smp_handle_ext_call(); 480 } 481 482 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 483 { 484 int cpu; 485 486 for_each_cpu(cpu, mask) 487 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 488 } 489 490 void arch_send_call_function_single_ipi(int cpu) 491 { 492 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 493 } 494 495 #ifndef CONFIG_64BIT 496 /* 497 * this function sends a 'purge tlb' signal to another CPU. 498 */ 499 static void smp_ptlb_callback(void *info) 500 { 501 __tlb_flush_local(); 502 } 503 504 void smp_ptlb_all(void) 505 { 506 on_each_cpu(smp_ptlb_callback, NULL, 1); 507 } 508 EXPORT_SYMBOL(smp_ptlb_all); 509 #endif /* ! CONFIG_64BIT */ 510 511 /* 512 * this function sends a 'reschedule' IPI to another CPU. 513 * it goes straight through and wastes no time serializing 514 * anything. Worst case is that we lose a reschedule ... 515 */ 516 void smp_send_reschedule(int cpu) 517 { 518 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 519 } 520 521 /* 522 * parameter area for the set/clear control bit callbacks 523 */ 524 struct ec_creg_mask_parms { 525 unsigned long orval; 526 unsigned long andval; 527 int cr; 528 }; 529 530 /* 531 * callback for setting/clearing control bits 532 */ 533 static void smp_ctl_bit_callback(void *info) 534 { 535 struct ec_creg_mask_parms *pp = info; 536 unsigned long cregs[16]; 537 538 __ctl_store(cregs, 0, 15); 539 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 540 __ctl_load(cregs, 0, 15); 541 } 542 543 /* 544 * Set a bit in a control register of all cpus 545 */ 546 void smp_ctl_set_bit(int cr, int bit) 547 { 548 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 549 550 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 551 } 552 EXPORT_SYMBOL(smp_ctl_set_bit); 553 554 /* 555 * Clear a bit in a control register of all cpus 556 */ 557 void smp_ctl_clear_bit(int cr, int bit) 558 { 559 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 560 561 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 562 } 563 EXPORT_SYMBOL(smp_ctl_clear_bit); 564 565 #ifdef CONFIG_CRASH_DUMP 566 567 static inline void __smp_store_cpu_state(int cpu, u16 address, int is_boot_cpu) 568 { 569 void *lc = pcpu_devices[0].lowcore; 570 struct save_area_ext *sa_ext; 571 unsigned long vx_sa; 572 573 sa_ext = dump_save_area_create(cpu); 574 if (!sa_ext) 575 panic("could not allocate memory for save area\n"); 576 if (is_boot_cpu) { 577 /* Copy the registers of the boot CPU. */ 578 copy_oldmem_page(1, (void *) &sa_ext->sa, sizeof(sa_ext->sa), 579 SAVE_AREA_BASE - PAGE_SIZE, 0); 580 if (MACHINE_HAS_VX) 581 save_vx_regs_safe(sa_ext->vx_regs); 582 return; 583 } 584 /* Get the registers of a non-boot cpu. */ 585 __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL); 586 memcpy_real(&sa_ext->sa, lc + SAVE_AREA_BASE, sizeof(sa_ext->sa)); 587 if (!MACHINE_HAS_VX) 588 return; 589 /* Get the VX registers */ 590 vx_sa = __get_free_page(GFP_KERNEL); 591 if (!vx_sa) 592 panic("could not allocate memory for VX save area\n"); 593 __pcpu_sigp_relax(address, SIGP_STORE_ADDITIONAL_STATUS, vx_sa, NULL); 594 memcpy(sa_ext->vx_regs, (void *) vx_sa, sizeof(sa_ext->vx_regs)); 595 free_page(vx_sa); 596 } 597 598 /* 599 * Collect CPU state of the previous, crashed system. 600 * There are four cases: 601 * 1) standard zfcp dump 602 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 603 * The state for all CPUs except the boot CPU needs to be collected 604 * with sigp stop-and-store-status. The boot CPU state is located in 605 * the absolute lowcore of the memory stored in the HSA. The zcore code 606 * will allocate the save area and copy the boot CPU state from the HSA. 607 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 608 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 609 * The state for all CPUs except the boot CPU needs to be collected 610 * with sigp stop-and-store-status. The firmware or the boot-loader 611 * stored the registers of the boot CPU in the absolute lowcore in the 612 * memory of the old system. 613 * 3) kdump and the old kernel did not store the CPU state, 614 * or stand-alone kdump for DASD 615 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 616 * The state for all CPUs except the boot CPU needs to be collected 617 * with sigp stop-and-store-status. The kexec code or the boot-loader 618 * stored the registers of the boot CPU in the memory of the old system. 619 * 4) kdump and the old kernel stored the CPU state 620 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 621 * The state of all CPUs is stored in ELF sections in the memory of the 622 * old system. The ELF sections are picked up by the crash_dump code 623 * via elfcorehdr_addr. 624 */ 625 static void __init smp_store_cpu_states(struct sclp_cpu_info *info) 626 { 627 unsigned int cpu, address, i, j; 628 int is_boot_cpu; 629 630 if (is_kdump_kernel()) 631 /* Previous system stored the CPU states. Nothing to do. */ 632 return; 633 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 634 /* No previous system present, normal boot. */ 635 return; 636 /* Set multi-threading state to the previous system. */ 637 pcpu_set_smt(sclp_get_mtid_prev()); 638 /* Collect CPU states. */ 639 cpu = 0; 640 for (i = 0; i < info->configured; i++) { 641 /* Skip CPUs with different CPU type. */ 642 if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type) 643 continue; 644 for (j = 0; j <= smp_cpu_mtid; j++, cpu++) { 645 address = (info->cpu[i].core_id << smp_cpu_mt_shift) + j; 646 is_boot_cpu = (address == pcpu_devices[0].address); 647 if (is_boot_cpu && !OLDMEM_BASE) 648 /* Skip boot CPU for standard zfcp dump. */ 649 continue; 650 /* Get state for this CPu. */ 651 __smp_store_cpu_state(cpu, address, is_boot_cpu); 652 } 653 } 654 } 655 656 int smp_store_status(int cpu) 657 { 658 unsigned long vx_sa; 659 struct pcpu *pcpu; 660 661 pcpu = pcpu_devices + cpu; 662 if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS, 663 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED) 664 return -EIO; 665 if (!MACHINE_HAS_VX) 666 return 0; 667 vx_sa = __pa(pcpu->lowcore->vector_save_area_addr); 668 __pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 669 vx_sa, NULL); 670 return 0; 671 } 672 673 #endif /* CONFIG_CRASH_DUMP */ 674 675 void smp_cpu_set_polarization(int cpu, int val) 676 { 677 pcpu_devices[cpu].polarization = val; 678 } 679 680 int smp_cpu_get_polarization(int cpu) 681 { 682 return pcpu_devices[cpu].polarization; 683 } 684 685 static struct sclp_cpu_info *smp_get_cpu_info(void) 686 { 687 static int use_sigp_detection; 688 struct sclp_cpu_info *info; 689 int address; 690 691 info = kzalloc(sizeof(*info), GFP_KERNEL); 692 if (info && (use_sigp_detection || sclp_get_cpu_info(info))) { 693 use_sigp_detection = 1; 694 for (address = 0; address <= MAX_CPU_ADDRESS; 695 address += (1U << smp_cpu_mt_shift)) { 696 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) == 697 SIGP_CC_NOT_OPERATIONAL) 698 continue; 699 info->cpu[info->configured].core_id = 700 address >> smp_cpu_mt_shift; 701 info->configured++; 702 } 703 info->combined = info->configured; 704 } 705 return info; 706 } 707 708 static int smp_add_present_cpu(int cpu); 709 710 static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add) 711 { 712 struct pcpu *pcpu; 713 cpumask_t avail; 714 int cpu, nr, i, j; 715 u16 address; 716 717 nr = 0; 718 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 719 cpu = cpumask_first(&avail); 720 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 721 if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type) 722 continue; 723 address = info->cpu[i].core_id << smp_cpu_mt_shift; 724 for (j = 0; j <= smp_cpu_mtid; j++) { 725 if (pcpu_find_address(cpu_present_mask, address + j)) 726 continue; 727 pcpu = pcpu_devices + cpu; 728 pcpu->address = address + j; 729 pcpu->state = 730 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 731 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 732 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 733 set_cpu_present(cpu, true); 734 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 735 set_cpu_present(cpu, false); 736 else 737 nr++; 738 cpu = cpumask_next(cpu, &avail); 739 if (cpu >= nr_cpu_ids) 740 break; 741 } 742 } 743 return nr; 744 } 745 746 static void __init smp_detect_cpus(void) 747 { 748 unsigned int cpu, mtid, c_cpus, s_cpus; 749 struct sclp_cpu_info *info; 750 u16 address; 751 752 /* Get CPU information */ 753 info = smp_get_cpu_info(); 754 if (!info) 755 panic("smp_detect_cpus failed to allocate memory\n"); 756 757 /* Find boot CPU type */ 758 if (info->has_cpu_type) { 759 address = stap(); 760 for (cpu = 0; cpu < info->combined; cpu++) 761 if (info->cpu[cpu].core_id == address) { 762 /* The boot cpu dictates the cpu type. */ 763 boot_cpu_type = info->cpu[cpu].type; 764 break; 765 } 766 if (cpu >= info->combined) 767 panic("Could not find boot CPU type"); 768 } 769 770 #ifdef CONFIG_CRASH_DUMP 771 /* Collect CPU state of previous system */ 772 smp_store_cpu_states(info); 773 #endif 774 775 /* Set multi-threading state for the current system */ 776 mtid = sclp_get_mtid(boot_cpu_type); 777 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 778 pcpu_set_smt(mtid); 779 780 /* Print number of CPUs */ 781 c_cpus = s_cpus = 0; 782 for (cpu = 0; cpu < info->combined; cpu++) { 783 if (info->has_cpu_type && info->cpu[cpu].type != boot_cpu_type) 784 continue; 785 if (cpu < info->configured) 786 c_cpus += smp_cpu_mtid + 1; 787 else 788 s_cpus += smp_cpu_mtid + 1; 789 } 790 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 791 792 /* Add CPUs present at boot */ 793 get_online_cpus(); 794 __smp_rescan_cpus(info, 0); 795 put_online_cpus(); 796 kfree(info); 797 } 798 799 /* 800 * Activate a secondary processor. 801 */ 802 static void smp_start_secondary(void *cpuvoid) 803 { 804 S390_lowcore.last_update_clock = get_tod_clock(); 805 S390_lowcore.restart_stack = (unsigned long) restart_stack; 806 S390_lowcore.restart_fn = (unsigned long) do_restart; 807 S390_lowcore.restart_data = 0; 808 S390_lowcore.restart_source = -1UL; 809 restore_access_regs(S390_lowcore.access_regs_save_area); 810 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 811 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 812 cpu_init(); 813 preempt_disable(); 814 init_cpu_timer(); 815 vtime_init(); 816 pfault_init(); 817 notify_cpu_starting(smp_processor_id()); 818 set_cpu_online(smp_processor_id(), true); 819 inc_irq_stat(CPU_RST); 820 local_irq_enable(); 821 cpu_startup_entry(CPUHP_ONLINE); 822 } 823 824 /* Upping and downing of CPUs */ 825 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 826 { 827 struct pcpu *pcpu; 828 int base, i, rc; 829 830 pcpu = pcpu_devices + cpu; 831 if (pcpu->state != CPU_STATE_CONFIGURED) 832 return -EIO; 833 base = cpu - (cpu % (smp_cpu_mtid + 1)); 834 for (i = 0; i <= smp_cpu_mtid; i++) { 835 if (base + i < nr_cpu_ids) 836 if (cpu_online(base + i)) 837 break; 838 } 839 /* 840 * If this is the first CPU of the core to get online 841 * do an initial CPU reset. 842 */ 843 if (i > smp_cpu_mtid && 844 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 845 SIGP_CC_ORDER_CODE_ACCEPTED) 846 return -EIO; 847 848 rc = pcpu_alloc_lowcore(pcpu, cpu); 849 if (rc) 850 return rc; 851 pcpu_prepare_secondary(pcpu, cpu); 852 pcpu_attach_task(pcpu, tidle); 853 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 854 while (!cpu_online(cpu)) 855 cpu_relax(); 856 return 0; 857 } 858 859 static unsigned int setup_possible_cpus __initdata; 860 861 static int __init _setup_possible_cpus(char *s) 862 { 863 get_option(&s, &setup_possible_cpus); 864 return 0; 865 } 866 early_param("possible_cpus", _setup_possible_cpus); 867 868 #ifdef CONFIG_HOTPLUG_CPU 869 870 int __cpu_disable(void) 871 { 872 unsigned long cregs[16]; 873 874 /* Handle possible pending IPIs */ 875 smp_handle_ext_call(); 876 set_cpu_online(smp_processor_id(), false); 877 /* Disable pseudo page faults on this cpu. */ 878 pfault_fini(); 879 /* Disable interrupt sources via control register. */ 880 __ctl_store(cregs, 0, 15); 881 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 882 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 883 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 884 __ctl_load(cregs, 0, 15); 885 clear_cpu_flag(CIF_NOHZ_DELAY); 886 return 0; 887 } 888 889 void __cpu_die(unsigned int cpu) 890 { 891 struct pcpu *pcpu; 892 893 /* Wait until target cpu is down */ 894 pcpu = pcpu_devices + cpu; 895 while (!pcpu_stopped(pcpu)) 896 cpu_relax(); 897 pcpu_free_lowcore(pcpu); 898 atomic_dec(&init_mm.context.attach_count); 899 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 900 if (MACHINE_HAS_TLB_LC) 901 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 902 } 903 904 void __noreturn cpu_die(void) 905 { 906 idle_task_exit(); 907 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 908 for (;;) ; 909 } 910 911 #endif /* CONFIG_HOTPLUG_CPU */ 912 913 void __init smp_fill_possible_mask(void) 914 { 915 unsigned int possible, sclp, cpu; 916 917 sclp = min(smp_max_threads, sclp_get_mtid_max() + 1); 918 sclp = sclp_get_max_cpu()*sclp ?: nr_cpu_ids; 919 possible = setup_possible_cpus ?: nr_cpu_ids; 920 possible = min(possible, sclp); 921 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 922 set_cpu_possible(cpu, true); 923 } 924 925 void __init smp_prepare_cpus(unsigned int max_cpus) 926 { 927 /* request the 0x1201 emergency signal external interrupt */ 928 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 929 panic("Couldn't request external interrupt 0x1201"); 930 /* request the 0x1202 external call external interrupt */ 931 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 932 panic("Couldn't request external interrupt 0x1202"); 933 smp_detect_cpus(); 934 } 935 936 void __init smp_prepare_boot_cpu(void) 937 { 938 struct pcpu *pcpu = pcpu_devices; 939 940 pcpu->state = CPU_STATE_CONFIGURED; 941 pcpu->address = stap(); 942 pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix(); 943 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 944 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 945 set_cpu_present(0, true); 946 set_cpu_online(0, true); 947 } 948 949 void __init smp_cpus_done(unsigned int max_cpus) 950 { 951 } 952 953 void __init smp_setup_processor_id(void) 954 { 955 S390_lowcore.cpu_nr = 0; 956 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 957 } 958 959 /* 960 * the frequency of the profiling timer can be changed 961 * by writing a multiplier value into /proc/profile. 962 * 963 * usually you want to run this on all CPUs ;) 964 */ 965 int setup_profiling_timer(unsigned int multiplier) 966 { 967 return 0; 968 } 969 970 #ifdef CONFIG_HOTPLUG_CPU 971 static ssize_t cpu_configure_show(struct device *dev, 972 struct device_attribute *attr, char *buf) 973 { 974 ssize_t count; 975 976 mutex_lock(&smp_cpu_state_mutex); 977 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 978 mutex_unlock(&smp_cpu_state_mutex); 979 return count; 980 } 981 982 static ssize_t cpu_configure_store(struct device *dev, 983 struct device_attribute *attr, 984 const char *buf, size_t count) 985 { 986 struct pcpu *pcpu; 987 int cpu, val, rc, i; 988 char delim; 989 990 if (sscanf(buf, "%d %c", &val, &delim) != 1) 991 return -EINVAL; 992 if (val != 0 && val != 1) 993 return -EINVAL; 994 get_online_cpus(); 995 mutex_lock(&smp_cpu_state_mutex); 996 rc = -EBUSY; 997 /* disallow configuration changes of online cpus and cpu 0 */ 998 cpu = dev->id; 999 cpu -= cpu % (smp_cpu_mtid + 1); 1000 if (cpu == 0) 1001 goto out; 1002 for (i = 0; i <= smp_cpu_mtid; i++) 1003 if (cpu_online(cpu + i)) 1004 goto out; 1005 pcpu = pcpu_devices + cpu; 1006 rc = 0; 1007 switch (val) { 1008 case 0: 1009 if (pcpu->state != CPU_STATE_CONFIGURED) 1010 break; 1011 rc = sclp_cpu_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1012 if (rc) 1013 break; 1014 for (i = 0; i <= smp_cpu_mtid; i++) { 1015 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1016 continue; 1017 pcpu[i].state = CPU_STATE_STANDBY; 1018 smp_cpu_set_polarization(cpu + i, 1019 POLARIZATION_UNKNOWN); 1020 } 1021 topology_expect_change(); 1022 break; 1023 case 1: 1024 if (pcpu->state != CPU_STATE_STANDBY) 1025 break; 1026 rc = sclp_cpu_configure(pcpu->address >> smp_cpu_mt_shift); 1027 if (rc) 1028 break; 1029 for (i = 0; i <= smp_cpu_mtid; i++) { 1030 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1031 continue; 1032 pcpu[i].state = CPU_STATE_CONFIGURED; 1033 smp_cpu_set_polarization(cpu + i, 1034 POLARIZATION_UNKNOWN); 1035 } 1036 topology_expect_change(); 1037 break; 1038 default: 1039 break; 1040 } 1041 out: 1042 mutex_unlock(&smp_cpu_state_mutex); 1043 put_online_cpus(); 1044 return rc ? rc : count; 1045 } 1046 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1047 #endif /* CONFIG_HOTPLUG_CPU */ 1048 1049 static ssize_t show_cpu_address(struct device *dev, 1050 struct device_attribute *attr, char *buf) 1051 { 1052 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1053 } 1054 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1055 1056 static struct attribute *cpu_common_attrs[] = { 1057 #ifdef CONFIG_HOTPLUG_CPU 1058 &dev_attr_configure.attr, 1059 #endif 1060 &dev_attr_address.attr, 1061 NULL, 1062 }; 1063 1064 static struct attribute_group cpu_common_attr_group = { 1065 .attrs = cpu_common_attrs, 1066 }; 1067 1068 static struct attribute *cpu_online_attrs[] = { 1069 &dev_attr_idle_count.attr, 1070 &dev_attr_idle_time_us.attr, 1071 NULL, 1072 }; 1073 1074 static struct attribute_group cpu_online_attr_group = { 1075 .attrs = cpu_online_attrs, 1076 }; 1077 1078 static int smp_cpu_notify(struct notifier_block *self, unsigned long action, 1079 void *hcpu) 1080 { 1081 unsigned int cpu = (unsigned int)(long)hcpu; 1082 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1083 int err = 0; 1084 1085 switch (action & ~CPU_TASKS_FROZEN) { 1086 case CPU_ONLINE: 1087 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1088 break; 1089 case CPU_DEAD: 1090 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1091 break; 1092 } 1093 return notifier_from_errno(err); 1094 } 1095 1096 static int smp_add_present_cpu(int cpu) 1097 { 1098 struct device *s; 1099 struct cpu *c; 1100 int rc; 1101 1102 c = kzalloc(sizeof(*c), GFP_KERNEL); 1103 if (!c) 1104 return -ENOMEM; 1105 per_cpu(cpu_device, cpu) = c; 1106 s = &c->dev; 1107 c->hotpluggable = 1; 1108 rc = register_cpu(c, cpu); 1109 if (rc) 1110 goto out; 1111 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1112 if (rc) 1113 goto out_cpu; 1114 if (cpu_online(cpu)) { 1115 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1116 if (rc) 1117 goto out_online; 1118 } 1119 rc = topology_cpu_init(c); 1120 if (rc) 1121 goto out_topology; 1122 return 0; 1123 1124 out_topology: 1125 if (cpu_online(cpu)) 1126 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1127 out_online: 1128 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1129 out_cpu: 1130 #ifdef CONFIG_HOTPLUG_CPU 1131 unregister_cpu(c); 1132 #endif 1133 out: 1134 return rc; 1135 } 1136 1137 #ifdef CONFIG_HOTPLUG_CPU 1138 1139 int __ref smp_rescan_cpus(void) 1140 { 1141 struct sclp_cpu_info *info; 1142 int nr; 1143 1144 info = smp_get_cpu_info(); 1145 if (!info) 1146 return -ENOMEM; 1147 get_online_cpus(); 1148 mutex_lock(&smp_cpu_state_mutex); 1149 nr = __smp_rescan_cpus(info, 1); 1150 mutex_unlock(&smp_cpu_state_mutex); 1151 put_online_cpus(); 1152 kfree(info); 1153 if (nr) 1154 topology_schedule_update(); 1155 return 0; 1156 } 1157 1158 static ssize_t __ref rescan_store(struct device *dev, 1159 struct device_attribute *attr, 1160 const char *buf, 1161 size_t count) 1162 { 1163 int rc; 1164 1165 rc = smp_rescan_cpus(); 1166 return rc ? rc : count; 1167 } 1168 static DEVICE_ATTR(rescan, 0200, NULL, rescan_store); 1169 #endif /* CONFIG_HOTPLUG_CPU */ 1170 1171 static int __init s390_smp_init(void) 1172 { 1173 int cpu, rc = 0; 1174 1175 #ifdef CONFIG_HOTPLUG_CPU 1176 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1177 if (rc) 1178 return rc; 1179 #endif 1180 cpu_notifier_register_begin(); 1181 for_each_present_cpu(cpu) { 1182 rc = smp_add_present_cpu(cpu); 1183 if (rc) 1184 goto out; 1185 } 1186 1187 __hotcpu_notifier(smp_cpu_notify, 0); 1188 1189 out: 1190 cpu_notifier_register_done(); 1191 return rc; 1192 } 1193 subsys_initcall(s390_smp_init); 1194