1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Heiko Carstens <heiko.carstens@de.ibm.com>, 9 * 10 * based on other smp stuff by 11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 12 * (c) 1998 Ingo Molnar 13 * 14 * The code outside of smp.c uses logical cpu numbers, only smp.c does 15 * the translation of logical to physical cpu ids. All new code that 16 * operates on physical cpu numbers needs to go into smp.c. 17 */ 18 19 #define KMSG_COMPONENT "cpu" 20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 21 22 #include <linux/workqueue.h> 23 #include <linux/memblock.h> 24 #include <linux/export.h> 25 #include <linux/init.h> 26 #include <linux/mm.h> 27 #include <linux/err.h> 28 #include <linux/spinlock.h> 29 #include <linux/kernel_stat.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/irqflags.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/kprobes.h> 39 #include <asm/asm-offsets.h> 40 #include <asm/diag.h> 41 #include <asm/switch_to.h> 42 #include <asm/facility.h> 43 #include <asm/ipl.h> 44 #include <asm/setup.h> 45 #include <asm/irq.h> 46 #include <asm/tlbflush.h> 47 #include <asm/vtimer.h> 48 #include <asm/lowcore.h> 49 #include <asm/sclp.h> 50 #include <asm/vdso.h> 51 #include <asm/debug.h> 52 #include <asm/os_info.h> 53 #include <asm/sigp.h> 54 #include <asm/idle.h> 55 #include <asm/nmi.h> 56 #include <asm/stacktrace.h> 57 #include <asm/topology.h> 58 #include "entry.h" 59 60 enum { 61 ec_schedule = 0, 62 ec_call_function_single, 63 ec_stop_cpu, 64 ec_mcck_pending, 65 }; 66 67 enum { 68 CPU_STATE_STANDBY, 69 CPU_STATE_CONFIGURED, 70 }; 71 72 static DEFINE_PER_CPU(struct cpu *, cpu_device); 73 74 struct pcpu { 75 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 76 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 77 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 78 signed char state; /* physical cpu state */ 79 signed char polarization; /* physical polarization */ 80 u16 address; /* physical cpu address */ 81 }; 82 83 static u8 boot_core_type; 84 static struct pcpu pcpu_devices[NR_CPUS]; 85 86 unsigned int smp_cpu_mt_shift; 87 EXPORT_SYMBOL(smp_cpu_mt_shift); 88 89 unsigned int smp_cpu_mtid; 90 EXPORT_SYMBOL(smp_cpu_mtid); 91 92 #ifdef CONFIG_CRASH_DUMP 93 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 94 #endif 95 96 static unsigned int smp_max_threads __initdata = -1U; 97 98 static int __init early_nosmt(char *s) 99 { 100 smp_max_threads = 1; 101 return 0; 102 } 103 early_param("nosmt", early_nosmt); 104 105 static int __init early_smt(char *s) 106 { 107 get_option(&s, &smp_max_threads); 108 return 0; 109 } 110 early_param("smt", early_smt); 111 112 /* 113 * The smp_cpu_state_mutex must be held when changing the state or polarization 114 * member of a pcpu data structure within the pcpu_devices arreay. 115 */ 116 DEFINE_MUTEX(smp_cpu_state_mutex); 117 118 /* 119 * Signal processor helper functions. 120 */ 121 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 122 { 123 int cc; 124 125 while (1) { 126 cc = __pcpu_sigp(addr, order, parm, NULL); 127 if (cc != SIGP_CC_BUSY) 128 return cc; 129 cpu_relax(); 130 } 131 } 132 133 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 134 { 135 int cc, retry; 136 137 for (retry = 0; ; retry++) { 138 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 139 if (cc != SIGP_CC_BUSY) 140 break; 141 if (retry >= 3) 142 udelay(10); 143 } 144 return cc; 145 } 146 147 static inline int pcpu_stopped(struct pcpu *pcpu) 148 { 149 u32 uninitialized_var(status); 150 151 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 152 0, &status) != SIGP_CC_STATUS_STORED) 153 return 0; 154 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 155 } 156 157 static inline int pcpu_running(struct pcpu *pcpu) 158 { 159 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 160 0, NULL) != SIGP_CC_STATUS_STORED) 161 return 1; 162 /* Status stored condition code is equivalent to cpu not running. */ 163 return 0; 164 } 165 166 /* 167 * Find struct pcpu by cpu address. 168 */ 169 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 170 { 171 int cpu; 172 173 for_each_cpu(cpu, mask) 174 if (pcpu_devices[cpu].address == address) 175 return pcpu_devices + cpu; 176 return NULL; 177 } 178 179 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 180 { 181 int order; 182 183 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 184 return; 185 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 186 pcpu->ec_clk = get_tod_clock_fast(); 187 pcpu_sigp_retry(pcpu, order, 0); 188 } 189 190 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 191 { 192 unsigned long async_stack, nodat_stack; 193 struct lowcore *lc; 194 195 if (pcpu != &pcpu_devices[0]) { 196 pcpu->lowcore = (struct lowcore *) 197 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 198 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 199 if (!pcpu->lowcore || !nodat_stack) 200 goto out; 201 } else { 202 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 203 } 204 async_stack = stack_alloc(); 205 if (!async_stack) 206 goto out; 207 lc = pcpu->lowcore; 208 memcpy(lc, &S390_lowcore, 512); 209 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 210 lc->async_stack = async_stack + STACK_INIT_OFFSET; 211 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET; 212 lc->cpu_nr = cpu; 213 lc->spinlock_lockval = arch_spin_lockval(cpu); 214 lc->spinlock_index = 0; 215 lc->br_r1_trampoline = 0x07f1; /* br %r1 */ 216 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW); 217 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW); 218 if (nmi_alloc_per_cpu(lc)) 219 goto out_async; 220 if (vdso_alloc_per_cpu(lc)) 221 goto out_mcesa; 222 lowcore_ptr[cpu] = lc; 223 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 224 return 0; 225 226 out_mcesa: 227 nmi_free_per_cpu(lc); 228 out_async: 229 stack_free(async_stack); 230 out: 231 if (pcpu != &pcpu_devices[0]) { 232 free_pages(nodat_stack, THREAD_SIZE_ORDER); 233 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 234 } 235 return -ENOMEM; 236 } 237 238 static void pcpu_free_lowcore(struct pcpu *pcpu) 239 { 240 unsigned long async_stack, nodat_stack, lowcore; 241 242 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 243 async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET; 244 lowcore = (unsigned long) pcpu->lowcore; 245 246 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 247 lowcore_ptr[pcpu - pcpu_devices] = NULL; 248 vdso_free_per_cpu(pcpu->lowcore); 249 nmi_free_per_cpu(pcpu->lowcore); 250 stack_free(async_stack); 251 if (pcpu == &pcpu_devices[0]) 252 return; 253 free_pages(nodat_stack, THREAD_SIZE_ORDER); 254 free_pages(lowcore, LC_ORDER); 255 } 256 257 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 258 { 259 struct lowcore *lc = pcpu->lowcore; 260 261 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 262 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 263 lc->cpu_nr = cpu; 264 lc->spinlock_lockval = arch_spin_lockval(cpu); 265 lc->spinlock_index = 0; 266 lc->percpu_offset = __per_cpu_offset[cpu]; 267 lc->kernel_asce = S390_lowcore.kernel_asce; 268 lc->user_asce = S390_lowcore.kernel_asce; 269 lc->machine_flags = S390_lowcore.machine_flags; 270 lc->user_timer = lc->system_timer = 271 lc->steal_timer = lc->avg_steal_timer = 0; 272 __ctl_store(lc->cregs_save_area, 0, 15); 273 lc->cregs_save_area[1] = lc->kernel_asce; 274 lc->cregs_save_area[7] = lc->vdso_asce; 275 save_access_regs((unsigned int *) lc->access_regs_save_area); 276 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 277 sizeof(lc->stfle_fac_list)); 278 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list, 279 sizeof(lc->alt_stfle_fac_list)); 280 arch_spin_lock_setup(cpu); 281 } 282 283 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 284 { 285 struct lowcore *lc = pcpu->lowcore; 286 287 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 288 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 289 lc->current_task = (unsigned long) tsk; 290 lc->lpp = LPP_MAGIC; 291 lc->current_pid = tsk->pid; 292 lc->user_timer = tsk->thread.user_timer; 293 lc->guest_timer = tsk->thread.guest_timer; 294 lc->system_timer = tsk->thread.system_timer; 295 lc->hardirq_timer = tsk->thread.hardirq_timer; 296 lc->softirq_timer = tsk->thread.softirq_timer; 297 lc->steal_timer = 0; 298 } 299 300 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 301 { 302 struct lowcore *lc = pcpu->lowcore; 303 304 lc->restart_stack = lc->nodat_stack; 305 lc->restart_fn = (unsigned long) func; 306 lc->restart_data = (unsigned long) data; 307 lc->restart_source = -1UL; 308 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 309 } 310 311 /* 312 * Call function via PSW restart on pcpu and stop the current cpu. 313 */ 314 static void __pcpu_delegate(void (*func)(void*), void *data) 315 { 316 func(data); /* should not return */ 317 } 318 319 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu, 320 void (*func)(void *), 321 void *data, unsigned long stack) 322 { 323 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 324 unsigned long source_cpu = stap(); 325 326 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 327 if (pcpu->address == source_cpu) 328 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data); 329 /* Stop target cpu (if func returns this stops the current cpu). */ 330 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 331 /* Restart func on the target cpu and stop the current cpu. */ 332 mem_assign_absolute(lc->restart_stack, stack); 333 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 334 mem_assign_absolute(lc->restart_data, (unsigned long) data); 335 mem_assign_absolute(lc->restart_source, source_cpu); 336 __bpon(); 337 asm volatile( 338 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 339 " brc 2,0b # busy, try again\n" 340 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 341 " brc 2,1b # busy, try again\n" 342 : : "d" (pcpu->address), "d" (source_cpu), 343 "K" (SIGP_RESTART), "K" (SIGP_STOP) 344 : "0", "1", "cc"); 345 for (;;) ; 346 } 347 348 /* 349 * Enable additional logical cpus for multi-threading. 350 */ 351 static int pcpu_set_smt(unsigned int mtid) 352 { 353 int cc; 354 355 if (smp_cpu_mtid == mtid) 356 return 0; 357 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 358 if (cc == 0) { 359 smp_cpu_mtid = mtid; 360 smp_cpu_mt_shift = 0; 361 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 362 smp_cpu_mt_shift++; 363 pcpu_devices[0].address = stap(); 364 } 365 return cc; 366 } 367 368 /* 369 * Call function on an online CPU. 370 */ 371 void smp_call_online_cpu(void (*func)(void *), void *data) 372 { 373 struct pcpu *pcpu; 374 375 /* Use the current cpu if it is online. */ 376 pcpu = pcpu_find_address(cpu_online_mask, stap()); 377 if (!pcpu) 378 /* Use the first online cpu. */ 379 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 380 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 381 } 382 383 /* 384 * Call function on the ipl CPU. 385 */ 386 void smp_call_ipl_cpu(void (*func)(void *), void *data) 387 { 388 struct lowcore *lc = pcpu_devices->lowcore; 389 390 if (pcpu_devices[0].address == stap()) 391 lc = &S390_lowcore; 392 393 pcpu_delegate(&pcpu_devices[0], func, data, 394 lc->nodat_stack); 395 } 396 397 int smp_find_processor_id(u16 address) 398 { 399 int cpu; 400 401 for_each_present_cpu(cpu) 402 if (pcpu_devices[cpu].address == address) 403 return cpu; 404 return -1; 405 } 406 407 void schedule_mcck_handler(void) 408 { 409 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending); 410 } 411 412 bool notrace arch_vcpu_is_preempted(int cpu) 413 { 414 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 415 return false; 416 if (pcpu_running(pcpu_devices + cpu)) 417 return false; 418 return true; 419 } 420 EXPORT_SYMBOL(arch_vcpu_is_preempted); 421 422 void notrace smp_yield_cpu(int cpu) 423 { 424 if (!MACHINE_HAS_DIAG9C) 425 return; 426 diag_stat_inc_norecursion(DIAG_STAT_X09C); 427 asm volatile("diag %0,0,0x9c" 428 : : "d" (pcpu_devices[cpu].address)); 429 } 430 431 /* 432 * Send cpus emergency shutdown signal. This gives the cpus the 433 * opportunity to complete outstanding interrupts. 434 */ 435 void notrace smp_emergency_stop(void) 436 { 437 cpumask_t cpumask; 438 u64 end; 439 int cpu; 440 441 cpumask_copy(&cpumask, cpu_online_mask); 442 cpumask_clear_cpu(smp_processor_id(), &cpumask); 443 444 end = get_tod_clock() + (1000000UL << 12); 445 for_each_cpu(cpu, &cpumask) { 446 struct pcpu *pcpu = pcpu_devices + cpu; 447 set_bit(ec_stop_cpu, &pcpu->ec_mask); 448 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 449 0, NULL) == SIGP_CC_BUSY && 450 get_tod_clock() < end) 451 cpu_relax(); 452 } 453 while (get_tod_clock() < end) { 454 for_each_cpu(cpu, &cpumask) 455 if (pcpu_stopped(pcpu_devices + cpu)) 456 cpumask_clear_cpu(cpu, &cpumask); 457 if (cpumask_empty(&cpumask)) 458 break; 459 cpu_relax(); 460 } 461 } 462 NOKPROBE_SYMBOL(smp_emergency_stop); 463 464 /* 465 * Stop all cpus but the current one. 466 */ 467 void smp_send_stop(void) 468 { 469 int cpu; 470 471 /* Disable all interrupts/machine checks */ 472 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 473 trace_hardirqs_off(); 474 475 debug_set_critical(); 476 477 if (oops_in_progress) 478 smp_emergency_stop(); 479 480 /* stop all processors */ 481 for_each_online_cpu(cpu) { 482 if (cpu == smp_processor_id()) 483 continue; 484 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 485 while (!pcpu_stopped(pcpu_devices + cpu)) 486 cpu_relax(); 487 } 488 } 489 490 /* 491 * This is the main routine where commands issued by other 492 * cpus are handled. 493 */ 494 static void smp_handle_ext_call(void) 495 { 496 unsigned long bits; 497 498 /* handle bit signal external calls */ 499 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 500 if (test_bit(ec_stop_cpu, &bits)) 501 smp_stop_cpu(); 502 if (test_bit(ec_schedule, &bits)) 503 scheduler_ipi(); 504 if (test_bit(ec_call_function_single, &bits)) 505 generic_smp_call_function_single_interrupt(); 506 if (test_bit(ec_mcck_pending, &bits)) 507 s390_handle_mcck(); 508 } 509 510 static void do_ext_call_interrupt(struct ext_code ext_code, 511 unsigned int param32, unsigned long param64) 512 { 513 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 514 smp_handle_ext_call(); 515 } 516 517 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 518 { 519 int cpu; 520 521 for_each_cpu(cpu, mask) 522 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 523 } 524 525 void arch_send_call_function_single_ipi(int cpu) 526 { 527 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 528 } 529 530 /* 531 * this function sends a 'reschedule' IPI to another CPU. 532 * it goes straight through and wastes no time serializing 533 * anything. Worst case is that we lose a reschedule ... 534 */ 535 void smp_send_reschedule(int cpu) 536 { 537 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 538 } 539 540 /* 541 * parameter area for the set/clear control bit callbacks 542 */ 543 struct ec_creg_mask_parms { 544 unsigned long orval; 545 unsigned long andval; 546 int cr; 547 }; 548 549 /* 550 * callback for setting/clearing control bits 551 */ 552 static void smp_ctl_bit_callback(void *info) 553 { 554 struct ec_creg_mask_parms *pp = info; 555 unsigned long cregs[16]; 556 557 __ctl_store(cregs, 0, 15); 558 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 559 __ctl_load(cregs, 0, 15); 560 } 561 562 /* 563 * Set a bit in a control register of all cpus 564 */ 565 void smp_ctl_set_bit(int cr, int bit) 566 { 567 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 568 569 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 570 } 571 EXPORT_SYMBOL(smp_ctl_set_bit); 572 573 /* 574 * Clear a bit in a control register of all cpus 575 */ 576 void smp_ctl_clear_bit(int cr, int bit) 577 { 578 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 579 580 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 581 } 582 EXPORT_SYMBOL(smp_ctl_clear_bit); 583 584 #ifdef CONFIG_CRASH_DUMP 585 586 int smp_store_status(int cpu) 587 { 588 struct pcpu *pcpu = pcpu_devices + cpu; 589 unsigned long pa; 590 591 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 592 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 593 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 594 return -EIO; 595 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 596 return 0; 597 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 598 if (MACHINE_HAS_GS) 599 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 600 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 601 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 602 return -EIO; 603 return 0; 604 } 605 606 /* 607 * Collect CPU state of the previous, crashed system. 608 * There are four cases: 609 * 1) standard zfcp dump 610 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 611 * The state for all CPUs except the boot CPU needs to be collected 612 * with sigp stop-and-store-status. The boot CPU state is located in 613 * the absolute lowcore of the memory stored in the HSA. The zcore code 614 * will copy the boot CPU state from the HSA. 615 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 616 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 617 * The state for all CPUs except the boot CPU needs to be collected 618 * with sigp stop-and-store-status. The firmware or the boot-loader 619 * stored the registers of the boot CPU in the absolute lowcore in the 620 * memory of the old system. 621 * 3) kdump and the old kernel did not store the CPU state, 622 * or stand-alone kdump for DASD 623 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 624 * The state for all CPUs except the boot CPU needs to be collected 625 * with sigp stop-and-store-status. The kexec code or the boot-loader 626 * stored the registers of the boot CPU in the memory of the old system. 627 * 4) kdump and the old kernel stored the CPU state 628 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 629 * This case does not exist for s390 anymore, setup_arch explicitly 630 * deactivates the elfcorehdr= kernel parameter 631 */ 632 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 633 bool is_boot_cpu, unsigned long page) 634 { 635 __vector128 *vxrs = (__vector128 *) page; 636 637 if (is_boot_cpu) 638 vxrs = boot_cpu_vector_save_area; 639 else 640 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 641 save_area_add_vxrs(sa, vxrs); 642 } 643 644 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 645 bool is_boot_cpu, unsigned long page) 646 { 647 void *regs = (void *) page; 648 649 if (is_boot_cpu) 650 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 651 else 652 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 653 save_area_add_regs(sa, regs); 654 } 655 656 void __init smp_save_dump_cpus(void) 657 { 658 int addr, boot_cpu_addr, max_cpu_addr; 659 struct save_area *sa; 660 unsigned long page; 661 bool is_boot_cpu; 662 663 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 664 /* No previous system present, normal boot. */ 665 return; 666 /* Allocate a page as dumping area for the store status sigps */ 667 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31); 668 if (!page) 669 panic("ERROR: Failed to allocate %lx bytes below %lx\n", 670 PAGE_SIZE, 1UL << 31); 671 672 /* Set multi-threading state to the previous system. */ 673 pcpu_set_smt(sclp.mtid_prev); 674 boot_cpu_addr = stap(); 675 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 676 for (addr = 0; addr <= max_cpu_addr; addr++) { 677 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 678 SIGP_CC_NOT_OPERATIONAL) 679 continue; 680 is_boot_cpu = (addr == boot_cpu_addr); 681 /* Allocate save area */ 682 sa = save_area_alloc(is_boot_cpu); 683 if (!sa) 684 panic("could not allocate memory for save area\n"); 685 if (MACHINE_HAS_VX) 686 /* Get the vector registers */ 687 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 688 /* 689 * For a zfcp dump OLDMEM_BASE == NULL and the registers 690 * of the boot CPU are stored in the HSA. To retrieve 691 * these registers an SCLP request is required which is 692 * done by drivers/s390/char/zcore.c:init_cpu_info() 693 */ 694 if (!is_boot_cpu || OLDMEM_BASE) 695 /* Get the CPU registers */ 696 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 697 } 698 memblock_free(page, PAGE_SIZE); 699 diag_dma_ops.diag308_reset(); 700 pcpu_set_smt(0); 701 } 702 #endif /* CONFIG_CRASH_DUMP */ 703 704 void smp_cpu_set_polarization(int cpu, int val) 705 { 706 pcpu_devices[cpu].polarization = val; 707 } 708 709 int smp_cpu_get_polarization(int cpu) 710 { 711 return pcpu_devices[cpu].polarization; 712 } 713 714 int smp_cpu_get_cpu_address(int cpu) 715 { 716 return pcpu_devices[cpu].address; 717 } 718 719 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 720 { 721 static int use_sigp_detection; 722 int address; 723 724 if (use_sigp_detection || sclp_get_core_info(info, early)) { 725 use_sigp_detection = 1; 726 for (address = 0; 727 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 728 address += (1U << smp_cpu_mt_shift)) { 729 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 730 SIGP_CC_NOT_OPERATIONAL) 731 continue; 732 info->core[info->configured].core_id = 733 address >> smp_cpu_mt_shift; 734 info->configured++; 735 } 736 info->combined = info->configured; 737 } 738 } 739 740 static int smp_add_present_cpu(int cpu); 741 742 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail, 743 bool configured, bool early) 744 { 745 struct pcpu *pcpu; 746 int cpu, nr, i; 747 u16 address; 748 749 nr = 0; 750 if (sclp.has_core_type && core->type != boot_core_type) 751 return nr; 752 cpu = cpumask_first(avail); 753 address = core->core_id << smp_cpu_mt_shift; 754 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) { 755 if (pcpu_find_address(cpu_present_mask, address + i)) 756 continue; 757 pcpu = pcpu_devices + cpu; 758 pcpu->address = address + i; 759 if (configured) 760 pcpu->state = CPU_STATE_CONFIGURED; 761 else 762 pcpu->state = CPU_STATE_STANDBY; 763 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 764 set_cpu_present(cpu, true); 765 if (!early && smp_add_present_cpu(cpu) != 0) 766 set_cpu_present(cpu, false); 767 else 768 nr++; 769 cpumask_clear_cpu(cpu, avail); 770 cpu = cpumask_next(cpu, avail); 771 } 772 return nr; 773 } 774 775 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early) 776 { 777 struct sclp_core_entry *core; 778 cpumask_t avail; 779 bool configured; 780 u16 core_id; 781 int nr, i; 782 783 nr = 0; 784 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 785 /* 786 * Add IPL core first (which got logical CPU number 0) to make sure 787 * that all SMT threads get subsequent logical CPU numbers. 788 */ 789 if (early) { 790 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift; 791 for (i = 0; i < info->configured; i++) { 792 core = &info->core[i]; 793 if (core->core_id == core_id) { 794 nr += smp_add_core(core, &avail, true, early); 795 break; 796 } 797 } 798 } 799 for (i = 0; i < info->combined; i++) { 800 configured = i < info->configured; 801 nr += smp_add_core(&info->core[i], &avail, configured, early); 802 } 803 return nr; 804 } 805 806 void __init smp_detect_cpus(void) 807 { 808 unsigned int cpu, mtid, c_cpus, s_cpus; 809 struct sclp_core_info *info; 810 u16 address; 811 812 /* Get CPU information */ 813 info = memblock_alloc(sizeof(*info), 8); 814 if (!info) 815 panic("%s: Failed to allocate %zu bytes align=0x%x\n", 816 __func__, sizeof(*info), 8); 817 smp_get_core_info(info, 1); 818 /* Find boot CPU type */ 819 if (sclp.has_core_type) { 820 address = stap(); 821 for (cpu = 0; cpu < info->combined; cpu++) 822 if (info->core[cpu].core_id == address) { 823 /* The boot cpu dictates the cpu type. */ 824 boot_core_type = info->core[cpu].type; 825 break; 826 } 827 if (cpu >= info->combined) 828 panic("Could not find boot CPU type"); 829 } 830 831 /* Set multi-threading state for the current system */ 832 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 833 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 834 pcpu_set_smt(mtid); 835 836 /* Print number of CPUs */ 837 c_cpus = s_cpus = 0; 838 for (cpu = 0; cpu < info->combined; cpu++) { 839 if (sclp.has_core_type && 840 info->core[cpu].type != boot_core_type) 841 continue; 842 if (cpu < info->configured) 843 c_cpus += smp_cpu_mtid + 1; 844 else 845 s_cpus += smp_cpu_mtid + 1; 846 } 847 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 848 849 /* Add CPUs present at boot */ 850 get_online_cpus(); 851 __smp_rescan_cpus(info, true); 852 put_online_cpus(); 853 memblock_free_early((unsigned long)info, sizeof(*info)); 854 } 855 856 static void smp_init_secondary(void) 857 { 858 int cpu = smp_processor_id(); 859 860 S390_lowcore.last_update_clock = get_tod_clock(); 861 restore_access_regs(S390_lowcore.access_regs_save_area); 862 set_cpu_flag(CIF_ASCE_PRIMARY); 863 set_cpu_flag(CIF_ASCE_SECONDARY); 864 cpu_init(); 865 preempt_disable(); 866 init_cpu_timer(); 867 vtime_init(); 868 pfault_init(); 869 notify_cpu_starting(cpu); 870 if (topology_cpu_dedicated(cpu)) 871 set_cpu_flag(CIF_DEDICATED_CPU); 872 else 873 clear_cpu_flag(CIF_DEDICATED_CPU); 874 set_cpu_online(cpu, true); 875 update_cpu_masks(); 876 inc_irq_stat(CPU_RST); 877 local_irq_enable(); 878 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 879 } 880 881 /* 882 * Activate a secondary processor. 883 */ 884 static void __no_sanitize_address smp_start_secondary(void *cpuvoid) 885 { 886 S390_lowcore.restart_stack = (unsigned long) restart_stack; 887 S390_lowcore.restart_fn = (unsigned long) do_restart; 888 S390_lowcore.restart_data = 0; 889 S390_lowcore.restart_source = -1UL; 890 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 891 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 892 CALL_ON_STACK_NORETURN(smp_init_secondary, S390_lowcore.kernel_stack); 893 } 894 895 /* Upping and downing of CPUs */ 896 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 897 { 898 struct pcpu *pcpu; 899 int base, i, rc; 900 901 pcpu = pcpu_devices + cpu; 902 if (pcpu->state != CPU_STATE_CONFIGURED) 903 return -EIO; 904 base = smp_get_base_cpu(cpu); 905 for (i = 0; i <= smp_cpu_mtid; i++) { 906 if (base + i < nr_cpu_ids) 907 if (cpu_online(base + i)) 908 break; 909 } 910 /* 911 * If this is the first CPU of the core to get online 912 * do an initial CPU reset. 913 */ 914 if (i > smp_cpu_mtid && 915 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 916 SIGP_CC_ORDER_CODE_ACCEPTED) 917 return -EIO; 918 919 rc = pcpu_alloc_lowcore(pcpu, cpu); 920 if (rc) 921 return rc; 922 pcpu_prepare_secondary(pcpu, cpu); 923 pcpu_attach_task(pcpu, tidle); 924 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 925 /* Wait until cpu puts itself in the online & active maps */ 926 while (!cpu_online(cpu)) 927 cpu_relax(); 928 return 0; 929 } 930 931 static unsigned int setup_possible_cpus __initdata; 932 933 static int __init _setup_possible_cpus(char *s) 934 { 935 get_option(&s, &setup_possible_cpus); 936 return 0; 937 } 938 early_param("possible_cpus", _setup_possible_cpus); 939 940 int __cpu_disable(void) 941 { 942 unsigned long cregs[16]; 943 944 /* Handle possible pending IPIs */ 945 smp_handle_ext_call(); 946 set_cpu_online(smp_processor_id(), false); 947 update_cpu_masks(); 948 /* Disable pseudo page faults on this cpu. */ 949 pfault_fini(); 950 /* Disable interrupt sources via control register. */ 951 __ctl_store(cregs, 0, 15); 952 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 953 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 954 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 955 __ctl_load(cregs, 0, 15); 956 clear_cpu_flag(CIF_NOHZ_DELAY); 957 return 0; 958 } 959 960 void __cpu_die(unsigned int cpu) 961 { 962 struct pcpu *pcpu; 963 964 /* Wait until target cpu is down */ 965 pcpu = pcpu_devices + cpu; 966 while (!pcpu_stopped(pcpu)) 967 cpu_relax(); 968 pcpu_free_lowcore(pcpu); 969 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 970 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 971 } 972 973 void __noreturn cpu_die(void) 974 { 975 idle_task_exit(); 976 __bpon(); 977 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 978 for (;;) ; 979 } 980 981 void __init smp_fill_possible_mask(void) 982 { 983 unsigned int possible, sclp_max, cpu; 984 985 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 986 sclp_max = min(smp_max_threads, sclp_max); 987 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 988 possible = setup_possible_cpus ?: nr_cpu_ids; 989 possible = min(possible, sclp_max); 990 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 991 set_cpu_possible(cpu, true); 992 } 993 994 void __init smp_prepare_cpus(unsigned int max_cpus) 995 { 996 /* request the 0x1201 emergency signal external interrupt */ 997 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 998 panic("Couldn't request external interrupt 0x1201"); 999 /* request the 0x1202 external call external interrupt */ 1000 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 1001 panic("Couldn't request external interrupt 0x1202"); 1002 } 1003 1004 void __init smp_prepare_boot_cpu(void) 1005 { 1006 struct pcpu *pcpu = pcpu_devices; 1007 1008 WARN_ON(!cpu_present(0) || !cpu_online(0)); 1009 pcpu->state = CPU_STATE_CONFIGURED; 1010 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 1011 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 1012 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 1013 } 1014 1015 void __init smp_cpus_done(unsigned int max_cpus) 1016 { 1017 } 1018 1019 void __init smp_setup_processor_id(void) 1020 { 1021 pcpu_devices[0].address = stap(); 1022 S390_lowcore.cpu_nr = 0; 1023 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 1024 S390_lowcore.spinlock_index = 0; 1025 } 1026 1027 /* 1028 * the frequency of the profiling timer can be changed 1029 * by writing a multiplier value into /proc/profile. 1030 * 1031 * usually you want to run this on all CPUs ;) 1032 */ 1033 int setup_profiling_timer(unsigned int multiplier) 1034 { 1035 return 0; 1036 } 1037 1038 static ssize_t cpu_configure_show(struct device *dev, 1039 struct device_attribute *attr, char *buf) 1040 { 1041 ssize_t count; 1042 1043 mutex_lock(&smp_cpu_state_mutex); 1044 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 1045 mutex_unlock(&smp_cpu_state_mutex); 1046 return count; 1047 } 1048 1049 static ssize_t cpu_configure_store(struct device *dev, 1050 struct device_attribute *attr, 1051 const char *buf, size_t count) 1052 { 1053 struct pcpu *pcpu; 1054 int cpu, val, rc, i; 1055 char delim; 1056 1057 if (sscanf(buf, "%d %c", &val, &delim) != 1) 1058 return -EINVAL; 1059 if (val != 0 && val != 1) 1060 return -EINVAL; 1061 get_online_cpus(); 1062 mutex_lock(&smp_cpu_state_mutex); 1063 rc = -EBUSY; 1064 /* disallow configuration changes of online cpus and cpu 0 */ 1065 cpu = dev->id; 1066 cpu = smp_get_base_cpu(cpu); 1067 if (cpu == 0) 1068 goto out; 1069 for (i = 0; i <= smp_cpu_mtid; i++) 1070 if (cpu_online(cpu + i)) 1071 goto out; 1072 pcpu = pcpu_devices + cpu; 1073 rc = 0; 1074 switch (val) { 1075 case 0: 1076 if (pcpu->state != CPU_STATE_CONFIGURED) 1077 break; 1078 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1079 if (rc) 1080 break; 1081 for (i = 0; i <= smp_cpu_mtid; i++) { 1082 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1083 continue; 1084 pcpu[i].state = CPU_STATE_STANDBY; 1085 smp_cpu_set_polarization(cpu + i, 1086 POLARIZATION_UNKNOWN); 1087 } 1088 topology_expect_change(); 1089 break; 1090 case 1: 1091 if (pcpu->state != CPU_STATE_STANDBY) 1092 break; 1093 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1094 if (rc) 1095 break; 1096 for (i = 0; i <= smp_cpu_mtid; i++) { 1097 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1098 continue; 1099 pcpu[i].state = CPU_STATE_CONFIGURED; 1100 smp_cpu_set_polarization(cpu + i, 1101 POLARIZATION_UNKNOWN); 1102 } 1103 topology_expect_change(); 1104 break; 1105 default: 1106 break; 1107 } 1108 out: 1109 mutex_unlock(&smp_cpu_state_mutex); 1110 put_online_cpus(); 1111 return rc ? rc : count; 1112 } 1113 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1114 1115 static ssize_t show_cpu_address(struct device *dev, 1116 struct device_attribute *attr, char *buf) 1117 { 1118 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1119 } 1120 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1121 1122 static struct attribute *cpu_common_attrs[] = { 1123 &dev_attr_configure.attr, 1124 &dev_attr_address.attr, 1125 NULL, 1126 }; 1127 1128 static struct attribute_group cpu_common_attr_group = { 1129 .attrs = cpu_common_attrs, 1130 }; 1131 1132 static struct attribute *cpu_online_attrs[] = { 1133 &dev_attr_idle_count.attr, 1134 &dev_attr_idle_time_us.attr, 1135 NULL, 1136 }; 1137 1138 static struct attribute_group cpu_online_attr_group = { 1139 .attrs = cpu_online_attrs, 1140 }; 1141 1142 static int smp_cpu_online(unsigned int cpu) 1143 { 1144 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1145 1146 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1147 } 1148 static int smp_cpu_pre_down(unsigned int cpu) 1149 { 1150 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1151 1152 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1153 return 0; 1154 } 1155 1156 static int smp_add_present_cpu(int cpu) 1157 { 1158 struct device *s; 1159 struct cpu *c; 1160 int rc; 1161 1162 c = kzalloc(sizeof(*c), GFP_KERNEL); 1163 if (!c) 1164 return -ENOMEM; 1165 per_cpu(cpu_device, cpu) = c; 1166 s = &c->dev; 1167 c->hotpluggable = 1; 1168 rc = register_cpu(c, cpu); 1169 if (rc) 1170 goto out; 1171 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1172 if (rc) 1173 goto out_cpu; 1174 rc = topology_cpu_init(c); 1175 if (rc) 1176 goto out_topology; 1177 return 0; 1178 1179 out_topology: 1180 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1181 out_cpu: 1182 unregister_cpu(c); 1183 out: 1184 return rc; 1185 } 1186 1187 int __ref smp_rescan_cpus(void) 1188 { 1189 struct sclp_core_info *info; 1190 int nr; 1191 1192 info = kzalloc(sizeof(*info), GFP_KERNEL); 1193 if (!info) 1194 return -ENOMEM; 1195 smp_get_core_info(info, 0); 1196 get_online_cpus(); 1197 mutex_lock(&smp_cpu_state_mutex); 1198 nr = __smp_rescan_cpus(info, false); 1199 mutex_unlock(&smp_cpu_state_mutex); 1200 put_online_cpus(); 1201 kfree(info); 1202 if (nr) 1203 topology_schedule_update(); 1204 return 0; 1205 } 1206 1207 static ssize_t __ref rescan_store(struct device *dev, 1208 struct device_attribute *attr, 1209 const char *buf, 1210 size_t count) 1211 { 1212 int rc; 1213 1214 rc = lock_device_hotplug_sysfs(); 1215 if (rc) 1216 return rc; 1217 rc = smp_rescan_cpus(); 1218 unlock_device_hotplug(); 1219 return rc ? rc : count; 1220 } 1221 static DEVICE_ATTR_WO(rescan); 1222 1223 static int __init s390_smp_init(void) 1224 { 1225 int cpu, rc = 0; 1226 1227 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1228 if (rc) 1229 return rc; 1230 for_each_present_cpu(cpu) { 1231 rc = smp_add_present_cpu(cpu); 1232 if (rc) 1233 goto out; 1234 } 1235 1236 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1237 smp_cpu_online, smp_cpu_pre_down); 1238 rc = rc <= 0 ? rc : 0; 1239 out: 1240 return rc; 1241 } 1242 subsys_initcall(s390_smp_init); 1243