1 /* 2 * SMP related functions 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Denis Joseph Barrow, 6 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 7 * Heiko Carstens <heiko.carstens@de.ibm.com>, 8 * 9 * based on other smp stuff by 10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 11 * (c) 1998 Ingo Molnar 12 * 13 * The code outside of smp.c uses logical cpu numbers, only smp.c does 14 * the translation of logical to physical cpu ids. All new code that 15 * operates on physical cpu numbers needs to go into smp.c. 16 */ 17 18 #define KMSG_COMPONENT "cpu" 19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 20 21 #include <linux/workqueue.h> 22 #include <linux/bootmem.h> 23 #include <linux/export.h> 24 #include <linux/init.h> 25 #include <linux/mm.h> 26 #include <linux/err.h> 27 #include <linux/spinlock.h> 28 #include <linux/kernel_stat.h> 29 #include <linux/kmemleak.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/irqflags.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/memblock.h> 39 #include <asm/asm-offsets.h> 40 #include <asm/diag.h> 41 #include <asm/switch_to.h> 42 #include <asm/facility.h> 43 #include <asm/ipl.h> 44 #include <asm/setup.h> 45 #include <asm/irq.h> 46 #include <asm/tlbflush.h> 47 #include <asm/vtimer.h> 48 #include <asm/lowcore.h> 49 #include <asm/sclp.h> 50 #include <asm/vdso.h> 51 #include <asm/debug.h> 52 #include <asm/os_info.h> 53 #include <asm/sigp.h> 54 #include <asm/idle.h> 55 #include <asm/nmi.h> 56 #include "entry.h" 57 58 enum { 59 ec_schedule = 0, 60 ec_call_function_single, 61 ec_stop_cpu, 62 }; 63 64 enum { 65 CPU_STATE_STANDBY, 66 CPU_STATE_CONFIGURED, 67 }; 68 69 static DEFINE_PER_CPU(struct cpu *, cpu_device); 70 71 struct pcpu { 72 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 73 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 74 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 75 signed char state; /* physical cpu state */ 76 signed char polarization; /* physical polarization */ 77 u16 address; /* physical cpu address */ 78 }; 79 80 static u8 boot_core_type; 81 static struct pcpu pcpu_devices[NR_CPUS]; 82 83 static struct kmem_cache *pcpu_mcesa_cache; 84 85 unsigned int smp_cpu_mt_shift; 86 EXPORT_SYMBOL(smp_cpu_mt_shift); 87 88 unsigned int smp_cpu_mtid; 89 EXPORT_SYMBOL(smp_cpu_mtid); 90 91 #ifdef CONFIG_CRASH_DUMP 92 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 93 #endif 94 95 static unsigned int smp_max_threads __initdata = -1U; 96 97 static int __init early_nosmt(char *s) 98 { 99 smp_max_threads = 1; 100 return 0; 101 } 102 early_param("nosmt", early_nosmt); 103 104 static int __init early_smt(char *s) 105 { 106 get_option(&s, &smp_max_threads); 107 return 0; 108 } 109 early_param("smt", early_smt); 110 111 /* 112 * The smp_cpu_state_mutex must be held when changing the state or polarization 113 * member of a pcpu data structure within the pcpu_devices arreay. 114 */ 115 DEFINE_MUTEX(smp_cpu_state_mutex); 116 117 /* 118 * Signal processor helper functions. 119 */ 120 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 121 { 122 int cc; 123 124 while (1) { 125 cc = __pcpu_sigp(addr, order, parm, NULL); 126 if (cc != SIGP_CC_BUSY) 127 return cc; 128 cpu_relax(); 129 } 130 } 131 132 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 133 { 134 int cc, retry; 135 136 for (retry = 0; ; retry++) { 137 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 138 if (cc != SIGP_CC_BUSY) 139 break; 140 if (retry >= 3) 141 udelay(10); 142 } 143 return cc; 144 } 145 146 static inline int pcpu_stopped(struct pcpu *pcpu) 147 { 148 u32 uninitialized_var(status); 149 150 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 151 0, &status) != SIGP_CC_STATUS_STORED) 152 return 0; 153 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 154 } 155 156 static inline int pcpu_running(struct pcpu *pcpu) 157 { 158 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 159 0, NULL) != SIGP_CC_STATUS_STORED) 160 return 1; 161 /* Status stored condition code is equivalent to cpu not running. */ 162 return 0; 163 } 164 165 /* 166 * Find struct pcpu by cpu address. 167 */ 168 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 169 { 170 int cpu; 171 172 for_each_cpu(cpu, mask) 173 if (pcpu_devices[cpu].address == address) 174 return pcpu_devices + cpu; 175 return NULL; 176 } 177 178 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 179 { 180 int order; 181 182 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 183 return; 184 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 185 pcpu->ec_clk = get_tod_clock_fast(); 186 pcpu_sigp_retry(pcpu, order, 0); 187 } 188 189 #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 190 #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 191 192 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 193 { 194 unsigned long async_stack, panic_stack; 195 unsigned long mcesa_origin, mcesa_bits; 196 struct lowcore *lc; 197 198 mcesa_origin = mcesa_bits = 0; 199 if (pcpu != &pcpu_devices[0]) { 200 pcpu->lowcore = (struct lowcore *) 201 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 202 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); 203 panic_stack = __get_free_page(GFP_KERNEL); 204 if (!pcpu->lowcore || !panic_stack || !async_stack) 205 goto out; 206 if (MACHINE_HAS_VX || MACHINE_HAS_GS) { 207 mcesa_origin = (unsigned long) 208 kmem_cache_alloc(pcpu_mcesa_cache, GFP_KERNEL); 209 if (!mcesa_origin) 210 goto out; 211 /* The pointer is stored with mcesa_bits ORed in */ 212 kmemleak_not_leak((void *) mcesa_origin); 213 mcesa_bits = MACHINE_HAS_GS ? 11 : 0; 214 } 215 } else { 216 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET; 217 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET; 218 mcesa_origin = pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK; 219 mcesa_bits = pcpu->lowcore->mcesad & MCESA_LC_MASK; 220 } 221 lc = pcpu->lowcore; 222 memcpy(lc, &S390_lowcore, 512); 223 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 224 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET; 225 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET; 226 lc->mcesad = mcesa_origin | mcesa_bits; 227 lc->cpu_nr = cpu; 228 lc->spinlock_lockval = arch_spin_lockval(cpu); 229 if (vdso_alloc_per_cpu(lc)) 230 goto out; 231 lowcore_ptr[cpu] = lc; 232 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 233 return 0; 234 out: 235 if (pcpu != &pcpu_devices[0]) { 236 if (mcesa_origin) 237 kmem_cache_free(pcpu_mcesa_cache, 238 (void *) mcesa_origin); 239 free_page(panic_stack); 240 free_pages(async_stack, ASYNC_ORDER); 241 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 242 } 243 return -ENOMEM; 244 } 245 246 #ifdef CONFIG_HOTPLUG_CPU 247 248 static void pcpu_free_lowcore(struct pcpu *pcpu) 249 { 250 unsigned long mcesa_origin; 251 252 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 253 lowcore_ptr[pcpu - pcpu_devices] = NULL; 254 vdso_free_per_cpu(pcpu->lowcore); 255 if (pcpu == &pcpu_devices[0]) 256 return; 257 if (MACHINE_HAS_VX || MACHINE_HAS_GS) { 258 mcesa_origin = pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK; 259 kmem_cache_free(pcpu_mcesa_cache, (void *) mcesa_origin); 260 } 261 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET); 262 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER); 263 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 264 } 265 266 #endif /* CONFIG_HOTPLUG_CPU */ 267 268 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 269 { 270 struct lowcore *lc = pcpu->lowcore; 271 272 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 273 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 274 lc->cpu_nr = cpu; 275 lc->spinlock_lockval = arch_spin_lockval(cpu); 276 lc->percpu_offset = __per_cpu_offset[cpu]; 277 lc->kernel_asce = S390_lowcore.kernel_asce; 278 lc->machine_flags = S390_lowcore.machine_flags; 279 lc->user_timer = lc->system_timer = lc->steal_timer = 0; 280 __ctl_store(lc->cregs_save_area, 0, 15); 281 save_access_regs((unsigned int *) lc->access_regs_save_area); 282 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 283 MAX_FACILITY_BIT/8); 284 } 285 286 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 287 { 288 struct lowcore *lc = pcpu->lowcore; 289 290 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 291 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 292 lc->current_task = (unsigned long) tsk; 293 lc->lpp = LPP_MAGIC; 294 lc->current_pid = tsk->pid; 295 lc->user_timer = tsk->thread.user_timer; 296 lc->system_timer = tsk->thread.system_timer; 297 lc->steal_timer = 0; 298 } 299 300 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 301 { 302 struct lowcore *lc = pcpu->lowcore; 303 304 lc->restart_stack = lc->kernel_stack; 305 lc->restart_fn = (unsigned long) func; 306 lc->restart_data = (unsigned long) data; 307 lc->restart_source = -1UL; 308 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 309 } 310 311 /* 312 * Call function via PSW restart on pcpu and stop the current cpu. 313 */ 314 static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *), 315 void *data, unsigned long stack) 316 { 317 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 318 unsigned long source_cpu = stap(); 319 320 __load_psw_mask(PSW_KERNEL_BITS); 321 if (pcpu->address == source_cpu) 322 func(data); /* should not return */ 323 /* Stop target cpu (if func returns this stops the current cpu). */ 324 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 325 /* Restart func on the target cpu and stop the current cpu. */ 326 mem_assign_absolute(lc->restart_stack, stack); 327 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 328 mem_assign_absolute(lc->restart_data, (unsigned long) data); 329 mem_assign_absolute(lc->restart_source, source_cpu); 330 asm volatile( 331 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 332 " brc 2,0b # busy, try again\n" 333 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 334 " brc 2,1b # busy, try again\n" 335 : : "d" (pcpu->address), "d" (source_cpu), 336 "K" (SIGP_RESTART), "K" (SIGP_STOP) 337 : "0", "1", "cc"); 338 for (;;) ; 339 } 340 341 /* 342 * Enable additional logical cpus for multi-threading. 343 */ 344 static int pcpu_set_smt(unsigned int mtid) 345 { 346 int cc; 347 348 if (smp_cpu_mtid == mtid) 349 return 0; 350 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 351 if (cc == 0) { 352 smp_cpu_mtid = mtid; 353 smp_cpu_mt_shift = 0; 354 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 355 smp_cpu_mt_shift++; 356 pcpu_devices[0].address = stap(); 357 } 358 return cc; 359 } 360 361 /* 362 * Call function on an online CPU. 363 */ 364 void smp_call_online_cpu(void (*func)(void *), void *data) 365 { 366 struct pcpu *pcpu; 367 368 /* Use the current cpu if it is online. */ 369 pcpu = pcpu_find_address(cpu_online_mask, stap()); 370 if (!pcpu) 371 /* Use the first online cpu. */ 372 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 373 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 374 } 375 376 /* 377 * Call function on the ipl CPU. 378 */ 379 void smp_call_ipl_cpu(void (*func)(void *), void *data) 380 { 381 pcpu_delegate(&pcpu_devices[0], func, data, 382 pcpu_devices->lowcore->panic_stack - 383 PANIC_FRAME_OFFSET + PAGE_SIZE); 384 } 385 386 int smp_find_processor_id(u16 address) 387 { 388 int cpu; 389 390 for_each_present_cpu(cpu) 391 if (pcpu_devices[cpu].address == address) 392 return cpu; 393 return -1; 394 } 395 396 bool arch_vcpu_is_preempted(int cpu) 397 { 398 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 399 return false; 400 if (pcpu_running(pcpu_devices + cpu)) 401 return false; 402 return true; 403 } 404 EXPORT_SYMBOL(arch_vcpu_is_preempted); 405 406 void smp_yield_cpu(int cpu) 407 { 408 if (MACHINE_HAS_DIAG9C) { 409 diag_stat_inc_norecursion(DIAG_STAT_X09C); 410 asm volatile("diag %0,0,0x9c" 411 : : "d" (pcpu_devices[cpu].address)); 412 } else if (MACHINE_HAS_DIAG44) { 413 diag_stat_inc_norecursion(DIAG_STAT_X044); 414 asm volatile("diag 0,0,0x44"); 415 } 416 } 417 418 /* 419 * Send cpus emergency shutdown signal. This gives the cpus the 420 * opportunity to complete outstanding interrupts. 421 */ 422 static void smp_emergency_stop(cpumask_t *cpumask) 423 { 424 u64 end; 425 int cpu; 426 427 end = get_tod_clock() + (1000000UL << 12); 428 for_each_cpu(cpu, cpumask) { 429 struct pcpu *pcpu = pcpu_devices + cpu; 430 set_bit(ec_stop_cpu, &pcpu->ec_mask); 431 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 432 0, NULL) == SIGP_CC_BUSY && 433 get_tod_clock() < end) 434 cpu_relax(); 435 } 436 while (get_tod_clock() < end) { 437 for_each_cpu(cpu, cpumask) 438 if (pcpu_stopped(pcpu_devices + cpu)) 439 cpumask_clear_cpu(cpu, cpumask); 440 if (cpumask_empty(cpumask)) 441 break; 442 cpu_relax(); 443 } 444 } 445 446 /* 447 * Stop all cpus but the current one. 448 */ 449 void smp_send_stop(void) 450 { 451 cpumask_t cpumask; 452 int cpu; 453 454 /* Disable all interrupts/machine checks */ 455 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 456 trace_hardirqs_off(); 457 458 debug_set_critical(); 459 cpumask_copy(&cpumask, cpu_online_mask); 460 cpumask_clear_cpu(smp_processor_id(), &cpumask); 461 462 if (oops_in_progress) 463 smp_emergency_stop(&cpumask); 464 465 /* stop all processors */ 466 for_each_cpu(cpu, &cpumask) { 467 struct pcpu *pcpu = pcpu_devices + cpu; 468 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 469 while (!pcpu_stopped(pcpu)) 470 cpu_relax(); 471 } 472 } 473 474 /* 475 * This is the main routine where commands issued by other 476 * cpus are handled. 477 */ 478 static void smp_handle_ext_call(void) 479 { 480 unsigned long bits; 481 482 /* handle bit signal external calls */ 483 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 484 if (test_bit(ec_stop_cpu, &bits)) 485 smp_stop_cpu(); 486 if (test_bit(ec_schedule, &bits)) 487 scheduler_ipi(); 488 if (test_bit(ec_call_function_single, &bits)) 489 generic_smp_call_function_single_interrupt(); 490 } 491 492 static void do_ext_call_interrupt(struct ext_code ext_code, 493 unsigned int param32, unsigned long param64) 494 { 495 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 496 smp_handle_ext_call(); 497 } 498 499 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 500 { 501 int cpu; 502 503 for_each_cpu(cpu, mask) 504 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 505 } 506 507 void arch_send_call_function_single_ipi(int cpu) 508 { 509 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 510 } 511 512 /* 513 * this function sends a 'reschedule' IPI to another CPU. 514 * it goes straight through and wastes no time serializing 515 * anything. Worst case is that we lose a reschedule ... 516 */ 517 void smp_send_reschedule(int cpu) 518 { 519 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 520 } 521 522 /* 523 * parameter area for the set/clear control bit callbacks 524 */ 525 struct ec_creg_mask_parms { 526 unsigned long orval; 527 unsigned long andval; 528 int cr; 529 }; 530 531 /* 532 * callback for setting/clearing control bits 533 */ 534 static void smp_ctl_bit_callback(void *info) 535 { 536 struct ec_creg_mask_parms *pp = info; 537 unsigned long cregs[16]; 538 539 __ctl_store(cregs, 0, 15); 540 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 541 __ctl_load(cregs, 0, 15); 542 } 543 544 /* 545 * Set a bit in a control register of all cpus 546 */ 547 void smp_ctl_set_bit(int cr, int bit) 548 { 549 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 550 551 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 552 } 553 EXPORT_SYMBOL(smp_ctl_set_bit); 554 555 /* 556 * Clear a bit in a control register of all cpus 557 */ 558 void smp_ctl_clear_bit(int cr, int bit) 559 { 560 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 561 562 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 563 } 564 EXPORT_SYMBOL(smp_ctl_clear_bit); 565 566 #ifdef CONFIG_CRASH_DUMP 567 568 int smp_store_status(int cpu) 569 { 570 struct pcpu *pcpu = pcpu_devices + cpu; 571 unsigned long pa; 572 573 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 574 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 575 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 576 return -EIO; 577 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 578 return 0; 579 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 580 if (MACHINE_HAS_GS) 581 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 582 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 583 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 584 return -EIO; 585 return 0; 586 } 587 588 /* 589 * Collect CPU state of the previous, crashed system. 590 * There are four cases: 591 * 1) standard zfcp dump 592 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 593 * The state for all CPUs except the boot CPU needs to be collected 594 * with sigp stop-and-store-status. The boot CPU state is located in 595 * the absolute lowcore of the memory stored in the HSA. The zcore code 596 * will copy the boot CPU state from the HSA. 597 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 598 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 599 * The state for all CPUs except the boot CPU needs to be collected 600 * with sigp stop-and-store-status. The firmware or the boot-loader 601 * stored the registers of the boot CPU in the absolute lowcore in the 602 * memory of the old system. 603 * 3) kdump and the old kernel did not store the CPU state, 604 * or stand-alone kdump for DASD 605 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 606 * The state for all CPUs except the boot CPU needs to be collected 607 * with sigp stop-and-store-status. The kexec code or the boot-loader 608 * stored the registers of the boot CPU in the memory of the old system. 609 * 4) kdump and the old kernel stored the CPU state 610 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 611 * This case does not exist for s390 anymore, setup_arch explicitly 612 * deactivates the elfcorehdr= kernel parameter 613 */ 614 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 615 bool is_boot_cpu, unsigned long page) 616 { 617 __vector128 *vxrs = (__vector128 *) page; 618 619 if (is_boot_cpu) 620 vxrs = boot_cpu_vector_save_area; 621 else 622 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 623 save_area_add_vxrs(sa, vxrs); 624 } 625 626 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 627 bool is_boot_cpu, unsigned long page) 628 { 629 void *regs = (void *) page; 630 631 if (is_boot_cpu) 632 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 633 else 634 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 635 save_area_add_regs(sa, regs); 636 } 637 638 void __init smp_save_dump_cpus(void) 639 { 640 int addr, boot_cpu_addr, max_cpu_addr; 641 struct save_area *sa; 642 unsigned long page; 643 bool is_boot_cpu; 644 645 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 646 /* No previous system present, normal boot. */ 647 return; 648 /* Allocate a page as dumping area for the store status sigps */ 649 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31); 650 /* Set multi-threading state to the previous system. */ 651 pcpu_set_smt(sclp.mtid_prev); 652 boot_cpu_addr = stap(); 653 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 654 for (addr = 0; addr <= max_cpu_addr; addr++) { 655 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 656 SIGP_CC_NOT_OPERATIONAL) 657 continue; 658 is_boot_cpu = (addr == boot_cpu_addr); 659 /* Allocate save area */ 660 sa = save_area_alloc(is_boot_cpu); 661 if (!sa) 662 panic("could not allocate memory for save area\n"); 663 if (MACHINE_HAS_VX) 664 /* Get the vector registers */ 665 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 666 /* 667 * For a zfcp dump OLDMEM_BASE == NULL and the registers 668 * of the boot CPU are stored in the HSA. To retrieve 669 * these registers an SCLP request is required which is 670 * done by drivers/s390/char/zcore.c:init_cpu_info() 671 */ 672 if (!is_boot_cpu || OLDMEM_BASE) 673 /* Get the CPU registers */ 674 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 675 } 676 memblock_free(page, PAGE_SIZE); 677 diag308_reset(); 678 pcpu_set_smt(0); 679 } 680 #endif /* CONFIG_CRASH_DUMP */ 681 682 void smp_cpu_set_polarization(int cpu, int val) 683 { 684 pcpu_devices[cpu].polarization = val; 685 } 686 687 int smp_cpu_get_polarization(int cpu) 688 { 689 return pcpu_devices[cpu].polarization; 690 } 691 692 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 693 { 694 static int use_sigp_detection; 695 int address; 696 697 if (use_sigp_detection || sclp_get_core_info(info, early)) { 698 use_sigp_detection = 1; 699 for (address = 0; 700 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 701 address += (1U << smp_cpu_mt_shift)) { 702 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 703 SIGP_CC_NOT_OPERATIONAL) 704 continue; 705 info->core[info->configured].core_id = 706 address >> smp_cpu_mt_shift; 707 info->configured++; 708 } 709 info->combined = info->configured; 710 } 711 } 712 713 static int smp_add_present_cpu(int cpu); 714 715 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add) 716 { 717 struct pcpu *pcpu; 718 cpumask_t avail; 719 int cpu, nr, i, j; 720 u16 address; 721 722 nr = 0; 723 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 724 cpu = cpumask_first(&avail); 725 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 726 if (sclp.has_core_type && info->core[i].type != boot_core_type) 727 continue; 728 address = info->core[i].core_id << smp_cpu_mt_shift; 729 for (j = 0; j <= smp_cpu_mtid; j++) { 730 if (pcpu_find_address(cpu_present_mask, address + j)) 731 continue; 732 pcpu = pcpu_devices + cpu; 733 pcpu->address = address + j; 734 pcpu->state = 735 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 736 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 737 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 738 set_cpu_present(cpu, true); 739 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 740 set_cpu_present(cpu, false); 741 else 742 nr++; 743 cpu = cpumask_next(cpu, &avail); 744 if (cpu >= nr_cpu_ids) 745 break; 746 } 747 } 748 return nr; 749 } 750 751 void __init smp_detect_cpus(void) 752 { 753 unsigned int cpu, mtid, c_cpus, s_cpus; 754 struct sclp_core_info *info; 755 u16 address; 756 757 /* Get CPU information */ 758 info = memblock_virt_alloc(sizeof(*info), 8); 759 smp_get_core_info(info, 1); 760 /* Find boot CPU type */ 761 if (sclp.has_core_type) { 762 address = stap(); 763 for (cpu = 0; cpu < info->combined; cpu++) 764 if (info->core[cpu].core_id == address) { 765 /* The boot cpu dictates the cpu type. */ 766 boot_core_type = info->core[cpu].type; 767 break; 768 } 769 if (cpu >= info->combined) 770 panic("Could not find boot CPU type"); 771 } 772 773 /* Set multi-threading state for the current system */ 774 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 775 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 776 pcpu_set_smt(mtid); 777 778 /* Print number of CPUs */ 779 c_cpus = s_cpus = 0; 780 for (cpu = 0; cpu < info->combined; cpu++) { 781 if (sclp.has_core_type && 782 info->core[cpu].type != boot_core_type) 783 continue; 784 if (cpu < info->configured) 785 c_cpus += smp_cpu_mtid + 1; 786 else 787 s_cpus += smp_cpu_mtid + 1; 788 } 789 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 790 791 /* Add CPUs present at boot */ 792 get_online_cpus(); 793 __smp_rescan_cpus(info, 0); 794 put_online_cpus(); 795 memblock_free_early((unsigned long)info, sizeof(*info)); 796 } 797 798 /* 799 * Activate a secondary processor. 800 */ 801 static void smp_start_secondary(void *cpuvoid) 802 { 803 S390_lowcore.last_update_clock = get_tod_clock(); 804 S390_lowcore.restart_stack = (unsigned long) restart_stack; 805 S390_lowcore.restart_fn = (unsigned long) do_restart; 806 S390_lowcore.restart_data = 0; 807 S390_lowcore.restart_source = -1UL; 808 restore_access_regs(S390_lowcore.access_regs_save_area); 809 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 810 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 811 cpu_init(); 812 preempt_disable(); 813 init_cpu_timer(); 814 vtime_init(); 815 pfault_init(); 816 notify_cpu_starting(smp_processor_id()); 817 set_cpu_online(smp_processor_id(), true); 818 inc_irq_stat(CPU_RST); 819 local_irq_enable(); 820 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 821 } 822 823 /* Upping and downing of CPUs */ 824 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 825 { 826 struct pcpu *pcpu; 827 int base, i, rc; 828 829 pcpu = pcpu_devices + cpu; 830 if (pcpu->state != CPU_STATE_CONFIGURED) 831 return -EIO; 832 base = smp_get_base_cpu(cpu); 833 for (i = 0; i <= smp_cpu_mtid; i++) { 834 if (base + i < nr_cpu_ids) 835 if (cpu_online(base + i)) 836 break; 837 } 838 /* 839 * If this is the first CPU of the core to get online 840 * do an initial CPU reset. 841 */ 842 if (i > smp_cpu_mtid && 843 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 844 SIGP_CC_ORDER_CODE_ACCEPTED) 845 return -EIO; 846 847 rc = pcpu_alloc_lowcore(pcpu, cpu); 848 if (rc) 849 return rc; 850 pcpu_prepare_secondary(pcpu, cpu); 851 pcpu_attach_task(pcpu, tidle); 852 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 853 /* Wait until cpu puts itself in the online & active maps */ 854 while (!cpu_online(cpu)) 855 cpu_relax(); 856 return 0; 857 } 858 859 static unsigned int setup_possible_cpus __initdata; 860 861 static int __init _setup_possible_cpus(char *s) 862 { 863 get_option(&s, &setup_possible_cpus); 864 return 0; 865 } 866 early_param("possible_cpus", _setup_possible_cpus); 867 868 #ifdef CONFIG_HOTPLUG_CPU 869 870 int __cpu_disable(void) 871 { 872 unsigned long cregs[16]; 873 874 /* Handle possible pending IPIs */ 875 smp_handle_ext_call(); 876 set_cpu_online(smp_processor_id(), false); 877 /* Disable pseudo page faults on this cpu. */ 878 pfault_fini(); 879 /* Disable interrupt sources via control register. */ 880 __ctl_store(cregs, 0, 15); 881 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 882 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 883 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 884 __ctl_load(cregs, 0, 15); 885 clear_cpu_flag(CIF_NOHZ_DELAY); 886 return 0; 887 } 888 889 void __cpu_die(unsigned int cpu) 890 { 891 struct pcpu *pcpu; 892 893 /* Wait until target cpu is down */ 894 pcpu = pcpu_devices + cpu; 895 while (!pcpu_stopped(pcpu)) 896 cpu_relax(); 897 pcpu_free_lowcore(pcpu); 898 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 899 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 900 } 901 902 void __noreturn cpu_die(void) 903 { 904 idle_task_exit(); 905 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 906 for (;;) ; 907 } 908 909 #endif /* CONFIG_HOTPLUG_CPU */ 910 911 void __init smp_fill_possible_mask(void) 912 { 913 unsigned int possible, sclp_max, cpu; 914 915 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 916 sclp_max = min(smp_max_threads, sclp_max); 917 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 918 possible = setup_possible_cpus ?: nr_cpu_ids; 919 possible = min(possible, sclp_max); 920 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 921 set_cpu_possible(cpu, true); 922 } 923 924 void __init smp_prepare_cpus(unsigned int max_cpus) 925 { 926 unsigned long size; 927 928 /* request the 0x1201 emergency signal external interrupt */ 929 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 930 panic("Couldn't request external interrupt 0x1201"); 931 /* request the 0x1202 external call external interrupt */ 932 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 933 panic("Couldn't request external interrupt 0x1202"); 934 /* create slab cache for the machine-check-extended-save-areas */ 935 if (MACHINE_HAS_VX || MACHINE_HAS_GS) { 936 size = 1UL << (MACHINE_HAS_GS ? 11 : 10); 937 pcpu_mcesa_cache = kmem_cache_create("nmi_save_areas", 938 size, size, 0, NULL); 939 if (!pcpu_mcesa_cache) 940 panic("Couldn't create nmi save area cache"); 941 } 942 } 943 944 void __init smp_prepare_boot_cpu(void) 945 { 946 struct pcpu *pcpu = pcpu_devices; 947 948 WARN_ON(!cpu_present(0) || !cpu_online(0)); 949 pcpu->state = CPU_STATE_CONFIGURED; 950 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 951 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 952 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 953 } 954 955 void __init smp_cpus_done(unsigned int max_cpus) 956 { 957 } 958 959 void __init smp_setup_processor_id(void) 960 { 961 pcpu_devices[0].address = stap(); 962 S390_lowcore.cpu_nr = 0; 963 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 964 } 965 966 /* 967 * the frequency of the profiling timer can be changed 968 * by writing a multiplier value into /proc/profile. 969 * 970 * usually you want to run this on all CPUs ;) 971 */ 972 int setup_profiling_timer(unsigned int multiplier) 973 { 974 return 0; 975 } 976 977 #ifdef CONFIG_HOTPLUG_CPU 978 static ssize_t cpu_configure_show(struct device *dev, 979 struct device_attribute *attr, char *buf) 980 { 981 ssize_t count; 982 983 mutex_lock(&smp_cpu_state_mutex); 984 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 985 mutex_unlock(&smp_cpu_state_mutex); 986 return count; 987 } 988 989 static ssize_t cpu_configure_store(struct device *dev, 990 struct device_attribute *attr, 991 const char *buf, size_t count) 992 { 993 struct pcpu *pcpu; 994 int cpu, val, rc, i; 995 char delim; 996 997 if (sscanf(buf, "%d %c", &val, &delim) != 1) 998 return -EINVAL; 999 if (val != 0 && val != 1) 1000 return -EINVAL; 1001 get_online_cpus(); 1002 mutex_lock(&smp_cpu_state_mutex); 1003 rc = -EBUSY; 1004 /* disallow configuration changes of online cpus and cpu 0 */ 1005 cpu = dev->id; 1006 cpu = smp_get_base_cpu(cpu); 1007 if (cpu == 0) 1008 goto out; 1009 for (i = 0; i <= smp_cpu_mtid; i++) 1010 if (cpu_online(cpu + i)) 1011 goto out; 1012 pcpu = pcpu_devices + cpu; 1013 rc = 0; 1014 switch (val) { 1015 case 0: 1016 if (pcpu->state != CPU_STATE_CONFIGURED) 1017 break; 1018 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1019 if (rc) 1020 break; 1021 for (i = 0; i <= smp_cpu_mtid; i++) { 1022 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1023 continue; 1024 pcpu[i].state = CPU_STATE_STANDBY; 1025 smp_cpu_set_polarization(cpu + i, 1026 POLARIZATION_UNKNOWN); 1027 } 1028 topology_expect_change(); 1029 break; 1030 case 1: 1031 if (pcpu->state != CPU_STATE_STANDBY) 1032 break; 1033 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1034 if (rc) 1035 break; 1036 for (i = 0; i <= smp_cpu_mtid; i++) { 1037 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1038 continue; 1039 pcpu[i].state = CPU_STATE_CONFIGURED; 1040 smp_cpu_set_polarization(cpu + i, 1041 POLARIZATION_UNKNOWN); 1042 } 1043 topology_expect_change(); 1044 break; 1045 default: 1046 break; 1047 } 1048 out: 1049 mutex_unlock(&smp_cpu_state_mutex); 1050 put_online_cpus(); 1051 return rc ? rc : count; 1052 } 1053 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1054 #endif /* CONFIG_HOTPLUG_CPU */ 1055 1056 static ssize_t show_cpu_address(struct device *dev, 1057 struct device_attribute *attr, char *buf) 1058 { 1059 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1060 } 1061 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1062 1063 static struct attribute *cpu_common_attrs[] = { 1064 #ifdef CONFIG_HOTPLUG_CPU 1065 &dev_attr_configure.attr, 1066 #endif 1067 &dev_attr_address.attr, 1068 NULL, 1069 }; 1070 1071 static struct attribute_group cpu_common_attr_group = { 1072 .attrs = cpu_common_attrs, 1073 }; 1074 1075 static struct attribute *cpu_online_attrs[] = { 1076 &dev_attr_idle_count.attr, 1077 &dev_attr_idle_time_us.attr, 1078 NULL, 1079 }; 1080 1081 static struct attribute_group cpu_online_attr_group = { 1082 .attrs = cpu_online_attrs, 1083 }; 1084 1085 static int smp_cpu_online(unsigned int cpu) 1086 { 1087 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1088 1089 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1090 } 1091 static int smp_cpu_pre_down(unsigned int cpu) 1092 { 1093 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1094 1095 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1096 return 0; 1097 } 1098 1099 static int smp_add_present_cpu(int cpu) 1100 { 1101 struct device *s; 1102 struct cpu *c; 1103 int rc; 1104 1105 c = kzalloc(sizeof(*c), GFP_KERNEL); 1106 if (!c) 1107 return -ENOMEM; 1108 per_cpu(cpu_device, cpu) = c; 1109 s = &c->dev; 1110 c->hotpluggable = 1; 1111 rc = register_cpu(c, cpu); 1112 if (rc) 1113 goto out; 1114 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1115 if (rc) 1116 goto out_cpu; 1117 rc = topology_cpu_init(c); 1118 if (rc) 1119 goto out_topology; 1120 return 0; 1121 1122 out_topology: 1123 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1124 out_cpu: 1125 #ifdef CONFIG_HOTPLUG_CPU 1126 unregister_cpu(c); 1127 #endif 1128 out: 1129 return rc; 1130 } 1131 1132 #ifdef CONFIG_HOTPLUG_CPU 1133 1134 int __ref smp_rescan_cpus(void) 1135 { 1136 struct sclp_core_info *info; 1137 int nr; 1138 1139 info = kzalloc(sizeof(*info), GFP_KERNEL); 1140 if (!info) 1141 return -ENOMEM; 1142 smp_get_core_info(info, 0); 1143 get_online_cpus(); 1144 mutex_lock(&smp_cpu_state_mutex); 1145 nr = __smp_rescan_cpus(info, 1); 1146 mutex_unlock(&smp_cpu_state_mutex); 1147 put_online_cpus(); 1148 kfree(info); 1149 if (nr) 1150 topology_schedule_update(); 1151 return 0; 1152 } 1153 1154 static ssize_t __ref rescan_store(struct device *dev, 1155 struct device_attribute *attr, 1156 const char *buf, 1157 size_t count) 1158 { 1159 int rc; 1160 1161 rc = smp_rescan_cpus(); 1162 return rc ? rc : count; 1163 } 1164 static DEVICE_ATTR(rescan, 0200, NULL, rescan_store); 1165 #endif /* CONFIG_HOTPLUG_CPU */ 1166 1167 static int __init s390_smp_init(void) 1168 { 1169 int cpu, rc = 0; 1170 1171 #ifdef CONFIG_HOTPLUG_CPU 1172 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1173 if (rc) 1174 return rc; 1175 #endif 1176 for_each_present_cpu(cpu) { 1177 rc = smp_add_present_cpu(cpu); 1178 if (rc) 1179 goto out; 1180 } 1181 1182 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1183 smp_cpu_online, smp_cpu_pre_down); 1184 rc = rc <= 0 ? rc : 0; 1185 out: 1186 return rc; 1187 } 1188 subsys_initcall(s390_smp_init); 1189