1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Heiko Carstens <heiko.carstens@de.ibm.com>, 9 * 10 * based on other smp stuff by 11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 12 * (c) 1998 Ingo Molnar 13 * 14 * The code outside of smp.c uses logical cpu numbers, only smp.c does 15 * the translation of logical to physical cpu ids. All new code that 16 * operates on physical cpu numbers needs to go into smp.c. 17 */ 18 19 #define KMSG_COMPONENT "cpu" 20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 21 22 #include <linux/workqueue.h> 23 #include <linux/memblock.h> 24 #include <linux/export.h> 25 #include <linux/init.h> 26 #include <linux/mm.h> 27 #include <linux/err.h> 28 #include <linux/spinlock.h> 29 #include <linux/kernel_stat.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/irqflags.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/kprobes.h> 39 #include <asm/asm-offsets.h> 40 #include <asm/diag.h> 41 #include <asm/switch_to.h> 42 #include <asm/facility.h> 43 #include <asm/ipl.h> 44 #include <asm/setup.h> 45 #include <asm/irq.h> 46 #include <asm/tlbflush.h> 47 #include <asm/vtimer.h> 48 #include <asm/lowcore.h> 49 #include <asm/sclp.h> 50 #include <asm/vdso.h> 51 #include <asm/debug.h> 52 #include <asm/os_info.h> 53 #include <asm/sigp.h> 54 #include <asm/idle.h> 55 #include <asm/nmi.h> 56 #include <asm/topology.h> 57 #include "entry.h" 58 59 enum { 60 ec_schedule = 0, 61 ec_call_function_single, 62 ec_stop_cpu, 63 }; 64 65 enum { 66 CPU_STATE_STANDBY, 67 CPU_STATE_CONFIGURED, 68 }; 69 70 static DEFINE_PER_CPU(struct cpu *, cpu_device); 71 72 struct pcpu { 73 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 74 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 75 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 76 signed char state; /* physical cpu state */ 77 signed char polarization; /* physical polarization */ 78 u16 address; /* physical cpu address */ 79 }; 80 81 static u8 boot_core_type; 82 static struct pcpu pcpu_devices[NR_CPUS]; 83 84 unsigned int smp_cpu_mt_shift; 85 EXPORT_SYMBOL(smp_cpu_mt_shift); 86 87 unsigned int smp_cpu_mtid; 88 EXPORT_SYMBOL(smp_cpu_mtid); 89 90 #ifdef CONFIG_CRASH_DUMP 91 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 92 #endif 93 94 static unsigned int smp_max_threads __initdata = -1U; 95 96 static int __init early_nosmt(char *s) 97 { 98 smp_max_threads = 1; 99 return 0; 100 } 101 early_param("nosmt", early_nosmt); 102 103 static int __init early_smt(char *s) 104 { 105 get_option(&s, &smp_max_threads); 106 return 0; 107 } 108 early_param("smt", early_smt); 109 110 /* 111 * The smp_cpu_state_mutex must be held when changing the state or polarization 112 * member of a pcpu data structure within the pcpu_devices arreay. 113 */ 114 DEFINE_MUTEX(smp_cpu_state_mutex); 115 116 /* 117 * Signal processor helper functions. 118 */ 119 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 120 { 121 int cc; 122 123 while (1) { 124 cc = __pcpu_sigp(addr, order, parm, NULL); 125 if (cc != SIGP_CC_BUSY) 126 return cc; 127 cpu_relax(); 128 } 129 } 130 131 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 132 { 133 int cc, retry; 134 135 for (retry = 0; ; retry++) { 136 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 137 if (cc != SIGP_CC_BUSY) 138 break; 139 if (retry >= 3) 140 udelay(10); 141 } 142 return cc; 143 } 144 145 static inline int pcpu_stopped(struct pcpu *pcpu) 146 { 147 u32 uninitialized_var(status); 148 149 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 150 0, &status) != SIGP_CC_STATUS_STORED) 151 return 0; 152 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 153 } 154 155 static inline int pcpu_running(struct pcpu *pcpu) 156 { 157 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 158 0, NULL) != SIGP_CC_STATUS_STORED) 159 return 1; 160 /* Status stored condition code is equivalent to cpu not running. */ 161 return 0; 162 } 163 164 /* 165 * Find struct pcpu by cpu address. 166 */ 167 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 168 { 169 int cpu; 170 171 for_each_cpu(cpu, mask) 172 if (pcpu_devices[cpu].address == address) 173 return pcpu_devices + cpu; 174 return NULL; 175 } 176 177 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 178 { 179 int order; 180 181 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 182 return; 183 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 184 pcpu->ec_clk = get_tod_clock_fast(); 185 pcpu_sigp_retry(pcpu, order, 0); 186 } 187 188 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 189 { 190 unsigned long async_stack, nodat_stack; 191 struct lowcore *lc; 192 193 if (pcpu != &pcpu_devices[0]) { 194 pcpu->lowcore = (struct lowcore *) 195 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 196 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 197 if (!pcpu->lowcore || !nodat_stack) 198 goto out; 199 } else { 200 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 201 } 202 async_stack = stack_alloc(); 203 if (!async_stack) 204 goto out; 205 lc = pcpu->lowcore; 206 memcpy(lc, &S390_lowcore, 512); 207 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 208 lc->async_stack = async_stack + STACK_INIT_OFFSET; 209 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET; 210 lc->cpu_nr = cpu; 211 lc->spinlock_lockval = arch_spin_lockval(cpu); 212 lc->spinlock_index = 0; 213 lc->br_r1_trampoline = 0x07f1; /* br %r1 */ 214 if (nmi_alloc_per_cpu(lc)) 215 goto out_async; 216 if (vdso_alloc_per_cpu(lc)) 217 goto out_mcesa; 218 lowcore_ptr[cpu] = lc; 219 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 220 return 0; 221 222 out_mcesa: 223 nmi_free_per_cpu(lc); 224 out_async: 225 stack_free(async_stack); 226 out: 227 if (pcpu != &pcpu_devices[0]) { 228 free_pages(nodat_stack, THREAD_SIZE_ORDER); 229 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 230 } 231 return -ENOMEM; 232 } 233 234 #ifdef CONFIG_HOTPLUG_CPU 235 236 static void pcpu_free_lowcore(struct pcpu *pcpu) 237 { 238 unsigned long async_stack, nodat_stack, lowcore; 239 240 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 241 async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET; 242 lowcore = (unsigned long) pcpu->lowcore; 243 244 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 245 lowcore_ptr[pcpu - pcpu_devices] = NULL; 246 vdso_free_per_cpu(pcpu->lowcore); 247 nmi_free_per_cpu(pcpu->lowcore); 248 stack_free(async_stack); 249 if (pcpu == &pcpu_devices[0]) 250 return; 251 free_pages(nodat_stack, THREAD_SIZE_ORDER); 252 free_pages(lowcore, LC_ORDER); 253 } 254 255 #endif /* CONFIG_HOTPLUG_CPU */ 256 257 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 258 { 259 struct lowcore *lc = pcpu->lowcore; 260 261 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 262 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 263 lc->cpu_nr = cpu; 264 lc->spinlock_lockval = arch_spin_lockval(cpu); 265 lc->spinlock_index = 0; 266 lc->percpu_offset = __per_cpu_offset[cpu]; 267 lc->kernel_asce = S390_lowcore.kernel_asce; 268 lc->machine_flags = S390_lowcore.machine_flags; 269 lc->user_timer = lc->system_timer = lc->steal_timer = 0; 270 __ctl_store(lc->cregs_save_area, 0, 15); 271 save_access_regs((unsigned int *) lc->access_regs_save_area); 272 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 273 sizeof(lc->stfle_fac_list)); 274 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list, 275 sizeof(lc->alt_stfle_fac_list)); 276 arch_spin_lock_setup(cpu); 277 } 278 279 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 280 { 281 struct lowcore *lc = pcpu->lowcore; 282 283 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 284 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 285 lc->current_task = (unsigned long) tsk; 286 lc->lpp = LPP_MAGIC; 287 lc->current_pid = tsk->pid; 288 lc->user_timer = tsk->thread.user_timer; 289 lc->guest_timer = tsk->thread.guest_timer; 290 lc->system_timer = tsk->thread.system_timer; 291 lc->hardirq_timer = tsk->thread.hardirq_timer; 292 lc->softirq_timer = tsk->thread.softirq_timer; 293 lc->steal_timer = 0; 294 } 295 296 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 297 { 298 struct lowcore *lc = pcpu->lowcore; 299 300 lc->restart_stack = lc->nodat_stack; 301 lc->restart_fn = (unsigned long) func; 302 lc->restart_data = (unsigned long) data; 303 lc->restart_source = -1UL; 304 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 305 } 306 307 /* 308 * Call function via PSW restart on pcpu and stop the current cpu. 309 */ 310 static void __pcpu_delegate(void (*func)(void*), void *data) 311 { 312 func(data); /* should not return */ 313 } 314 315 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu, 316 void (*func)(void *), 317 void *data, unsigned long stack) 318 { 319 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 320 unsigned long source_cpu = stap(); 321 322 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 323 if (pcpu->address == source_cpu) 324 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data); 325 /* Stop target cpu (if func returns this stops the current cpu). */ 326 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 327 /* Restart func on the target cpu and stop the current cpu. */ 328 mem_assign_absolute(lc->restart_stack, stack); 329 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 330 mem_assign_absolute(lc->restart_data, (unsigned long) data); 331 mem_assign_absolute(lc->restart_source, source_cpu); 332 __bpon(); 333 asm volatile( 334 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 335 " brc 2,0b # busy, try again\n" 336 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 337 " brc 2,1b # busy, try again\n" 338 : : "d" (pcpu->address), "d" (source_cpu), 339 "K" (SIGP_RESTART), "K" (SIGP_STOP) 340 : "0", "1", "cc"); 341 for (;;) ; 342 } 343 344 /* 345 * Enable additional logical cpus for multi-threading. 346 */ 347 static int pcpu_set_smt(unsigned int mtid) 348 { 349 int cc; 350 351 if (smp_cpu_mtid == mtid) 352 return 0; 353 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 354 if (cc == 0) { 355 smp_cpu_mtid = mtid; 356 smp_cpu_mt_shift = 0; 357 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 358 smp_cpu_mt_shift++; 359 pcpu_devices[0].address = stap(); 360 } 361 return cc; 362 } 363 364 /* 365 * Call function on an online CPU. 366 */ 367 void smp_call_online_cpu(void (*func)(void *), void *data) 368 { 369 struct pcpu *pcpu; 370 371 /* Use the current cpu if it is online. */ 372 pcpu = pcpu_find_address(cpu_online_mask, stap()); 373 if (!pcpu) 374 /* Use the first online cpu. */ 375 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 376 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 377 } 378 379 /* 380 * Call function on the ipl CPU. 381 */ 382 void smp_call_ipl_cpu(void (*func)(void *), void *data) 383 { 384 pcpu_delegate(&pcpu_devices[0], func, data, 385 pcpu_devices->lowcore->nodat_stack); 386 } 387 388 int smp_find_processor_id(u16 address) 389 { 390 int cpu; 391 392 for_each_present_cpu(cpu) 393 if (pcpu_devices[cpu].address == address) 394 return cpu; 395 return -1; 396 } 397 398 bool arch_vcpu_is_preempted(int cpu) 399 { 400 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 401 return false; 402 if (pcpu_running(pcpu_devices + cpu)) 403 return false; 404 return true; 405 } 406 EXPORT_SYMBOL(arch_vcpu_is_preempted); 407 408 void smp_yield_cpu(int cpu) 409 { 410 if (MACHINE_HAS_DIAG9C) { 411 diag_stat_inc_norecursion(DIAG_STAT_X09C); 412 asm volatile("diag %0,0,0x9c" 413 : : "d" (pcpu_devices[cpu].address)); 414 } else if (MACHINE_HAS_DIAG44) { 415 diag_stat_inc_norecursion(DIAG_STAT_X044); 416 asm volatile("diag 0,0,0x44"); 417 } 418 } 419 420 /* 421 * Send cpus emergency shutdown signal. This gives the cpus the 422 * opportunity to complete outstanding interrupts. 423 */ 424 void notrace smp_emergency_stop(void) 425 { 426 cpumask_t cpumask; 427 u64 end; 428 int cpu; 429 430 cpumask_copy(&cpumask, cpu_online_mask); 431 cpumask_clear_cpu(smp_processor_id(), &cpumask); 432 433 end = get_tod_clock() + (1000000UL << 12); 434 for_each_cpu(cpu, &cpumask) { 435 struct pcpu *pcpu = pcpu_devices + cpu; 436 set_bit(ec_stop_cpu, &pcpu->ec_mask); 437 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 438 0, NULL) == SIGP_CC_BUSY && 439 get_tod_clock() < end) 440 cpu_relax(); 441 } 442 while (get_tod_clock() < end) { 443 for_each_cpu(cpu, &cpumask) 444 if (pcpu_stopped(pcpu_devices + cpu)) 445 cpumask_clear_cpu(cpu, &cpumask); 446 if (cpumask_empty(&cpumask)) 447 break; 448 cpu_relax(); 449 } 450 } 451 NOKPROBE_SYMBOL(smp_emergency_stop); 452 453 /* 454 * Stop all cpus but the current one. 455 */ 456 void smp_send_stop(void) 457 { 458 int cpu; 459 460 /* Disable all interrupts/machine checks */ 461 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 462 trace_hardirqs_off(); 463 464 debug_set_critical(); 465 466 if (oops_in_progress) 467 smp_emergency_stop(); 468 469 /* stop all processors */ 470 for_each_online_cpu(cpu) { 471 if (cpu == smp_processor_id()) 472 continue; 473 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 474 while (!pcpu_stopped(pcpu_devices + cpu)) 475 cpu_relax(); 476 } 477 } 478 479 /* 480 * This is the main routine where commands issued by other 481 * cpus are handled. 482 */ 483 static void smp_handle_ext_call(void) 484 { 485 unsigned long bits; 486 487 /* handle bit signal external calls */ 488 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 489 if (test_bit(ec_stop_cpu, &bits)) 490 smp_stop_cpu(); 491 if (test_bit(ec_schedule, &bits)) 492 scheduler_ipi(); 493 if (test_bit(ec_call_function_single, &bits)) 494 generic_smp_call_function_single_interrupt(); 495 } 496 497 static void do_ext_call_interrupt(struct ext_code ext_code, 498 unsigned int param32, unsigned long param64) 499 { 500 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 501 smp_handle_ext_call(); 502 } 503 504 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 505 { 506 int cpu; 507 508 for_each_cpu(cpu, mask) 509 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 510 } 511 512 void arch_send_call_function_single_ipi(int cpu) 513 { 514 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 515 } 516 517 /* 518 * this function sends a 'reschedule' IPI to another CPU. 519 * it goes straight through and wastes no time serializing 520 * anything. Worst case is that we lose a reschedule ... 521 */ 522 void smp_send_reschedule(int cpu) 523 { 524 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 525 } 526 527 /* 528 * parameter area for the set/clear control bit callbacks 529 */ 530 struct ec_creg_mask_parms { 531 unsigned long orval; 532 unsigned long andval; 533 int cr; 534 }; 535 536 /* 537 * callback for setting/clearing control bits 538 */ 539 static void smp_ctl_bit_callback(void *info) 540 { 541 struct ec_creg_mask_parms *pp = info; 542 unsigned long cregs[16]; 543 544 __ctl_store(cregs, 0, 15); 545 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 546 __ctl_load(cregs, 0, 15); 547 } 548 549 /* 550 * Set a bit in a control register of all cpus 551 */ 552 void smp_ctl_set_bit(int cr, int bit) 553 { 554 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 555 556 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 557 } 558 EXPORT_SYMBOL(smp_ctl_set_bit); 559 560 /* 561 * Clear a bit in a control register of all cpus 562 */ 563 void smp_ctl_clear_bit(int cr, int bit) 564 { 565 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 566 567 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 568 } 569 EXPORT_SYMBOL(smp_ctl_clear_bit); 570 571 #ifdef CONFIG_CRASH_DUMP 572 573 int smp_store_status(int cpu) 574 { 575 struct pcpu *pcpu = pcpu_devices + cpu; 576 unsigned long pa; 577 578 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 579 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 580 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 581 return -EIO; 582 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 583 return 0; 584 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 585 if (MACHINE_HAS_GS) 586 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 587 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 588 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 589 return -EIO; 590 return 0; 591 } 592 593 /* 594 * Collect CPU state of the previous, crashed system. 595 * There are four cases: 596 * 1) standard zfcp dump 597 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 598 * The state for all CPUs except the boot CPU needs to be collected 599 * with sigp stop-and-store-status. The boot CPU state is located in 600 * the absolute lowcore of the memory stored in the HSA. The zcore code 601 * will copy the boot CPU state from the HSA. 602 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 603 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 604 * The state for all CPUs except the boot CPU needs to be collected 605 * with sigp stop-and-store-status. The firmware or the boot-loader 606 * stored the registers of the boot CPU in the absolute lowcore in the 607 * memory of the old system. 608 * 3) kdump and the old kernel did not store the CPU state, 609 * or stand-alone kdump for DASD 610 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 611 * The state for all CPUs except the boot CPU needs to be collected 612 * with sigp stop-and-store-status. The kexec code or the boot-loader 613 * stored the registers of the boot CPU in the memory of the old system. 614 * 4) kdump and the old kernel stored the CPU state 615 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 616 * This case does not exist for s390 anymore, setup_arch explicitly 617 * deactivates the elfcorehdr= kernel parameter 618 */ 619 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 620 bool is_boot_cpu, unsigned long page) 621 { 622 __vector128 *vxrs = (__vector128 *) page; 623 624 if (is_boot_cpu) 625 vxrs = boot_cpu_vector_save_area; 626 else 627 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 628 save_area_add_vxrs(sa, vxrs); 629 } 630 631 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 632 bool is_boot_cpu, unsigned long page) 633 { 634 void *regs = (void *) page; 635 636 if (is_boot_cpu) 637 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 638 else 639 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 640 save_area_add_regs(sa, regs); 641 } 642 643 void __init smp_save_dump_cpus(void) 644 { 645 int addr, boot_cpu_addr, max_cpu_addr; 646 struct save_area *sa; 647 unsigned long page; 648 bool is_boot_cpu; 649 650 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 651 /* No previous system present, normal boot. */ 652 return; 653 /* Allocate a page as dumping area for the store status sigps */ 654 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31); 655 /* Set multi-threading state to the previous system. */ 656 pcpu_set_smt(sclp.mtid_prev); 657 boot_cpu_addr = stap(); 658 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 659 for (addr = 0; addr <= max_cpu_addr; addr++) { 660 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 661 SIGP_CC_NOT_OPERATIONAL) 662 continue; 663 is_boot_cpu = (addr == boot_cpu_addr); 664 /* Allocate save area */ 665 sa = save_area_alloc(is_boot_cpu); 666 if (!sa) 667 panic("could not allocate memory for save area\n"); 668 if (MACHINE_HAS_VX) 669 /* Get the vector registers */ 670 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 671 /* 672 * For a zfcp dump OLDMEM_BASE == NULL and the registers 673 * of the boot CPU are stored in the HSA. To retrieve 674 * these registers an SCLP request is required which is 675 * done by drivers/s390/char/zcore.c:init_cpu_info() 676 */ 677 if (!is_boot_cpu || OLDMEM_BASE) 678 /* Get the CPU registers */ 679 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 680 } 681 memblock_free(page, PAGE_SIZE); 682 diag308_reset(); 683 pcpu_set_smt(0); 684 } 685 #endif /* CONFIG_CRASH_DUMP */ 686 687 void smp_cpu_set_polarization(int cpu, int val) 688 { 689 pcpu_devices[cpu].polarization = val; 690 } 691 692 int smp_cpu_get_polarization(int cpu) 693 { 694 return pcpu_devices[cpu].polarization; 695 } 696 697 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 698 { 699 static int use_sigp_detection; 700 int address; 701 702 if (use_sigp_detection || sclp_get_core_info(info, early)) { 703 use_sigp_detection = 1; 704 for (address = 0; 705 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 706 address += (1U << smp_cpu_mt_shift)) { 707 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 708 SIGP_CC_NOT_OPERATIONAL) 709 continue; 710 info->core[info->configured].core_id = 711 address >> smp_cpu_mt_shift; 712 info->configured++; 713 } 714 info->combined = info->configured; 715 } 716 } 717 718 static int smp_add_present_cpu(int cpu); 719 720 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add) 721 { 722 struct pcpu *pcpu; 723 cpumask_t avail; 724 int cpu, nr, i, j; 725 u16 address; 726 727 nr = 0; 728 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 729 cpu = cpumask_first(&avail); 730 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 731 if (sclp.has_core_type && info->core[i].type != boot_core_type) 732 continue; 733 address = info->core[i].core_id << smp_cpu_mt_shift; 734 for (j = 0; j <= smp_cpu_mtid; j++) { 735 if (pcpu_find_address(cpu_present_mask, address + j)) 736 continue; 737 pcpu = pcpu_devices + cpu; 738 pcpu->address = address + j; 739 pcpu->state = 740 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 741 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 742 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 743 set_cpu_present(cpu, true); 744 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 745 set_cpu_present(cpu, false); 746 else 747 nr++; 748 cpu = cpumask_next(cpu, &avail); 749 if (cpu >= nr_cpu_ids) 750 break; 751 } 752 } 753 return nr; 754 } 755 756 void __init smp_detect_cpus(void) 757 { 758 unsigned int cpu, mtid, c_cpus, s_cpus; 759 struct sclp_core_info *info; 760 u16 address; 761 762 /* Get CPU information */ 763 info = memblock_alloc(sizeof(*info), 8); 764 smp_get_core_info(info, 1); 765 /* Find boot CPU type */ 766 if (sclp.has_core_type) { 767 address = stap(); 768 for (cpu = 0; cpu < info->combined; cpu++) 769 if (info->core[cpu].core_id == address) { 770 /* The boot cpu dictates the cpu type. */ 771 boot_core_type = info->core[cpu].type; 772 break; 773 } 774 if (cpu >= info->combined) 775 panic("Could not find boot CPU type"); 776 } 777 778 /* Set multi-threading state for the current system */ 779 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 780 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 781 pcpu_set_smt(mtid); 782 783 /* Print number of CPUs */ 784 c_cpus = s_cpus = 0; 785 for (cpu = 0; cpu < info->combined; cpu++) { 786 if (sclp.has_core_type && 787 info->core[cpu].type != boot_core_type) 788 continue; 789 if (cpu < info->configured) 790 c_cpus += smp_cpu_mtid + 1; 791 else 792 s_cpus += smp_cpu_mtid + 1; 793 } 794 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 795 796 /* Add CPUs present at boot */ 797 get_online_cpus(); 798 __smp_rescan_cpus(info, 0); 799 put_online_cpus(); 800 memblock_free_early((unsigned long)info, sizeof(*info)); 801 } 802 803 static void smp_init_secondary(void) 804 { 805 int cpu = smp_processor_id(); 806 807 S390_lowcore.last_update_clock = get_tod_clock(); 808 restore_access_regs(S390_lowcore.access_regs_save_area); 809 cpu_init(); 810 preempt_disable(); 811 init_cpu_timer(); 812 vtime_init(); 813 pfault_init(); 814 notify_cpu_starting(smp_processor_id()); 815 if (topology_cpu_dedicated(cpu)) 816 set_cpu_flag(CIF_DEDICATED_CPU); 817 else 818 clear_cpu_flag(CIF_DEDICATED_CPU); 819 set_cpu_online(smp_processor_id(), true); 820 inc_irq_stat(CPU_RST); 821 local_irq_enable(); 822 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 823 } 824 825 /* 826 * Activate a secondary processor. 827 */ 828 static void __no_sanitize_address smp_start_secondary(void *cpuvoid) 829 { 830 S390_lowcore.restart_stack = (unsigned long) restart_stack; 831 S390_lowcore.restart_fn = (unsigned long) do_restart; 832 S390_lowcore.restart_data = 0; 833 S390_lowcore.restart_source = -1UL; 834 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 835 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 836 CALL_ON_STACK(smp_init_secondary, S390_lowcore.kernel_stack, 0); 837 } 838 839 /* Upping and downing of CPUs */ 840 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 841 { 842 struct pcpu *pcpu; 843 int base, i, rc; 844 845 pcpu = pcpu_devices + cpu; 846 if (pcpu->state != CPU_STATE_CONFIGURED) 847 return -EIO; 848 base = smp_get_base_cpu(cpu); 849 for (i = 0; i <= smp_cpu_mtid; i++) { 850 if (base + i < nr_cpu_ids) 851 if (cpu_online(base + i)) 852 break; 853 } 854 /* 855 * If this is the first CPU of the core to get online 856 * do an initial CPU reset. 857 */ 858 if (i > smp_cpu_mtid && 859 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 860 SIGP_CC_ORDER_CODE_ACCEPTED) 861 return -EIO; 862 863 rc = pcpu_alloc_lowcore(pcpu, cpu); 864 if (rc) 865 return rc; 866 pcpu_prepare_secondary(pcpu, cpu); 867 pcpu_attach_task(pcpu, tidle); 868 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 869 /* Wait until cpu puts itself in the online & active maps */ 870 while (!cpu_online(cpu)) 871 cpu_relax(); 872 return 0; 873 } 874 875 static unsigned int setup_possible_cpus __initdata; 876 877 static int __init _setup_possible_cpus(char *s) 878 { 879 get_option(&s, &setup_possible_cpus); 880 return 0; 881 } 882 early_param("possible_cpus", _setup_possible_cpus); 883 884 #ifdef CONFIG_HOTPLUG_CPU 885 886 int __cpu_disable(void) 887 { 888 unsigned long cregs[16]; 889 890 /* Handle possible pending IPIs */ 891 smp_handle_ext_call(); 892 set_cpu_online(smp_processor_id(), false); 893 /* Disable pseudo page faults on this cpu. */ 894 pfault_fini(); 895 /* Disable interrupt sources via control register. */ 896 __ctl_store(cregs, 0, 15); 897 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 898 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 899 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 900 __ctl_load(cregs, 0, 15); 901 clear_cpu_flag(CIF_NOHZ_DELAY); 902 return 0; 903 } 904 905 void __cpu_die(unsigned int cpu) 906 { 907 struct pcpu *pcpu; 908 909 /* Wait until target cpu is down */ 910 pcpu = pcpu_devices + cpu; 911 while (!pcpu_stopped(pcpu)) 912 cpu_relax(); 913 pcpu_free_lowcore(pcpu); 914 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 915 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 916 } 917 918 void __noreturn cpu_die(void) 919 { 920 idle_task_exit(); 921 __bpon(); 922 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 923 for (;;) ; 924 } 925 926 #endif /* CONFIG_HOTPLUG_CPU */ 927 928 void __init smp_fill_possible_mask(void) 929 { 930 unsigned int possible, sclp_max, cpu; 931 932 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 933 sclp_max = min(smp_max_threads, sclp_max); 934 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 935 possible = setup_possible_cpus ?: nr_cpu_ids; 936 possible = min(possible, sclp_max); 937 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 938 set_cpu_possible(cpu, true); 939 } 940 941 void __init smp_prepare_cpus(unsigned int max_cpus) 942 { 943 /* request the 0x1201 emergency signal external interrupt */ 944 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 945 panic("Couldn't request external interrupt 0x1201"); 946 /* request the 0x1202 external call external interrupt */ 947 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 948 panic("Couldn't request external interrupt 0x1202"); 949 } 950 951 void __init smp_prepare_boot_cpu(void) 952 { 953 struct pcpu *pcpu = pcpu_devices; 954 955 WARN_ON(!cpu_present(0) || !cpu_online(0)); 956 pcpu->state = CPU_STATE_CONFIGURED; 957 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 958 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 959 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 960 } 961 962 void __init smp_cpus_done(unsigned int max_cpus) 963 { 964 } 965 966 void __init smp_setup_processor_id(void) 967 { 968 pcpu_devices[0].address = stap(); 969 S390_lowcore.cpu_nr = 0; 970 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 971 S390_lowcore.spinlock_index = 0; 972 } 973 974 /* 975 * the frequency of the profiling timer can be changed 976 * by writing a multiplier value into /proc/profile. 977 * 978 * usually you want to run this on all CPUs ;) 979 */ 980 int setup_profiling_timer(unsigned int multiplier) 981 { 982 return 0; 983 } 984 985 #ifdef CONFIG_HOTPLUG_CPU 986 static ssize_t cpu_configure_show(struct device *dev, 987 struct device_attribute *attr, char *buf) 988 { 989 ssize_t count; 990 991 mutex_lock(&smp_cpu_state_mutex); 992 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 993 mutex_unlock(&smp_cpu_state_mutex); 994 return count; 995 } 996 997 static ssize_t cpu_configure_store(struct device *dev, 998 struct device_attribute *attr, 999 const char *buf, size_t count) 1000 { 1001 struct pcpu *pcpu; 1002 int cpu, val, rc, i; 1003 char delim; 1004 1005 if (sscanf(buf, "%d %c", &val, &delim) != 1) 1006 return -EINVAL; 1007 if (val != 0 && val != 1) 1008 return -EINVAL; 1009 get_online_cpus(); 1010 mutex_lock(&smp_cpu_state_mutex); 1011 rc = -EBUSY; 1012 /* disallow configuration changes of online cpus and cpu 0 */ 1013 cpu = dev->id; 1014 cpu = smp_get_base_cpu(cpu); 1015 if (cpu == 0) 1016 goto out; 1017 for (i = 0; i <= smp_cpu_mtid; i++) 1018 if (cpu_online(cpu + i)) 1019 goto out; 1020 pcpu = pcpu_devices + cpu; 1021 rc = 0; 1022 switch (val) { 1023 case 0: 1024 if (pcpu->state != CPU_STATE_CONFIGURED) 1025 break; 1026 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1027 if (rc) 1028 break; 1029 for (i = 0; i <= smp_cpu_mtid; i++) { 1030 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1031 continue; 1032 pcpu[i].state = CPU_STATE_STANDBY; 1033 smp_cpu_set_polarization(cpu + i, 1034 POLARIZATION_UNKNOWN); 1035 } 1036 topology_expect_change(); 1037 break; 1038 case 1: 1039 if (pcpu->state != CPU_STATE_STANDBY) 1040 break; 1041 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1042 if (rc) 1043 break; 1044 for (i = 0; i <= smp_cpu_mtid; i++) { 1045 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1046 continue; 1047 pcpu[i].state = CPU_STATE_CONFIGURED; 1048 smp_cpu_set_polarization(cpu + i, 1049 POLARIZATION_UNKNOWN); 1050 } 1051 topology_expect_change(); 1052 break; 1053 default: 1054 break; 1055 } 1056 out: 1057 mutex_unlock(&smp_cpu_state_mutex); 1058 put_online_cpus(); 1059 return rc ? rc : count; 1060 } 1061 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1062 #endif /* CONFIG_HOTPLUG_CPU */ 1063 1064 static ssize_t show_cpu_address(struct device *dev, 1065 struct device_attribute *attr, char *buf) 1066 { 1067 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1068 } 1069 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1070 1071 static struct attribute *cpu_common_attrs[] = { 1072 #ifdef CONFIG_HOTPLUG_CPU 1073 &dev_attr_configure.attr, 1074 #endif 1075 &dev_attr_address.attr, 1076 NULL, 1077 }; 1078 1079 static struct attribute_group cpu_common_attr_group = { 1080 .attrs = cpu_common_attrs, 1081 }; 1082 1083 static struct attribute *cpu_online_attrs[] = { 1084 &dev_attr_idle_count.attr, 1085 &dev_attr_idle_time_us.attr, 1086 NULL, 1087 }; 1088 1089 static struct attribute_group cpu_online_attr_group = { 1090 .attrs = cpu_online_attrs, 1091 }; 1092 1093 static int smp_cpu_online(unsigned int cpu) 1094 { 1095 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1096 1097 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1098 } 1099 static int smp_cpu_pre_down(unsigned int cpu) 1100 { 1101 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1102 1103 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1104 return 0; 1105 } 1106 1107 static int smp_add_present_cpu(int cpu) 1108 { 1109 struct device *s; 1110 struct cpu *c; 1111 int rc; 1112 1113 c = kzalloc(sizeof(*c), GFP_KERNEL); 1114 if (!c) 1115 return -ENOMEM; 1116 per_cpu(cpu_device, cpu) = c; 1117 s = &c->dev; 1118 c->hotpluggable = 1; 1119 rc = register_cpu(c, cpu); 1120 if (rc) 1121 goto out; 1122 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1123 if (rc) 1124 goto out_cpu; 1125 rc = topology_cpu_init(c); 1126 if (rc) 1127 goto out_topology; 1128 return 0; 1129 1130 out_topology: 1131 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1132 out_cpu: 1133 #ifdef CONFIG_HOTPLUG_CPU 1134 unregister_cpu(c); 1135 #endif 1136 out: 1137 return rc; 1138 } 1139 1140 #ifdef CONFIG_HOTPLUG_CPU 1141 1142 int __ref smp_rescan_cpus(void) 1143 { 1144 struct sclp_core_info *info; 1145 int nr; 1146 1147 info = kzalloc(sizeof(*info), GFP_KERNEL); 1148 if (!info) 1149 return -ENOMEM; 1150 smp_get_core_info(info, 0); 1151 get_online_cpus(); 1152 mutex_lock(&smp_cpu_state_mutex); 1153 nr = __smp_rescan_cpus(info, 1); 1154 mutex_unlock(&smp_cpu_state_mutex); 1155 put_online_cpus(); 1156 kfree(info); 1157 if (nr) 1158 topology_schedule_update(); 1159 return 0; 1160 } 1161 1162 static ssize_t __ref rescan_store(struct device *dev, 1163 struct device_attribute *attr, 1164 const char *buf, 1165 size_t count) 1166 { 1167 int rc; 1168 1169 rc = smp_rescan_cpus(); 1170 return rc ? rc : count; 1171 } 1172 static DEVICE_ATTR_WO(rescan); 1173 #endif /* CONFIG_HOTPLUG_CPU */ 1174 1175 static int __init s390_smp_init(void) 1176 { 1177 int cpu, rc = 0; 1178 1179 #ifdef CONFIG_HOTPLUG_CPU 1180 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1181 if (rc) 1182 return rc; 1183 #endif 1184 for_each_present_cpu(cpu) { 1185 rc = smp_add_present_cpu(cpu); 1186 if (rc) 1187 goto out; 1188 } 1189 1190 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1191 smp_cpu_online, smp_cpu_pre_down); 1192 rc = rc <= 0 ? rc : 0; 1193 out: 1194 return rc; 1195 } 1196 subsys_initcall(s390_smp_init); 1197