1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Heiko Carstens <heiko.carstens@de.ibm.com>, 9 * 10 * based on other smp stuff by 11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 12 * (c) 1998 Ingo Molnar 13 * 14 * The code outside of smp.c uses logical cpu numbers, only smp.c does 15 * the translation of logical to physical cpu ids. All new code that 16 * operates on physical cpu numbers needs to go into smp.c. 17 */ 18 19 #define KMSG_COMPONENT "cpu" 20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 21 22 #include <linux/workqueue.h> 23 #include <linux/memblock.h> 24 #include <linux/export.h> 25 #include <linux/init.h> 26 #include <linux/mm.h> 27 #include <linux/err.h> 28 #include <linux/spinlock.h> 29 #include <linux/kernel_stat.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/irqflags.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/kprobes.h> 39 #include <asm/asm-offsets.h> 40 #include <asm/diag.h> 41 #include <asm/switch_to.h> 42 #include <asm/facility.h> 43 #include <asm/ipl.h> 44 #include <asm/setup.h> 45 #include <asm/irq.h> 46 #include <asm/tlbflush.h> 47 #include <asm/vtimer.h> 48 #include <asm/lowcore.h> 49 #include <asm/sclp.h> 50 #include <asm/vdso.h> 51 #include <asm/debug.h> 52 #include <asm/os_info.h> 53 #include <asm/sigp.h> 54 #include <asm/idle.h> 55 #include <asm/nmi.h> 56 #include <asm/topology.h> 57 #include "entry.h" 58 59 enum { 60 ec_schedule = 0, 61 ec_call_function_single, 62 ec_stop_cpu, 63 }; 64 65 enum { 66 CPU_STATE_STANDBY, 67 CPU_STATE_CONFIGURED, 68 }; 69 70 static DEFINE_PER_CPU(struct cpu *, cpu_device); 71 72 struct pcpu { 73 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 74 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 75 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 76 signed char state; /* physical cpu state */ 77 signed char polarization; /* physical polarization */ 78 u16 address; /* physical cpu address */ 79 }; 80 81 static u8 boot_core_type; 82 static struct pcpu pcpu_devices[NR_CPUS]; 83 84 unsigned int smp_cpu_mt_shift; 85 EXPORT_SYMBOL(smp_cpu_mt_shift); 86 87 unsigned int smp_cpu_mtid; 88 EXPORT_SYMBOL(smp_cpu_mtid); 89 90 #ifdef CONFIG_CRASH_DUMP 91 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 92 #endif 93 94 static unsigned int smp_max_threads __initdata = -1U; 95 96 static int __init early_nosmt(char *s) 97 { 98 smp_max_threads = 1; 99 return 0; 100 } 101 early_param("nosmt", early_nosmt); 102 103 static int __init early_smt(char *s) 104 { 105 get_option(&s, &smp_max_threads); 106 return 0; 107 } 108 early_param("smt", early_smt); 109 110 /* 111 * The smp_cpu_state_mutex must be held when changing the state or polarization 112 * member of a pcpu data structure within the pcpu_devices arreay. 113 */ 114 DEFINE_MUTEX(smp_cpu_state_mutex); 115 116 /* 117 * Signal processor helper functions. 118 */ 119 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 120 { 121 int cc; 122 123 while (1) { 124 cc = __pcpu_sigp(addr, order, parm, NULL); 125 if (cc != SIGP_CC_BUSY) 126 return cc; 127 cpu_relax(); 128 } 129 } 130 131 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 132 { 133 int cc, retry; 134 135 for (retry = 0; ; retry++) { 136 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 137 if (cc != SIGP_CC_BUSY) 138 break; 139 if (retry >= 3) 140 udelay(10); 141 } 142 return cc; 143 } 144 145 static inline int pcpu_stopped(struct pcpu *pcpu) 146 { 147 u32 uninitialized_var(status); 148 149 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 150 0, &status) != SIGP_CC_STATUS_STORED) 151 return 0; 152 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 153 } 154 155 static inline int pcpu_running(struct pcpu *pcpu) 156 { 157 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 158 0, NULL) != SIGP_CC_STATUS_STORED) 159 return 1; 160 /* Status stored condition code is equivalent to cpu not running. */ 161 return 0; 162 } 163 164 /* 165 * Find struct pcpu by cpu address. 166 */ 167 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 168 { 169 int cpu; 170 171 for_each_cpu(cpu, mask) 172 if (pcpu_devices[cpu].address == address) 173 return pcpu_devices + cpu; 174 return NULL; 175 } 176 177 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 178 { 179 int order; 180 181 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 182 return; 183 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 184 pcpu->ec_clk = get_tod_clock_fast(); 185 pcpu_sigp_retry(pcpu, order, 0); 186 } 187 188 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 189 { 190 unsigned long async_stack, nodat_stack; 191 struct lowcore *lc; 192 193 if (pcpu != &pcpu_devices[0]) { 194 pcpu->lowcore = (struct lowcore *) 195 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 196 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 197 if (!pcpu->lowcore || !nodat_stack) 198 goto out; 199 } else { 200 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 201 } 202 async_stack = stack_alloc(); 203 if (!async_stack) 204 goto out; 205 lc = pcpu->lowcore; 206 memcpy(lc, &S390_lowcore, 512); 207 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 208 lc->async_stack = async_stack + STACK_INIT_OFFSET; 209 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET; 210 lc->cpu_nr = cpu; 211 lc->spinlock_lockval = arch_spin_lockval(cpu); 212 lc->spinlock_index = 0; 213 lc->br_r1_trampoline = 0x07f1; /* br %r1 */ 214 if (nmi_alloc_per_cpu(lc)) 215 goto out_async; 216 if (vdso_alloc_per_cpu(lc)) 217 goto out_mcesa; 218 lowcore_ptr[cpu] = lc; 219 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 220 return 0; 221 222 out_mcesa: 223 nmi_free_per_cpu(lc); 224 out_async: 225 stack_free(async_stack); 226 out: 227 if (pcpu != &pcpu_devices[0]) { 228 free_pages(nodat_stack, THREAD_SIZE_ORDER); 229 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 230 } 231 return -ENOMEM; 232 } 233 234 #ifdef CONFIG_HOTPLUG_CPU 235 236 static void pcpu_free_lowcore(struct pcpu *pcpu) 237 { 238 unsigned long async_stack, nodat_stack, lowcore; 239 240 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 241 async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET; 242 lowcore = (unsigned long) pcpu->lowcore; 243 244 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 245 lowcore_ptr[pcpu - pcpu_devices] = NULL; 246 vdso_free_per_cpu(pcpu->lowcore); 247 nmi_free_per_cpu(pcpu->lowcore); 248 stack_free(async_stack); 249 if (pcpu == &pcpu_devices[0]) 250 return; 251 free_pages(nodat_stack, THREAD_SIZE_ORDER); 252 free_pages(lowcore, LC_ORDER); 253 } 254 255 #endif /* CONFIG_HOTPLUG_CPU */ 256 257 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 258 { 259 struct lowcore *lc = pcpu->lowcore; 260 261 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 262 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 263 lc->cpu_nr = cpu; 264 lc->spinlock_lockval = arch_spin_lockval(cpu); 265 lc->spinlock_index = 0; 266 lc->percpu_offset = __per_cpu_offset[cpu]; 267 lc->kernel_asce = S390_lowcore.kernel_asce; 268 lc->machine_flags = S390_lowcore.machine_flags; 269 lc->user_timer = lc->system_timer = 270 lc->steal_timer = lc->avg_steal_timer = 0; 271 __ctl_store(lc->cregs_save_area, 0, 15); 272 save_access_regs((unsigned int *) lc->access_regs_save_area); 273 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 274 sizeof(lc->stfle_fac_list)); 275 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list, 276 sizeof(lc->alt_stfle_fac_list)); 277 arch_spin_lock_setup(cpu); 278 } 279 280 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 281 { 282 struct lowcore *lc = pcpu->lowcore; 283 284 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 285 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 286 lc->current_task = (unsigned long) tsk; 287 lc->lpp = LPP_MAGIC; 288 lc->current_pid = tsk->pid; 289 lc->user_timer = tsk->thread.user_timer; 290 lc->guest_timer = tsk->thread.guest_timer; 291 lc->system_timer = tsk->thread.system_timer; 292 lc->hardirq_timer = tsk->thread.hardirq_timer; 293 lc->softirq_timer = tsk->thread.softirq_timer; 294 lc->steal_timer = 0; 295 } 296 297 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 298 { 299 struct lowcore *lc = pcpu->lowcore; 300 301 lc->restart_stack = lc->nodat_stack; 302 lc->restart_fn = (unsigned long) func; 303 lc->restart_data = (unsigned long) data; 304 lc->restart_source = -1UL; 305 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 306 } 307 308 /* 309 * Call function via PSW restart on pcpu and stop the current cpu. 310 */ 311 static void __pcpu_delegate(void (*func)(void*), void *data) 312 { 313 func(data); /* should not return */ 314 } 315 316 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu, 317 void (*func)(void *), 318 void *data, unsigned long stack) 319 { 320 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 321 unsigned long source_cpu = stap(); 322 323 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 324 if (pcpu->address == source_cpu) 325 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data); 326 /* Stop target cpu (if func returns this stops the current cpu). */ 327 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 328 /* Restart func on the target cpu and stop the current cpu. */ 329 mem_assign_absolute(lc->restart_stack, stack); 330 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 331 mem_assign_absolute(lc->restart_data, (unsigned long) data); 332 mem_assign_absolute(lc->restart_source, source_cpu); 333 __bpon(); 334 asm volatile( 335 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 336 " brc 2,0b # busy, try again\n" 337 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 338 " brc 2,1b # busy, try again\n" 339 : : "d" (pcpu->address), "d" (source_cpu), 340 "K" (SIGP_RESTART), "K" (SIGP_STOP) 341 : "0", "1", "cc"); 342 for (;;) ; 343 } 344 345 /* 346 * Enable additional logical cpus for multi-threading. 347 */ 348 static int pcpu_set_smt(unsigned int mtid) 349 { 350 int cc; 351 352 if (smp_cpu_mtid == mtid) 353 return 0; 354 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 355 if (cc == 0) { 356 smp_cpu_mtid = mtid; 357 smp_cpu_mt_shift = 0; 358 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 359 smp_cpu_mt_shift++; 360 pcpu_devices[0].address = stap(); 361 } 362 return cc; 363 } 364 365 /* 366 * Call function on an online CPU. 367 */ 368 void smp_call_online_cpu(void (*func)(void *), void *data) 369 { 370 struct pcpu *pcpu; 371 372 /* Use the current cpu if it is online. */ 373 pcpu = pcpu_find_address(cpu_online_mask, stap()); 374 if (!pcpu) 375 /* Use the first online cpu. */ 376 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 377 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 378 } 379 380 /* 381 * Call function on the ipl CPU. 382 */ 383 void smp_call_ipl_cpu(void (*func)(void *), void *data) 384 { 385 struct lowcore *lc = pcpu_devices->lowcore; 386 387 if (pcpu_devices[0].address == stap()) 388 lc = &S390_lowcore; 389 390 pcpu_delegate(&pcpu_devices[0], func, data, 391 lc->nodat_stack); 392 } 393 394 int smp_find_processor_id(u16 address) 395 { 396 int cpu; 397 398 for_each_present_cpu(cpu) 399 if (pcpu_devices[cpu].address == address) 400 return cpu; 401 return -1; 402 } 403 404 bool arch_vcpu_is_preempted(int cpu) 405 { 406 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 407 return false; 408 if (pcpu_running(pcpu_devices + cpu)) 409 return false; 410 return true; 411 } 412 EXPORT_SYMBOL(arch_vcpu_is_preempted); 413 414 void smp_yield_cpu(int cpu) 415 { 416 if (MACHINE_HAS_DIAG9C) { 417 diag_stat_inc_norecursion(DIAG_STAT_X09C); 418 asm volatile("diag %0,0,0x9c" 419 : : "d" (pcpu_devices[cpu].address)); 420 } else if (MACHINE_HAS_DIAG44) { 421 diag_stat_inc_norecursion(DIAG_STAT_X044); 422 asm volatile("diag 0,0,0x44"); 423 } 424 } 425 426 /* 427 * Send cpus emergency shutdown signal. This gives the cpus the 428 * opportunity to complete outstanding interrupts. 429 */ 430 void notrace smp_emergency_stop(void) 431 { 432 cpumask_t cpumask; 433 u64 end; 434 int cpu; 435 436 cpumask_copy(&cpumask, cpu_online_mask); 437 cpumask_clear_cpu(smp_processor_id(), &cpumask); 438 439 end = get_tod_clock() + (1000000UL << 12); 440 for_each_cpu(cpu, &cpumask) { 441 struct pcpu *pcpu = pcpu_devices + cpu; 442 set_bit(ec_stop_cpu, &pcpu->ec_mask); 443 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 444 0, NULL) == SIGP_CC_BUSY && 445 get_tod_clock() < end) 446 cpu_relax(); 447 } 448 while (get_tod_clock() < end) { 449 for_each_cpu(cpu, &cpumask) 450 if (pcpu_stopped(pcpu_devices + cpu)) 451 cpumask_clear_cpu(cpu, &cpumask); 452 if (cpumask_empty(&cpumask)) 453 break; 454 cpu_relax(); 455 } 456 } 457 NOKPROBE_SYMBOL(smp_emergency_stop); 458 459 /* 460 * Stop all cpus but the current one. 461 */ 462 void smp_send_stop(void) 463 { 464 int cpu; 465 466 /* Disable all interrupts/machine checks */ 467 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 468 trace_hardirqs_off(); 469 470 debug_set_critical(); 471 472 if (oops_in_progress) 473 smp_emergency_stop(); 474 475 /* stop all processors */ 476 for_each_online_cpu(cpu) { 477 if (cpu == smp_processor_id()) 478 continue; 479 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 480 while (!pcpu_stopped(pcpu_devices + cpu)) 481 cpu_relax(); 482 } 483 } 484 485 /* 486 * This is the main routine where commands issued by other 487 * cpus are handled. 488 */ 489 static void smp_handle_ext_call(void) 490 { 491 unsigned long bits; 492 493 /* handle bit signal external calls */ 494 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 495 if (test_bit(ec_stop_cpu, &bits)) 496 smp_stop_cpu(); 497 if (test_bit(ec_schedule, &bits)) 498 scheduler_ipi(); 499 if (test_bit(ec_call_function_single, &bits)) 500 generic_smp_call_function_single_interrupt(); 501 } 502 503 static void do_ext_call_interrupt(struct ext_code ext_code, 504 unsigned int param32, unsigned long param64) 505 { 506 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 507 smp_handle_ext_call(); 508 } 509 510 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 511 { 512 int cpu; 513 514 for_each_cpu(cpu, mask) 515 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 516 } 517 518 void arch_send_call_function_single_ipi(int cpu) 519 { 520 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 521 } 522 523 /* 524 * this function sends a 'reschedule' IPI to another CPU. 525 * it goes straight through and wastes no time serializing 526 * anything. Worst case is that we lose a reschedule ... 527 */ 528 void smp_send_reschedule(int cpu) 529 { 530 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 531 } 532 533 /* 534 * parameter area for the set/clear control bit callbacks 535 */ 536 struct ec_creg_mask_parms { 537 unsigned long orval; 538 unsigned long andval; 539 int cr; 540 }; 541 542 /* 543 * callback for setting/clearing control bits 544 */ 545 static void smp_ctl_bit_callback(void *info) 546 { 547 struct ec_creg_mask_parms *pp = info; 548 unsigned long cregs[16]; 549 550 __ctl_store(cregs, 0, 15); 551 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 552 __ctl_load(cregs, 0, 15); 553 } 554 555 /* 556 * Set a bit in a control register of all cpus 557 */ 558 void smp_ctl_set_bit(int cr, int bit) 559 { 560 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 561 562 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 563 } 564 EXPORT_SYMBOL(smp_ctl_set_bit); 565 566 /* 567 * Clear a bit in a control register of all cpus 568 */ 569 void smp_ctl_clear_bit(int cr, int bit) 570 { 571 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 572 573 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 574 } 575 EXPORT_SYMBOL(smp_ctl_clear_bit); 576 577 #ifdef CONFIG_CRASH_DUMP 578 579 int smp_store_status(int cpu) 580 { 581 struct pcpu *pcpu = pcpu_devices + cpu; 582 unsigned long pa; 583 584 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 585 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 586 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 587 return -EIO; 588 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 589 return 0; 590 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 591 if (MACHINE_HAS_GS) 592 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 593 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 594 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 595 return -EIO; 596 return 0; 597 } 598 599 /* 600 * Collect CPU state of the previous, crashed system. 601 * There are four cases: 602 * 1) standard zfcp dump 603 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 604 * The state for all CPUs except the boot CPU needs to be collected 605 * with sigp stop-and-store-status. The boot CPU state is located in 606 * the absolute lowcore of the memory stored in the HSA. The zcore code 607 * will copy the boot CPU state from the HSA. 608 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 609 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 610 * The state for all CPUs except the boot CPU needs to be collected 611 * with sigp stop-and-store-status. The firmware or the boot-loader 612 * stored the registers of the boot CPU in the absolute lowcore in the 613 * memory of the old system. 614 * 3) kdump and the old kernel did not store the CPU state, 615 * or stand-alone kdump for DASD 616 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 617 * The state for all CPUs except the boot CPU needs to be collected 618 * with sigp stop-and-store-status. The kexec code or the boot-loader 619 * stored the registers of the boot CPU in the memory of the old system. 620 * 4) kdump and the old kernel stored the CPU state 621 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 622 * This case does not exist for s390 anymore, setup_arch explicitly 623 * deactivates the elfcorehdr= kernel parameter 624 */ 625 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 626 bool is_boot_cpu, unsigned long page) 627 { 628 __vector128 *vxrs = (__vector128 *) page; 629 630 if (is_boot_cpu) 631 vxrs = boot_cpu_vector_save_area; 632 else 633 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 634 save_area_add_vxrs(sa, vxrs); 635 } 636 637 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 638 bool is_boot_cpu, unsigned long page) 639 { 640 void *regs = (void *) page; 641 642 if (is_boot_cpu) 643 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 644 else 645 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 646 save_area_add_regs(sa, regs); 647 } 648 649 void __init smp_save_dump_cpus(void) 650 { 651 int addr, boot_cpu_addr, max_cpu_addr; 652 struct save_area *sa; 653 unsigned long page; 654 bool is_boot_cpu; 655 656 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 657 /* No previous system present, normal boot. */ 658 return; 659 /* Allocate a page as dumping area for the store status sigps */ 660 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31); 661 if (!page) 662 panic("ERROR: Failed to allocate %lx bytes below %lx\n", 663 PAGE_SIZE, 1UL << 31); 664 665 /* Set multi-threading state to the previous system. */ 666 pcpu_set_smt(sclp.mtid_prev); 667 boot_cpu_addr = stap(); 668 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 669 for (addr = 0; addr <= max_cpu_addr; addr++) { 670 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 671 SIGP_CC_NOT_OPERATIONAL) 672 continue; 673 is_boot_cpu = (addr == boot_cpu_addr); 674 /* Allocate save area */ 675 sa = save_area_alloc(is_boot_cpu); 676 if (!sa) 677 panic("could not allocate memory for save area\n"); 678 if (MACHINE_HAS_VX) 679 /* Get the vector registers */ 680 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 681 /* 682 * For a zfcp dump OLDMEM_BASE == NULL and the registers 683 * of the boot CPU are stored in the HSA. To retrieve 684 * these registers an SCLP request is required which is 685 * done by drivers/s390/char/zcore.c:init_cpu_info() 686 */ 687 if (!is_boot_cpu || OLDMEM_BASE) 688 /* Get the CPU registers */ 689 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 690 } 691 memblock_free(page, PAGE_SIZE); 692 diag308_reset(); 693 pcpu_set_smt(0); 694 } 695 #endif /* CONFIG_CRASH_DUMP */ 696 697 void smp_cpu_set_polarization(int cpu, int val) 698 { 699 pcpu_devices[cpu].polarization = val; 700 } 701 702 int smp_cpu_get_polarization(int cpu) 703 { 704 return pcpu_devices[cpu].polarization; 705 } 706 707 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 708 { 709 static int use_sigp_detection; 710 int address; 711 712 if (use_sigp_detection || sclp_get_core_info(info, early)) { 713 use_sigp_detection = 1; 714 for (address = 0; 715 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 716 address += (1U << smp_cpu_mt_shift)) { 717 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 718 SIGP_CC_NOT_OPERATIONAL) 719 continue; 720 info->core[info->configured].core_id = 721 address >> smp_cpu_mt_shift; 722 info->configured++; 723 } 724 info->combined = info->configured; 725 } 726 } 727 728 static int smp_add_present_cpu(int cpu); 729 730 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add) 731 { 732 struct pcpu *pcpu; 733 cpumask_t avail; 734 int cpu, nr, i, j; 735 u16 address; 736 737 nr = 0; 738 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 739 cpu = cpumask_first(&avail); 740 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 741 if (sclp.has_core_type && info->core[i].type != boot_core_type) 742 continue; 743 address = info->core[i].core_id << smp_cpu_mt_shift; 744 for (j = 0; j <= smp_cpu_mtid; j++) { 745 if (pcpu_find_address(cpu_present_mask, address + j)) 746 continue; 747 pcpu = pcpu_devices + cpu; 748 pcpu->address = address + j; 749 pcpu->state = 750 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 751 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 752 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 753 set_cpu_present(cpu, true); 754 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 755 set_cpu_present(cpu, false); 756 else 757 nr++; 758 cpu = cpumask_next(cpu, &avail); 759 if (cpu >= nr_cpu_ids) 760 break; 761 } 762 } 763 return nr; 764 } 765 766 void __init smp_detect_cpus(void) 767 { 768 unsigned int cpu, mtid, c_cpus, s_cpus; 769 struct sclp_core_info *info; 770 u16 address; 771 772 /* Get CPU information */ 773 info = memblock_alloc(sizeof(*info), 8); 774 if (!info) 775 panic("%s: Failed to allocate %zu bytes align=0x%x\n", 776 __func__, sizeof(*info), 8); 777 smp_get_core_info(info, 1); 778 /* Find boot CPU type */ 779 if (sclp.has_core_type) { 780 address = stap(); 781 for (cpu = 0; cpu < info->combined; cpu++) 782 if (info->core[cpu].core_id == address) { 783 /* The boot cpu dictates the cpu type. */ 784 boot_core_type = info->core[cpu].type; 785 break; 786 } 787 if (cpu >= info->combined) 788 panic("Could not find boot CPU type"); 789 } 790 791 /* Set multi-threading state for the current system */ 792 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 793 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 794 pcpu_set_smt(mtid); 795 796 /* Print number of CPUs */ 797 c_cpus = s_cpus = 0; 798 for (cpu = 0; cpu < info->combined; cpu++) { 799 if (sclp.has_core_type && 800 info->core[cpu].type != boot_core_type) 801 continue; 802 if (cpu < info->configured) 803 c_cpus += smp_cpu_mtid + 1; 804 else 805 s_cpus += smp_cpu_mtid + 1; 806 } 807 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 808 809 /* Add CPUs present at boot */ 810 get_online_cpus(); 811 __smp_rescan_cpus(info, 0); 812 put_online_cpus(); 813 memblock_free_early((unsigned long)info, sizeof(*info)); 814 } 815 816 static void smp_init_secondary(void) 817 { 818 int cpu = smp_processor_id(); 819 820 S390_lowcore.last_update_clock = get_tod_clock(); 821 restore_access_regs(S390_lowcore.access_regs_save_area); 822 cpu_init(); 823 preempt_disable(); 824 init_cpu_timer(); 825 vtime_init(); 826 pfault_init(); 827 notify_cpu_starting(smp_processor_id()); 828 if (topology_cpu_dedicated(cpu)) 829 set_cpu_flag(CIF_DEDICATED_CPU); 830 else 831 clear_cpu_flag(CIF_DEDICATED_CPU); 832 set_cpu_online(smp_processor_id(), true); 833 inc_irq_stat(CPU_RST); 834 local_irq_enable(); 835 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 836 } 837 838 /* 839 * Activate a secondary processor. 840 */ 841 static void __no_sanitize_address smp_start_secondary(void *cpuvoid) 842 { 843 S390_lowcore.restart_stack = (unsigned long) restart_stack; 844 S390_lowcore.restart_fn = (unsigned long) do_restart; 845 S390_lowcore.restart_data = 0; 846 S390_lowcore.restart_source = -1UL; 847 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 848 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 849 CALL_ON_STACK(smp_init_secondary, S390_lowcore.kernel_stack, 0); 850 } 851 852 /* Upping and downing of CPUs */ 853 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 854 { 855 struct pcpu *pcpu; 856 int base, i, rc; 857 858 pcpu = pcpu_devices + cpu; 859 if (pcpu->state != CPU_STATE_CONFIGURED) 860 return -EIO; 861 base = smp_get_base_cpu(cpu); 862 for (i = 0; i <= smp_cpu_mtid; i++) { 863 if (base + i < nr_cpu_ids) 864 if (cpu_online(base + i)) 865 break; 866 } 867 /* 868 * If this is the first CPU of the core to get online 869 * do an initial CPU reset. 870 */ 871 if (i > smp_cpu_mtid && 872 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 873 SIGP_CC_ORDER_CODE_ACCEPTED) 874 return -EIO; 875 876 rc = pcpu_alloc_lowcore(pcpu, cpu); 877 if (rc) 878 return rc; 879 pcpu_prepare_secondary(pcpu, cpu); 880 pcpu_attach_task(pcpu, tidle); 881 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 882 /* Wait until cpu puts itself in the online & active maps */ 883 while (!cpu_online(cpu)) 884 cpu_relax(); 885 return 0; 886 } 887 888 static unsigned int setup_possible_cpus __initdata; 889 890 static int __init _setup_possible_cpus(char *s) 891 { 892 get_option(&s, &setup_possible_cpus); 893 return 0; 894 } 895 early_param("possible_cpus", _setup_possible_cpus); 896 897 #ifdef CONFIG_HOTPLUG_CPU 898 899 int __cpu_disable(void) 900 { 901 unsigned long cregs[16]; 902 903 /* Handle possible pending IPIs */ 904 smp_handle_ext_call(); 905 set_cpu_online(smp_processor_id(), false); 906 /* Disable pseudo page faults on this cpu. */ 907 pfault_fini(); 908 /* Disable interrupt sources via control register. */ 909 __ctl_store(cregs, 0, 15); 910 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 911 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 912 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 913 __ctl_load(cregs, 0, 15); 914 clear_cpu_flag(CIF_NOHZ_DELAY); 915 return 0; 916 } 917 918 void __cpu_die(unsigned int cpu) 919 { 920 struct pcpu *pcpu; 921 922 /* Wait until target cpu is down */ 923 pcpu = pcpu_devices + cpu; 924 while (!pcpu_stopped(pcpu)) 925 cpu_relax(); 926 pcpu_free_lowcore(pcpu); 927 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 928 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 929 } 930 931 void __noreturn cpu_die(void) 932 { 933 idle_task_exit(); 934 __bpon(); 935 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 936 for (;;) ; 937 } 938 939 #endif /* CONFIG_HOTPLUG_CPU */ 940 941 void __init smp_fill_possible_mask(void) 942 { 943 unsigned int possible, sclp_max, cpu; 944 945 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 946 sclp_max = min(smp_max_threads, sclp_max); 947 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 948 possible = setup_possible_cpus ?: nr_cpu_ids; 949 possible = min(possible, sclp_max); 950 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 951 set_cpu_possible(cpu, true); 952 } 953 954 void __init smp_prepare_cpus(unsigned int max_cpus) 955 { 956 /* request the 0x1201 emergency signal external interrupt */ 957 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 958 panic("Couldn't request external interrupt 0x1201"); 959 /* request the 0x1202 external call external interrupt */ 960 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 961 panic("Couldn't request external interrupt 0x1202"); 962 } 963 964 void __init smp_prepare_boot_cpu(void) 965 { 966 struct pcpu *pcpu = pcpu_devices; 967 968 WARN_ON(!cpu_present(0) || !cpu_online(0)); 969 pcpu->state = CPU_STATE_CONFIGURED; 970 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 971 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 972 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 973 } 974 975 void __init smp_cpus_done(unsigned int max_cpus) 976 { 977 } 978 979 void __init smp_setup_processor_id(void) 980 { 981 pcpu_devices[0].address = stap(); 982 S390_lowcore.cpu_nr = 0; 983 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 984 S390_lowcore.spinlock_index = 0; 985 } 986 987 /* 988 * the frequency of the profiling timer can be changed 989 * by writing a multiplier value into /proc/profile. 990 * 991 * usually you want to run this on all CPUs ;) 992 */ 993 int setup_profiling_timer(unsigned int multiplier) 994 { 995 return 0; 996 } 997 998 #ifdef CONFIG_HOTPLUG_CPU 999 static ssize_t cpu_configure_show(struct device *dev, 1000 struct device_attribute *attr, char *buf) 1001 { 1002 ssize_t count; 1003 1004 mutex_lock(&smp_cpu_state_mutex); 1005 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 1006 mutex_unlock(&smp_cpu_state_mutex); 1007 return count; 1008 } 1009 1010 static ssize_t cpu_configure_store(struct device *dev, 1011 struct device_attribute *attr, 1012 const char *buf, size_t count) 1013 { 1014 struct pcpu *pcpu; 1015 int cpu, val, rc, i; 1016 char delim; 1017 1018 if (sscanf(buf, "%d %c", &val, &delim) != 1) 1019 return -EINVAL; 1020 if (val != 0 && val != 1) 1021 return -EINVAL; 1022 get_online_cpus(); 1023 mutex_lock(&smp_cpu_state_mutex); 1024 rc = -EBUSY; 1025 /* disallow configuration changes of online cpus and cpu 0 */ 1026 cpu = dev->id; 1027 cpu = smp_get_base_cpu(cpu); 1028 if (cpu == 0) 1029 goto out; 1030 for (i = 0; i <= smp_cpu_mtid; i++) 1031 if (cpu_online(cpu + i)) 1032 goto out; 1033 pcpu = pcpu_devices + cpu; 1034 rc = 0; 1035 switch (val) { 1036 case 0: 1037 if (pcpu->state != CPU_STATE_CONFIGURED) 1038 break; 1039 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1040 if (rc) 1041 break; 1042 for (i = 0; i <= smp_cpu_mtid; i++) { 1043 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1044 continue; 1045 pcpu[i].state = CPU_STATE_STANDBY; 1046 smp_cpu_set_polarization(cpu + i, 1047 POLARIZATION_UNKNOWN); 1048 } 1049 topology_expect_change(); 1050 break; 1051 case 1: 1052 if (pcpu->state != CPU_STATE_STANDBY) 1053 break; 1054 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1055 if (rc) 1056 break; 1057 for (i = 0; i <= smp_cpu_mtid; i++) { 1058 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1059 continue; 1060 pcpu[i].state = CPU_STATE_CONFIGURED; 1061 smp_cpu_set_polarization(cpu + i, 1062 POLARIZATION_UNKNOWN); 1063 } 1064 topology_expect_change(); 1065 break; 1066 default: 1067 break; 1068 } 1069 out: 1070 mutex_unlock(&smp_cpu_state_mutex); 1071 put_online_cpus(); 1072 return rc ? rc : count; 1073 } 1074 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1075 #endif /* CONFIG_HOTPLUG_CPU */ 1076 1077 static ssize_t show_cpu_address(struct device *dev, 1078 struct device_attribute *attr, char *buf) 1079 { 1080 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1081 } 1082 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1083 1084 static struct attribute *cpu_common_attrs[] = { 1085 #ifdef CONFIG_HOTPLUG_CPU 1086 &dev_attr_configure.attr, 1087 #endif 1088 &dev_attr_address.attr, 1089 NULL, 1090 }; 1091 1092 static struct attribute_group cpu_common_attr_group = { 1093 .attrs = cpu_common_attrs, 1094 }; 1095 1096 static struct attribute *cpu_online_attrs[] = { 1097 &dev_attr_idle_count.attr, 1098 &dev_attr_idle_time_us.attr, 1099 NULL, 1100 }; 1101 1102 static struct attribute_group cpu_online_attr_group = { 1103 .attrs = cpu_online_attrs, 1104 }; 1105 1106 static int smp_cpu_online(unsigned int cpu) 1107 { 1108 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1109 1110 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1111 } 1112 static int smp_cpu_pre_down(unsigned int cpu) 1113 { 1114 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1115 1116 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1117 return 0; 1118 } 1119 1120 static int smp_add_present_cpu(int cpu) 1121 { 1122 struct device *s; 1123 struct cpu *c; 1124 int rc; 1125 1126 c = kzalloc(sizeof(*c), GFP_KERNEL); 1127 if (!c) 1128 return -ENOMEM; 1129 per_cpu(cpu_device, cpu) = c; 1130 s = &c->dev; 1131 c->hotpluggable = 1; 1132 rc = register_cpu(c, cpu); 1133 if (rc) 1134 goto out; 1135 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1136 if (rc) 1137 goto out_cpu; 1138 rc = topology_cpu_init(c); 1139 if (rc) 1140 goto out_topology; 1141 return 0; 1142 1143 out_topology: 1144 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1145 out_cpu: 1146 #ifdef CONFIG_HOTPLUG_CPU 1147 unregister_cpu(c); 1148 #endif 1149 out: 1150 return rc; 1151 } 1152 1153 #ifdef CONFIG_HOTPLUG_CPU 1154 1155 int __ref smp_rescan_cpus(void) 1156 { 1157 struct sclp_core_info *info; 1158 int nr; 1159 1160 info = kzalloc(sizeof(*info), GFP_KERNEL); 1161 if (!info) 1162 return -ENOMEM; 1163 smp_get_core_info(info, 0); 1164 get_online_cpus(); 1165 mutex_lock(&smp_cpu_state_mutex); 1166 nr = __smp_rescan_cpus(info, 1); 1167 mutex_unlock(&smp_cpu_state_mutex); 1168 put_online_cpus(); 1169 kfree(info); 1170 if (nr) 1171 topology_schedule_update(); 1172 return 0; 1173 } 1174 1175 static ssize_t __ref rescan_store(struct device *dev, 1176 struct device_attribute *attr, 1177 const char *buf, 1178 size_t count) 1179 { 1180 int rc; 1181 1182 rc = lock_device_hotplug_sysfs(); 1183 if (rc) 1184 return rc; 1185 rc = smp_rescan_cpus(); 1186 unlock_device_hotplug(); 1187 return rc ? rc : count; 1188 } 1189 static DEVICE_ATTR_WO(rescan); 1190 #endif /* CONFIG_HOTPLUG_CPU */ 1191 1192 static int __init s390_smp_init(void) 1193 { 1194 int cpu, rc = 0; 1195 1196 #ifdef CONFIG_HOTPLUG_CPU 1197 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1198 if (rc) 1199 return rc; 1200 #endif 1201 for_each_present_cpu(cpu) { 1202 rc = smp_add_present_cpu(cpu); 1203 if (rc) 1204 goto out; 1205 } 1206 1207 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1208 smp_cpu_online, smp_cpu_pre_down); 1209 rc = rc <= 0 ? rc : 0; 1210 out: 1211 return rc; 1212 } 1213 subsys_initcall(s390_smp_init); 1214