1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Performance event support - Processor Activity Instrumentation Facility 4 * 5 * Copyright IBM Corp. 2022 6 * Author(s): Thomas Richter <tmricht@linux.ibm.com> 7 */ 8 #define KMSG_COMPONENT "pai_crypto" 9 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 10 11 #include <linux/kernel.h> 12 #include <linux/kernel_stat.h> 13 #include <linux/percpu.h> 14 #include <linux/notifier.h> 15 #include <linux/init.h> 16 #include <linux/export.h> 17 #include <linux/io.h> 18 #include <linux/perf_event.h> 19 20 #include <asm/ctl_reg.h> 21 #include <asm/pai.h> 22 #include <asm/debug.h> 23 24 static debug_info_t *cfm_dbg; 25 static unsigned int paicrypt_cnt; /* Size of the mapped counter sets */ 26 /* extracted with QPACI instruction */ 27 28 DEFINE_STATIC_KEY_FALSE(pai_key); 29 30 struct pai_userdata { 31 u16 num; 32 u64 value; 33 } __packed; 34 35 struct paicrypt_map { 36 unsigned long *page; /* Page for CPU to store counters */ 37 struct pai_userdata *save; /* Page to store no-zero counters */ 38 unsigned int users; /* # of PAI crypto users */ 39 unsigned int sampler; /* # of PAI crypto samplers */ 40 unsigned int counter; /* # of PAI crypto counters */ 41 struct perf_event *event; /* Perf event for sampling */ 42 }; 43 44 static DEFINE_PER_CPU(struct paicrypt_map, paicrypt_map); 45 46 /* Release the PMU if event is the last perf event */ 47 static DEFINE_MUTEX(pai_reserve_mutex); 48 49 /* Adjust usage counters and remove allocated memory when all users are 50 * gone. 51 */ 52 static void paicrypt_event_destroy(struct perf_event *event) 53 { 54 struct paicrypt_map *cpump = per_cpu_ptr(&paicrypt_map, event->cpu); 55 56 cpump->event = NULL; 57 static_branch_dec(&pai_key); 58 mutex_lock(&pai_reserve_mutex); 59 if (event->attr.sample_period) 60 cpump->sampler -= 1; 61 else 62 cpump->counter -= 1; 63 debug_sprintf_event(cfm_dbg, 5, "%s event %#llx cpu %d" 64 " sampler %d counter %d\n", __func__, 65 event->attr.config, event->cpu, cpump->sampler, 66 cpump->counter); 67 if (!cpump->counter && !cpump->sampler) { 68 debug_sprintf_event(cfm_dbg, 4, "%s page %#lx save %p\n", 69 __func__, (unsigned long)cpump->page, 70 cpump->save); 71 free_page((unsigned long)cpump->page); 72 cpump->page = NULL; 73 kvfree(cpump->save); 74 cpump->save = NULL; 75 } 76 mutex_unlock(&pai_reserve_mutex); 77 } 78 79 static u64 paicrypt_getctr(struct paicrypt_map *cpump, int nr, bool kernel) 80 { 81 if (kernel) 82 nr += PAI_CRYPTO_MAXCTR; 83 return cpump->page[nr]; 84 } 85 86 /* Read the counter values. Return value from location in CMP. For event 87 * CRYPTO_ALL sum up all events. 88 */ 89 static u64 paicrypt_getdata(struct perf_event *event, bool kernel) 90 { 91 struct paicrypt_map *cpump = this_cpu_ptr(&paicrypt_map); 92 u64 sum = 0; 93 int i; 94 95 if (event->attr.config != PAI_CRYPTO_BASE) { 96 return paicrypt_getctr(cpump, 97 event->attr.config - PAI_CRYPTO_BASE, 98 kernel); 99 } 100 101 for (i = 1; i <= paicrypt_cnt; i++) { 102 u64 val = paicrypt_getctr(cpump, i, kernel); 103 104 if (!val) 105 continue; 106 sum += val; 107 } 108 return sum; 109 } 110 111 static u64 paicrypt_getall(struct perf_event *event) 112 { 113 u64 sum = 0; 114 115 if (!event->attr.exclude_kernel) 116 sum += paicrypt_getdata(event, true); 117 if (!event->attr.exclude_user) 118 sum += paicrypt_getdata(event, false); 119 120 return sum; 121 } 122 123 /* Used to avoid races in checking concurrent access of counting and 124 * sampling for crypto events 125 * 126 * Only one instance of event pai_crypto/CRYPTO_ALL/ for sampling is 127 * allowed and when this event is running, no counting event is allowed. 128 * Several counting events are allowed in parallel, but no sampling event 129 * is allowed while one (or more) counting events are running. 130 * 131 * This function is called in process context and it is save to block. 132 * When the event initialization functions fails, no other call back will 133 * be invoked. 134 * 135 * Allocate the memory for the event. 136 */ 137 static int paicrypt_busy(struct perf_event_attr *a, struct paicrypt_map *cpump) 138 { 139 unsigned int *use_ptr; 140 int rc = 0; 141 142 mutex_lock(&pai_reserve_mutex); 143 if (a->sample_period) { /* Sampling requested */ 144 use_ptr = &cpump->sampler; 145 if (cpump->counter || cpump->sampler) 146 rc = -EBUSY; /* ... sampling/counting active */ 147 } else { /* Counting requested */ 148 use_ptr = &cpump->counter; 149 if (cpump->sampler) 150 rc = -EBUSY; /* ... and sampling active */ 151 } 152 if (rc) 153 goto unlock; 154 155 /* Allocate memory for counter page and counter extraction. 156 * Only the first counting event has to allocate a page. 157 */ 158 if (cpump->page) 159 goto unlock; 160 161 rc = -ENOMEM; 162 cpump->page = (unsigned long *)get_zeroed_page(GFP_KERNEL); 163 if (!cpump->page) 164 goto unlock; 165 cpump->save = kvmalloc_array(paicrypt_cnt + 1, 166 sizeof(struct pai_userdata), GFP_KERNEL); 167 if (!cpump->save) { 168 free_page((unsigned long)cpump->page); 169 cpump->page = NULL; 170 goto unlock; 171 } 172 rc = 0; 173 174 unlock: 175 /* If rc is non-zero, do not increment counter/sampler. */ 176 if (!rc) 177 *use_ptr += 1; 178 debug_sprintf_event(cfm_dbg, 5, "%s sample_period %#llx sampler %d" 179 " counter %d page %#lx save %p rc %d\n", __func__, 180 a->sample_period, cpump->sampler, cpump->counter, 181 (unsigned long)cpump->page, cpump->save, rc); 182 mutex_unlock(&pai_reserve_mutex); 183 return rc; 184 } 185 186 /* Might be called on different CPU than the one the event is intended for. */ 187 static int paicrypt_event_init(struct perf_event *event) 188 { 189 struct perf_event_attr *a = &event->attr; 190 struct paicrypt_map *cpump; 191 int rc; 192 193 /* PAI crypto PMU registered as PERF_TYPE_RAW, check event type */ 194 if (a->type != PERF_TYPE_RAW && event->pmu->type != a->type) 195 return -ENOENT; 196 /* PAI crypto event must be valid */ 197 if (a->config > PAI_CRYPTO_BASE + paicrypt_cnt) 198 return -EINVAL; 199 /* Allow only CPU wide operation, no process context for now. */ 200 if (event->hw.target || event->cpu == -1) 201 return -ENOENT; 202 /* Allow only CRYPTO_ALL for sampling. */ 203 if (a->sample_period && a->config != PAI_CRYPTO_BASE) 204 return -EINVAL; 205 206 cpump = per_cpu_ptr(&paicrypt_map, event->cpu); 207 rc = paicrypt_busy(a, cpump); 208 if (rc) 209 return rc; 210 211 cpump->event = event; 212 event->destroy = paicrypt_event_destroy; 213 214 if (a->sample_period) { 215 a->sample_period = 1; 216 a->freq = 0; 217 /* Register for paicrypt_sched_task() to be called */ 218 event->attach_state |= PERF_ATTACH_SCHED_CB; 219 /* Add raw data which contain the memory mapped counters */ 220 a->sample_type |= PERF_SAMPLE_RAW; 221 /* Turn off inheritance */ 222 a->inherit = 0; 223 } 224 225 static_branch_inc(&pai_key); 226 return 0; 227 } 228 229 static void paicrypt_read(struct perf_event *event) 230 { 231 u64 prev, new, delta; 232 233 prev = local64_read(&event->hw.prev_count); 234 new = paicrypt_getall(event); 235 local64_set(&event->hw.prev_count, new); 236 delta = (prev <= new) ? new - prev 237 : (-1ULL - prev) + new + 1; /* overflow */ 238 local64_add(delta, &event->count); 239 } 240 241 static void paicrypt_start(struct perf_event *event, int flags) 242 { 243 u64 sum; 244 245 sum = paicrypt_getall(event); /* Get current value */ 246 local64_set(&event->hw.prev_count, sum); 247 local64_set(&event->count, 0); 248 } 249 250 static int paicrypt_add(struct perf_event *event, int flags) 251 { 252 struct paicrypt_map *cpump = this_cpu_ptr(&paicrypt_map); 253 unsigned long ccd; 254 255 if (cpump->users++ == 0) { 256 ccd = virt_to_phys(cpump->page) | PAI_CRYPTO_KERNEL_OFFSET; 257 WRITE_ONCE(S390_lowcore.ccd, ccd); 258 __ctl_set_bit(0, 50); 259 } 260 cpump->event = event; 261 if (flags & PERF_EF_START && !event->attr.sample_period) { 262 /* Only counting needs initial counter value */ 263 paicrypt_start(event, PERF_EF_RELOAD); 264 } 265 event->hw.state = 0; 266 if (event->attr.sample_period) 267 perf_sched_cb_inc(event->pmu); 268 return 0; 269 } 270 271 static void paicrypt_stop(struct perf_event *event, int flags) 272 { 273 paicrypt_read(event); 274 event->hw.state = PERF_HES_STOPPED; 275 } 276 277 static void paicrypt_del(struct perf_event *event, int flags) 278 { 279 struct paicrypt_map *cpump = this_cpu_ptr(&paicrypt_map); 280 281 if (event->attr.sample_period) 282 perf_sched_cb_dec(event->pmu); 283 if (!event->attr.sample_period) 284 /* Only counting needs to read counter */ 285 paicrypt_stop(event, PERF_EF_UPDATE); 286 if (cpump->users-- == 1) { 287 __ctl_clear_bit(0, 50); 288 WRITE_ONCE(S390_lowcore.ccd, 0); 289 } 290 } 291 292 /* Create raw data and save it in buffer. Returns number of bytes copied. 293 * Saves only positive counter entries of the form 294 * 2 bytes: Number of counter 295 * 8 bytes: Value of counter 296 */ 297 static size_t paicrypt_copy(struct pai_userdata *userdata, 298 struct paicrypt_map *cpump, 299 bool exclude_user, bool exclude_kernel) 300 { 301 int i, outidx = 0; 302 303 for (i = 1; i <= paicrypt_cnt; i++) { 304 u64 val = 0; 305 306 if (!exclude_kernel) 307 val += paicrypt_getctr(cpump, i, true); 308 if (!exclude_user) 309 val += paicrypt_getctr(cpump, i, false); 310 if (val) { 311 userdata[outidx].num = i; 312 userdata[outidx].value = val; 313 outidx++; 314 } 315 } 316 return outidx * sizeof(struct pai_userdata); 317 } 318 319 static int paicrypt_push_sample(void) 320 { 321 struct paicrypt_map *cpump = this_cpu_ptr(&paicrypt_map); 322 struct perf_event *event = cpump->event; 323 struct perf_sample_data data; 324 struct perf_raw_record raw; 325 struct pt_regs regs; 326 size_t rawsize; 327 int overflow; 328 329 if (!cpump->event) /* No event active */ 330 return 0; 331 rawsize = paicrypt_copy(cpump->save, cpump, 332 cpump->event->attr.exclude_user, 333 cpump->event->attr.exclude_kernel); 334 if (!rawsize) /* No incremented counters */ 335 return 0; 336 337 /* Setup perf sample */ 338 memset(®s, 0, sizeof(regs)); 339 memset(&raw, 0, sizeof(raw)); 340 memset(&data, 0, sizeof(data)); 341 perf_sample_data_init(&data, 0, event->hw.last_period); 342 if (event->attr.sample_type & PERF_SAMPLE_TID) { 343 data.tid_entry.pid = task_tgid_nr(current); 344 data.tid_entry.tid = task_pid_nr(current); 345 } 346 if (event->attr.sample_type & PERF_SAMPLE_TIME) 347 data.time = event->clock(); 348 if (event->attr.sample_type & (PERF_SAMPLE_ID | PERF_SAMPLE_IDENTIFIER)) 349 data.id = event->id; 350 if (event->attr.sample_type & PERF_SAMPLE_CPU) { 351 data.cpu_entry.cpu = smp_processor_id(); 352 data.cpu_entry.reserved = 0; 353 } 354 if (event->attr.sample_type & PERF_SAMPLE_RAW) { 355 raw.frag.size = rawsize; 356 raw.frag.data = cpump->save; 357 raw.size = raw.frag.size; 358 data.raw = &raw; 359 } 360 361 overflow = perf_event_overflow(event, &data, ®s); 362 perf_event_update_userpage(event); 363 /* Clear lowcore page after read */ 364 memset(cpump->page, 0, PAGE_SIZE); 365 return overflow; 366 } 367 368 /* Called on schedule-in and schedule-out. No access to event structure, 369 * but for sampling only event CRYPTO_ALL is allowed. 370 */ 371 static void paicrypt_sched_task(struct perf_event_context *ctx, bool sched_in) 372 { 373 /* We started with a clean page on event installation. So read out 374 * results on schedule_out and if page was dirty, clear values. 375 */ 376 if (!sched_in) 377 paicrypt_push_sample(); 378 } 379 380 /* Attribute definitions for paicrypt interface. As with other CPU 381 * Measurement Facilities, there is one attribute per mapped counter. 382 * The number of mapped counters may vary per machine generation. Use 383 * the QUERY PROCESSOR ACTIVITY COUNTER INFORMATION (QPACI) instruction 384 * to determine the number of mapped counters. The instructions returns 385 * a positive number, which is the highest number of supported counters. 386 * All counters less than this number are also supported, there are no 387 * holes. A returned number of zero means no support for mapped counters. 388 * 389 * The identification of the counter is a unique number. The chosen range 390 * is 0x1000 + offset in mapped kernel page. 391 * All CPU Measurement Facility counters identifiers must be unique and 392 * the numbers from 0 to 496 are already used for the CPU Measurement 393 * Counter facility. Numbers 0xb0000, 0xbc000 and 0xbd000 are already 394 * used for the CPU Measurement Sampling facility. 395 */ 396 PMU_FORMAT_ATTR(event, "config:0-63"); 397 398 static struct attribute *paicrypt_format_attr[] = { 399 &format_attr_event.attr, 400 NULL, 401 }; 402 403 static struct attribute_group paicrypt_events_group = { 404 .name = "events", 405 .attrs = NULL /* Filled in attr_event_init() */ 406 }; 407 408 static struct attribute_group paicrypt_format_group = { 409 .name = "format", 410 .attrs = paicrypt_format_attr, 411 }; 412 413 static const struct attribute_group *paicrypt_attr_groups[] = { 414 &paicrypt_events_group, 415 &paicrypt_format_group, 416 NULL, 417 }; 418 419 /* Performance monitoring unit for mapped counters */ 420 static struct pmu paicrypt = { 421 .task_ctx_nr = perf_invalid_context, 422 .event_init = paicrypt_event_init, 423 .add = paicrypt_add, 424 .del = paicrypt_del, 425 .start = paicrypt_start, 426 .stop = paicrypt_stop, 427 .read = paicrypt_read, 428 .sched_task = paicrypt_sched_task, 429 .attr_groups = paicrypt_attr_groups 430 }; 431 432 /* List of symbolic PAI counter names. */ 433 static const char * const paicrypt_ctrnames[] = { 434 [0] = "CRYPTO_ALL", 435 [1] = "KM_DEA", 436 [2] = "KM_TDEA_128", 437 [3] = "KM_TDEA_192", 438 [4] = "KM_ENCRYPTED_DEA", 439 [5] = "KM_ENCRYPTED_TDEA_128", 440 [6] = "KM_ENCRYPTED_TDEA_192", 441 [7] = "KM_AES_128", 442 [8] = "KM_AES_192", 443 [9] = "KM_AES_256", 444 [10] = "KM_ENCRYPTED_AES_128", 445 [11] = "KM_ENCRYPTED_AES_192", 446 [12] = "KM_ENCRYPTED_AES_256", 447 [13] = "KM_XTS_AES_128", 448 [14] = "KM_XTS_AES_256", 449 [15] = "KM_XTS_ENCRYPTED_AES_128", 450 [16] = "KM_XTS_ENCRYPTED_AES_256", 451 [17] = "KMC_DEA", 452 [18] = "KMC_TDEA_128", 453 [19] = "KMC_TDEA_192", 454 [20] = "KMC_ENCRYPTED_DEA", 455 [21] = "KMC_ENCRYPTED_TDEA_128", 456 [22] = "KMC_ENCRYPTED_TDEA_192", 457 [23] = "KMC_AES_128", 458 [24] = "KMC_AES_192", 459 [25] = "KMC_AES_256", 460 [26] = "KMC_ENCRYPTED_AES_128", 461 [27] = "KMC_ENCRYPTED_AES_192", 462 [28] = "KMC_ENCRYPTED_AES_256", 463 [29] = "KMC_PRNG", 464 [30] = "KMA_GCM_AES_128", 465 [31] = "KMA_GCM_AES_192", 466 [32] = "KMA_GCM_AES_256", 467 [33] = "KMA_GCM_ENCRYPTED_AES_128", 468 [34] = "KMA_GCM_ENCRYPTED_AES_192", 469 [35] = "KMA_GCM_ENCRYPTED_AES_256", 470 [36] = "KMF_DEA", 471 [37] = "KMF_TDEA_128", 472 [38] = "KMF_TDEA_192", 473 [39] = "KMF_ENCRYPTED_DEA", 474 [40] = "KMF_ENCRYPTED_TDEA_128", 475 [41] = "KMF_ENCRYPTED_TDEA_192", 476 [42] = "KMF_AES_128", 477 [43] = "KMF_AES_192", 478 [44] = "KMF_AES_256", 479 [45] = "KMF_ENCRYPTED_AES_128", 480 [46] = "KMF_ENCRYPTED_AES_192", 481 [47] = "KMF_ENCRYPTED_AES_256", 482 [48] = "KMCTR_DEA", 483 [49] = "KMCTR_TDEA_128", 484 [50] = "KMCTR_TDEA_192", 485 [51] = "KMCTR_ENCRYPTED_DEA", 486 [52] = "KMCTR_ENCRYPTED_TDEA_128", 487 [53] = "KMCTR_ENCRYPTED_TDEA_192", 488 [54] = "KMCTR_AES_128", 489 [55] = "KMCTR_AES_192", 490 [56] = "KMCTR_AES_256", 491 [57] = "KMCTR_ENCRYPTED_AES_128", 492 [58] = "KMCTR_ENCRYPTED_AES_192", 493 [59] = "KMCTR_ENCRYPTED_AES_256", 494 [60] = "KMO_DEA", 495 [61] = "KMO_TDEA_128", 496 [62] = "KMO_TDEA_192", 497 [63] = "KMO_ENCRYPTED_DEA", 498 [64] = "KMO_ENCRYPTED_TDEA_128", 499 [65] = "KMO_ENCRYPTED_TDEA_192", 500 [66] = "KMO_AES_128", 501 [67] = "KMO_AES_192", 502 [68] = "KMO_AES_256", 503 [69] = "KMO_ENCRYPTED_AES_128", 504 [70] = "KMO_ENCRYPTED_AES_192", 505 [71] = "KMO_ENCRYPTED_AES_256", 506 [72] = "KIMD_SHA_1", 507 [73] = "KIMD_SHA_256", 508 [74] = "KIMD_SHA_512", 509 [75] = "KIMD_SHA3_224", 510 [76] = "KIMD_SHA3_256", 511 [77] = "KIMD_SHA3_384", 512 [78] = "KIMD_SHA3_512", 513 [79] = "KIMD_SHAKE_128", 514 [80] = "KIMD_SHAKE_256", 515 [81] = "KIMD_GHASH", 516 [82] = "KLMD_SHA_1", 517 [83] = "KLMD_SHA_256", 518 [84] = "KLMD_SHA_512", 519 [85] = "KLMD_SHA3_224", 520 [86] = "KLMD_SHA3_256", 521 [87] = "KLMD_SHA3_384", 522 [88] = "KLMD_SHA3_512", 523 [89] = "KLMD_SHAKE_128", 524 [90] = "KLMD_SHAKE_256", 525 [91] = "KMAC_DEA", 526 [92] = "KMAC_TDEA_128", 527 [93] = "KMAC_TDEA_192", 528 [94] = "KMAC_ENCRYPTED_DEA", 529 [95] = "KMAC_ENCRYPTED_TDEA_128", 530 [96] = "KMAC_ENCRYPTED_TDEA_192", 531 [97] = "KMAC_AES_128", 532 [98] = "KMAC_AES_192", 533 [99] = "KMAC_AES_256", 534 [100] = "KMAC_ENCRYPTED_AES_128", 535 [101] = "KMAC_ENCRYPTED_AES_192", 536 [102] = "KMAC_ENCRYPTED_AES_256", 537 [103] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_DEA", 538 [104] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_TDEA_128", 539 [105] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_TDEA_192", 540 [106] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_DEA", 541 [107] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_TDEA_128", 542 [108] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_TDEA_192", 543 [109] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_128", 544 [110] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_192", 545 [111] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_256", 546 [112] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_128", 547 [113] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_192", 548 [114] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_256A", 549 [115] = "PCC_COMPUTE_XTS_PARAMETER_USING_AES_128", 550 [116] = "PCC_COMPUTE_XTS_PARAMETER_USING_AES_256", 551 [117] = "PCC_COMPUTE_XTS_PARAMETER_USING_ENCRYPTED_AES_128", 552 [118] = "PCC_COMPUTE_XTS_PARAMETER_USING_ENCRYPTED_AES_256", 553 [119] = "PCC_SCALAR_MULTIPLY_P256", 554 [120] = "PCC_SCALAR_MULTIPLY_P384", 555 [121] = "PCC_SCALAR_MULTIPLY_P521", 556 [122] = "PCC_SCALAR_MULTIPLY_ED25519", 557 [123] = "PCC_SCALAR_MULTIPLY_ED448", 558 [124] = "PCC_SCALAR_MULTIPLY_X25519", 559 [125] = "PCC_SCALAR_MULTIPLY_X448", 560 [126] = "PRNO_SHA_512_DRNG", 561 [127] = "PRNO_TRNG_QUERY_RAW_TO_CONDITIONED_RATIO", 562 [128] = "PRNO_TRNG", 563 [129] = "KDSA_ECDSA_VERIFY_P256", 564 [130] = "KDSA_ECDSA_VERIFY_P384", 565 [131] = "KDSA_ECDSA_VERIFY_P521", 566 [132] = "KDSA_ECDSA_SIGN_P256", 567 [133] = "KDSA_ECDSA_SIGN_P384", 568 [134] = "KDSA_ECDSA_SIGN_P521", 569 [135] = "KDSA_ENCRYPTED_ECDSA_SIGN_P256", 570 [136] = "KDSA_ENCRYPTED_ECDSA_SIGN_P384", 571 [137] = "KDSA_ENCRYPTED_ECDSA_SIGN_P521", 572 [138] = "KDSA_EDDSA_VERIFY_ED25519", 573 [139] = "KDSA_EDDSA_VERIFY_ED448", 574 [140] = "KDSA_EDDSA_SIGN_ED25519", 575 [141] = "KDSA_EDDSA_SIGN_ED448", 576 [142] = "KDSA_ENCRYPTED_EDDSA_SIGN_ED25519", 577 [143] = "KDSA_ENCRYPTED_EDDSA_SIGN_ED448", 578 [144] = "PCKMO_ENCRYPT_DEA_KEY", 579 [145] = "PCKMO_ENCRYPT_TDEA_128_KEY", 580 [146] = "PCKMO_ENCRYPT_TDEA_192_KEY", 581 [147] = "PCKMO_ENCRYPT_AES_128_KEY", 582 [148] = "PCKMO_ENCRYPT_AES_192_KEY", 583 [149] = "PCKMO_ENCRYPT_AES_256_KEY", 584 [150] = "PCKMO_ENCRYPT_ECC_P256_KEY", 585 [151] = "PCKMO_ENCRYPT_ECC_P384_KEY", 586 [152] = "PCKMO_ENCRYPT_ECC_P521_KEY", 587 [153] = "PCKMO_ENCRYPT_ECC_ED25519_KEY", 588 [154] = "PCKMO_ENCRYPT_ECC_ED448_KEY", 589 [155] = "IBM_RESERVED_155", 590 [156] = "IBM_RESERVED_156", 591 }; 592 593 static void __init attr_event_free(struct attribute **attrs, int num) 594 { 595 struct perf_pmu_events_attr *pa; 596 int i; 597 598 for (i = 0; i < num; i++) { 599 struct device_attribute *dap; 600 601 dap = container_of(attrs[i], struct device_attribute, attr); 602 pa = container_of(dap, struct perf_pmu_events_attr, attr); 603 kfree(pa); 604 } 605 kfree(attrs); 606 } 607 608 static int __init attr_event_init_one(struct attribute **attrs, int num) 609 { 610 struct perf_pmu_events_attr *pa; 611 612 pa = kzalloc(sizeof(*pa), GFP_KERNEL); 613 if (!pa) 614 return -ENOMEM; 615 616 sysfs_attr_init(&pa->attr.attr); 617 pa->id = PAI_CRYPTO_BASE + num; 618 pa->attr.attr.name = paicrypt_ctrnames[num]; 619 pa->attr.attr.mode = 0444; 620 pa->attr.show = cpumf_events_sysfs_show; 621 pa->attr.store = NULL; 622 attrs[num] = &pa->attr.attr; 623 return 0; 624 } 625 626 /* Create PMU sysfs event attributes on the fly. */ 627 static int __init attr_event_init(void) 628 { 629 struct attribute **attrs; 630 int ret, i; 631 632 attrs = kmalloc_array(ARRAY_SIZE(paicrypt_ctrnames) + 1, sizeof(*attrs), 633 GFP_KERNEL); 634 if (!attrs) 635 return -ENOMEM; 636 for (i = 0; i < ARRAY_SIZE(paicrypt_ctrnames); i++) { 637 ret = attr_event_init_one(attrs, i); 638 if (ret) { 639 attr_event_free(attrs, i - 1); 640 return ret; 641 } 642 } 643 attrs[i] = NULL; 644 paicrypt_events_group.attrs = attrs; 645 return 0; 646 } 647 648 static int __init paicrypt_init(void) 649 { 650 struct qpaci_info_block ib; 651 int rc; 652 653 if (!test_facility(196)) 654 return 0; 655 656 qpaci(&ib); 657 paicrypt_cnt = ib.num_cc; 658 if (paicrypt_cnt == 0) 659 return 0; 660 if (paicrypt_cnt >= PAI_CRYPTO_MAXCTR) 661 paicrypt_cnt = PAI_CRYPTO_MAXCTR - 1; 662 663 rc = attr_event_init(); /* Export known PAI crypto events */ 664 if (rc) { 665 pr_err("Creation of PMU pai_crypto /sysfs failed\n"); 666 return rc; 667 } 668 669 /* Setup s390dbf facility */ 670 cfm_dbg = debug_register(KMSG_COMPONENT, 2, 256, 128); 671 if (!cfm_dbg) { 672 pr_err("Registration of s390dbf pai_crypto failed\n"); 673 return -ENOMEM; 674 } 675 debug_register_view(cfm_dbg, &debug_sprintf_view); 676 677 rc = perf_pmu_register(&paicrypt, "pai_crypto", -1); 678 if (rc) { 679 pr_err("Registering the pai_crypto PMU failed with rc=%i\n", 680 rc); 681 debug_unregister_view(cfm_dbg, &debug_sprintf_view); 682 debug_unregister(cfm_dbg); 683 return rc; 684 } 685 return 0; 686 } 687 688 device_initcall(paicrypt_init); 689