1 /* 2 * Copyright IBM Corp. 2004, 2011 3 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>, 4 * Holger Smolinski <Holger.Smolinski@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * 7 * This file contains interrupt related functions. 8 */ 9 10 #include <linux/kernel_stat.h> 11 #include <linux/interrupt.h> 12 #include <linux/seq_file.h> 13 #include <linux/proc_fs.h> 14 #include <linux/profile.h> 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/ftrace.h> 18 #include <linux/errno.h> 19 #include <linux/slab.h> 20 #include <linux/cpu.h> 21 #include <asm/irq_regs.h> 22 #include <asm/cputime.h> 23 #include <asm/lowcore.h> 24 #include <asm/irq.h> 25 #include "entry.h" 26 27 struct irq_class { 28 char *name; 29 char *desc; 30 }; 31 32 static const struct irq_class intrclass_names[] = { 33 {.name = "EXT" }, 34 {.name = "I/O" }, 35 {.name = "CLK", .desc = "[EXT] Clock Comparator" }, 36 {.name = "EXC", .desc = "[EXT] External Call" }, 37 {.name = "EMS", .desc = "[EXT] Emergency Signal" }, 38 {.name = "TMR", .desc = "[EXT] CPU Timer" }, 39 {.name = "TAL", .desc = "[EXT] Timing Alert" }, 40 {.name = "PFL", .desc = "[EXT] Pseudo Page Fault" }, 41 {.name = "DSD", .desc = "[EXT] DASD Diag" }, 42 {.name = "VRT", .desc = "[EXT] Virtio" }, 43 {.name = "SCP", .desc = "[EXT] Service Call" }, 44 {.name = "IUC", .desc = "[EXT] IUCV" }, 45 {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling" }, 46 {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter" }, 47 {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt" }, 48 {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt" }, 49 {.name = "DAS", .desc = "[I/O] DASD" }, 50 {.name = "C15", .desc = "[I/O] 3215" }, 51 {.name = "C70", .desc = "[I/O] 3270" }, 52 {.name = "TAP", .desc = "[I/O] Tape" }, 53 {.name = "VMR", .desc = "[I/O] Unit Record Devices" }, 54 {.name = "LCS", .desc = "[I/O] LCS" }, 55 {.name = "CLW", .desc = "[I/O] CLAW" }, 56 {.name = "CTC", .desc = "[I/O] CTC" }, 57 {.name = "APB", .desc = "[I/O] AP Bus" }, 58 {.name = "CSC", .desc = "[I/O] CHSC Subchannel" }, 59 {.name = "NMI", .desc = "[NMI] Machine Check" }, 60 }; 61 62 /* 63 * show_interrupts is needed by /proc/interrupts. 64 */ 65 int show_interrupts(struct seq_file *p, void *v) 66 { 67 int i = *(loff_t *) v, j; 68 69 get_online_cpus(); 70 if (i == 0) { 71 seq_puts(p, " "); 72 for_each_online_cpu(j) 73 seq_printf(p, "CPU%d ",j); 74 seq_putc(p, '\n'); 75 } 76 77 if (i < NR_IRQS) { 78 seq_printf(p, "%s: ", intrclass_names[i].name); 79 #ifndef CONFIG_SMP 80 seq_printf(p, "%10u ", kstat_irqs(i)); 81 #else 82 for_each_online_cpu(j) 83 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 84 #endif 85 if (intrclass_names[i].desc) 86 seq_printf(p, " %s", intrclass_names[i].desc); 87 seq_putc(p, '\n'); 88 } 89 put_online_cpus(); 90 return 0; 91 } 92 93 /* 94 * Switch to the asynchronous interrupt stack for softirq execution. 95 */ 96 asmlinkage void do_softirq(void) 97 { 98 unsigned long flags, old, new; 99 100 if (in_interrupt()) 101 return; 102 103 local_irq_save(flags); 104 105 if (local_softirq_pending()) { 106 /* Get current stack pointer. */ 107 asm volatile("la %0,0(15)" : "=a" (old)); 108 /* Check against async. stack address range. */ 109 new = S390_lowcore.async_stack; 110 if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) { 111 /* Need to switch to the async. stack. */ 112 new -= STACK_FRAME_OVERHEAD; 113 ((struct stack_frame *) new)->back_chain = old; 114 115 asm volatile(" la 15,0(%0)\n" 116 " basr 14,%2\n" 117 " la 15,0(%1)\n" 118 : : "a" (new), "a" (old), 119 "a" (__do_softirq) 120 : "0", "1", "2", "3", "4", "5", "14", 121 "cc", "memory" ); 122 } else { 123 /* We are already on the async stack. */ 124 __do_softirq(); 125 } 126 } 127 128 local_irq_restore(flags); 129 } 130 131 #ifdef CONFIG_PROC_FS 132 void init_irq_proc(void) 133 { 134 struct proc_dir_entry *root_irq_dir; 135 136 root_irq_dir = proc_mkdir("irq", NULL); 137 create_prof_cpu_mask(root_irq_dir); 138 } 139 #endif 140 141 /* 142 * ext_int_hash[index] is the list head for all external interrupts that hash 143 * to this index. 144 */ 145 static struct list_head ext_int_hash[256]; 146 147 struct ext_int_info { 148 ext_int_handler_t handler; 149 u16 code; 150 struct list_head entry; 151 struct rcu_head rcu; 152 }; 153 154 /* ext_int_hash_lock protects the handler lists for external interrupts */ 155 DEFINE_SPINLOCK(ext_int_hash_lock); 156 157 static void __init init_external_interrupts(void) 158 { 159 int idx; 160 161 for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++) 162 INIT_LIST_HEAD(&ext_int_hash[idx]); 163 } 164 165 static inline int ext_hash(u16 code) 166 { 167 return (code + (code >> 9)) & 0xff; 168 } 169 170 int register_external_interrupt(u16 code, ext_int_handler_t handler) 171 { 172 struct ext_int_info *p; 173 unsigned long flags; 174 int index; 175 176 p = kmalloc(sizeof(*p), GFP_ATOMIC); 177 if (!p) 178 return -ENOMEM; 179 p->code = code; 180 p->handler = handler; 181 index = ext_hash(code); 182 183 spin_lock_irqsave(&ext_int_hash_lock, flags); 184 list_add_rcu(&p->entry, &ext_int_hash[index]); 185 spin_unlock_irqrestore(&ext_int_hash_lock, flags); 186 return 0; 187 } 188 EXPORT_SYMBOL(register_external_interrupt); 189 190 int unregister_external_interrupt(u16 code, ext_int_handler_t handler) 191 { 192 struct ext_int_info *p; 193 unsigned long flags; 194 int index = ext_hash(code); 195 196 spin_lock_irqsave(&ext_int_hash_lock, flags); 197 list_for_each_entry_rcu(p, &ext_int_hash[index], entry) { 198 if (p->code == code && p->handler == handler) { 199 list_del_rcu(&p->entry); 200 kfree_rcu(p, rcu); 201 } 202 } 203 spin_unlock_irqrestore(&ext_int_hash_lock, flags); 204 return 0; 205 } 206 EXPORT_SYMBOL(unregister_external_interrupt); 207 208 void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code, 209 unsigned int param32, unsigned long param64) 210 { 211 struct pt_regs *old_regs; 212 struct ext_int_info *p; 213 int index; 214 215 old_regs = set_irq_regs(regs); 216 irq_enter(); 217 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) { 218 /* Serve timer interrupts first. */ 219 clock_comparator_work(); 220 } 221 kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++; 222 if (ext_code.code != 0x1004) 223 __get_cpu_var(s390_idle).nohz_delay = 1; 224 225 index = ext_hash(ext_code.code); 226 rcu_read_lock(); 227 list_for_each_entry_rcu(p, &ext_int_hash[index], entry) 228 if (likely(p->code == ext_code.code)) 229 p->handler(ext_code, param32, param64); 230 rcu_read_unlock(); 231 irq_exit(); 232 set_irq_regs(old_regs); 233 } 234 235 void __init init_IRQ(void) 236 { 237 init_external_interrupts(); 238 } 239 240 static DEFINE_SPINLOCK(sc_irq_lock); 241 static int sc_irq_refcount; 242 243 void service_subclass_irq_register(void) 244 { 245 spin_lock(&sc_irq_lock); 246 if (!sc_irq_refcount) 247 ctl_set_bit(0, 9); 248 sc_irq_refcount++; 249 spin_unlock(&sc_irq_lock); 250 } 251 EXPORT_SYMBOL(service_subclass_irq_register); 252 253 void service_subclass_irq_unregister(void) 254 { 255 spin_lock(&sc_irq_lock); 256 sc_irq_refcount--; 257 if (!sc_irq_refcount) 258 ctl_clear_bit(0, 9); 259 spin_unlock(&sc_irq_lock); 260 } 261 EXPORT_SYMBOL(service_subclass_irq_unregister); 262 263 static DEFINE_SPINLOCK(ma_subclass_lock); 264 static int ma_subclass_refcount; 265 266 void measurement_alert_subclass_register(void) 267 { 268 spin_lock(&ma_subclass_lock); 269 if (!ma_subclass_refcount) 270 ctl_set_bit(0, 5); 271 ma_subclass_refcount++; 272 spin_unlock(&ma_subclass_lock); 273 } 274 EXPORT_SYMBOL(measurement_alert_subclass_register); 275 276 void measurement_alert_subclass_unregister(void) 277 { 278 spin_lock(&ma_subclass_lock); 279 ma_subclass_refcount--; 280 if (!ma_subclass_refcount) 281 ctl_clear_bit(0, 5); 282 spin_unlock(&ma_subclass_lock); 283 } 284 EXPORT_SYMBOL(measurement_alert_subclass_unregister); 285