1/* 2 * arch/s390/kernel/entry.S 3 * S390 low-level entry points. 4 * 5 * Copyright (C) IBM Corp. 1999,2006 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 7 * Hartmut Penner (hp@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 9 * Heiko Carstens <heiko.carstens@de.ibm.com> 10 */ 11 12#include <linux/sys.h> 13#include <linux/linkage.h> 14#include <linux/init.h> 15#include <asm/cache.h> 16#include <asm/lowcore.h> 17#include <asm/errno.h> 18#include <asm/ptrace.h> 19#include <asm/thread_info.h> 20#include <asm/asm-offsets.h> 21#include <asm/unistd.h> 22#include <asm/page.h> 23 24/* 25 * Stack layout for the system_call stack entry. 26 * The first few entries are identical to the user_regs_struct. 27 */ 28SP_PTREGS = STACK_FRAME_OVERHEAD 29SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS 30SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW 31SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS 32SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 33SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 34SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 35SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 36SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 37SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 38SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 39SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 40SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 41SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 42SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 43SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 44SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 45SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 46SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 47SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 48SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC 49SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP 50SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE 51 52_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ 53 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) 54_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ 55 _TIF_MCCK_PENDING) 56 57STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER 58STACK_SIZE = 1 << STACK_SHIFT 59 60#define BASED(name) name-system_call(%r13) 61 62#ifdef CONFIG_TRACE_IRQFLAGS 63 .macro TRACE_IRQS_ON 64 l %r1,BASED(.Ltrace_irq_on) 65 basr %r14,%r1 66 .endm 67 68 .macro TRACE_IRQS_OFF 69 l %r1,BASED(.Ltrace_irq_off) 70 basr %r14,%r1 71 .endm 72 73 .macro TRACE_IRQS_CHECK 74 tm SP_PSW(%r15),0x03 # irqs enabled? 75 jz 0f 76 l %r1,BASED(.Ltrace_irq_on) 77 basr %r14,%r1 78 j 1f 790: l %r1,BASED(.Ltrace_irq_off) 80 basr %r14,%r1 811: 82 .endm 83#else 84#define TRACE_IRQS_ON 85#define TRACE_IRQS_OFF 86#define TRACE_IRQS_CHECK 87#endif 88 89#ifdef CONFIG_LOCKDEP 90 .macro LOCKDEP_SYS_EXIT 91 tm SP_PSW+1(%r15),0x01 # returning to user ? 92 jz 0f 93 l %r1,BASED(.Llockdep_sys_exit) 94 basr %r14,%r1 950: 96 .endm 97#else 98#define LOCKDEP_SYS_EXIT 99#endif 100 101/* 102 * Register usage in interrupt handlers: 103 * R9 - pointer to current task structure 104 * R13 - pointer to literal pool 105 * R14 - return register for function calls 106 * R15 - kernel stack pointer 107 */ 108 109 .macro STORE_TIMER lc_offset 110#ifdef CONFIG_VIRT_CPU_ACCOUNTING 111 stpt \lc_offset 112#endif 113 .endm 114 115#ifdef CONFIG_VIRT_CPU_ACCOUNTING 116 .macro UPDATE_VTIME lc_from,lc_to,lc_sum 117 lm %r10,%r11,\lc_from 118 sl %r10,\lc_to 119 sl %r11,\lc_to+4 120 bc 3,BASED(0f) 121 sl %r10,BASED(.Lc_1) 1220: al %r10,\lc_sum 123 al %r11,\lc_sum+4 124 bc 12,BASED(1f) 125 al %r10,BASED(.Lc_1) 1261: stm %r10,%r11,\lc_sum 127 .endm 128#endif 129 130 .macro SAVE_ALL_BASE savearea 131 stm %r12,%r15,\savearea 132 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 133 .endm 134 135 .macro SAVE_ALL_SVC psworg,savearea 136 la %r12,\psworg 137 l %r15,__LC_KERNEL_STACK # problem state -> load ksp 138 .endm 139 140 .macro SAVE_ALL_SYNC psworg,savearea 141 la %r12,\psworg 142 tm \psworg+1,0x01 # test problem state bit 143 bz BASED(2f) # skip stack setup save 144 l %r15,__LC_KERNEL_STACK # problem state -> load ksp 145#ifdef CONFIG_CHECK_STACK 146 b BASED(3f) 1472: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 148 bz BASED(stack_overflow) 1493: 150#endif 1512: 152 .endm 153 154 .macro SAVE_ALL_ASYNC psworg,savearea 155 la %r12,\psworg 156 tm \psworg+1,0x01 # test problem state bit 157 bnz BASED(1f) # from user -> load async stack 158 clc \psworg+4(4),BASED(.Lcritical_end) 159 bhe BASED(0f) 160 clc \psworg+4(4),BASED(.Lcritical_start) 161 bl BASED(0f) 162 l %r14,BASED(.Lcleanup_critical) 163 basr %r14,%r14 164 tm 1(%r12),0x01 # retest problem state after cleanup 165 bnz BASED(1f) 1660: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? 167 slr %r14,%r15 168 sra %r14,STACK_SHIFT 169 be BASED(2f) 1701: l %r15,__LC_ASYNC_STACK 171#ifdef CONFIG_CHECK_STACK 172 b BASED(3f) 1732: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 174 bz BASED(stack_overflow) 1753: 176#endif 1772: 178 .endm 179 180 .macro CREATE_STACK_FRAME psworg,savearea 181 s %r15,BASED(.Lc_spsize) # make room for registers & psw 182 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 183 la %r12,\psworg 184 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 185 icm %r12,12,__LC_SVC_ILC 186 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 187 st %r12,SP_ILC(%r15) 188 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack 189 la %r12,0 190 st %r12,__SF_BACKCHAIN(%r15) # clear back chain 191 .endm 192 193 .macro RESTORE_ALL psworg,sync 194 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore 195 .if !\sync 196 ni \psworg+1,0xfd # clear wait state bit 197 .endif 198 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 199 STORE_TIMER __LC_EXIT_TIMER 200 lpsw \psworg # back to caller 201 .endm 202 203/* 204 * Scheduler resume function, called by switch_to 205 * gpr2 = (task_struct *) prev 206 * gpr3 = (task_struct *) next 207 * Returns: 208 * gpr2 = prev 209 */ 210 .globl __switch_to 211__switch_to: 212 basr %r1,0 213__switch_to_base: 214 tm __THREAD_per(%r3),0xe8 # new process is using per ? 215 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine 216 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff 217 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15) 218 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's 219 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't 220__switch_to_noper: 221 l %r4,__THREAD_info(%r2) # get thread_info of prev 222 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? 223 bz __switch_to_no_mcck-__switch_to_base(%r1) 224 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev 225 l %r4,__THREAD_info(%r3) # get thread_info of next 226 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next 227__switch_to_no_mcck: 228 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task 229 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp 230 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp 231 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task 232 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct 233 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 234 l %r3,__THREAD_info(%r3) # load thread_info from task struct 235 st %r3,__LC_THREAD_INFO 236 ahi %r3,STACK_SIZE 237 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack 238 br %r14 239 240__critical_start: 241/* 242 * SVC interrupt handler routine. System calls are synchronous events and 243 * are executed with interrupts enabled. 244 */ 245 246 .globl system_call 247system_call: 248 STORE_TIMER __LC_SYNC_ENTER_TIMER 249sysc_saveall: 250 SAVE_ALL_BASE __LC_SAVE_AREA 251 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 252 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 253 lh %r7,0x8a # get svc number from lowcore 254#ifdef CONFIG_VIRT_CPU_ACCOUNTING 255sysc_vtime: 256 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 257sysc_stime: 258 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 259sysc_update: 260 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 261#endif 262sysc_do_svc: 263 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 264 sla %r7,2 # *4 and test for svc 0 265 bnz BASED(sysc_nr_ok) # svc number > 0 266 # svc 0: system call number in %r1 267 cl %r1,BASED(.Lnr_syscalls) 268 bnl BASED(sysc_nr_ok) 269 lr %r7,%r1 # copy svc number to %r7 270 sla %r7,2 # *4 271sysc_nr_ok: 272 mvc SP_ARGS(4,%r15),SP_R7(%r15) 273sysc_do_restart: 274 l %r8,BASED(.Lsysc_table) 275 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) 276 l %r8,0(%r7,%r8) # get system call addr. 277 bnz BASED(sysc_tracesys) 278 basr %r14,%r8 # call sys_xxxx 279 st %r2,SP_R2(%r15) # store return value (change R2 on stack) 280 281sysc_return: 282 tm SP_PSW+1(%r15),0x01 # returning to user ? 283 bno BASED(sysc_restore) 284 tm __TI_flags+3(%r9),_TIF_WORK_SVC 285 bnz BASED(sysc_work) # there is work to do (signals etc.) 286sysc_restore: 287#ifdef CONFIG_TRACE_IRQFLAGS 288 la %r1,BASED(sysc_restore_trace_psw) 289 lpsw 0(%r1) 290sysc_restore_trace: 291 TRACE_IRQS_CHECK 292 LOCKDEP_SYS_EXIT 293#endif 294sysc_leave: 295 RESTORE_ALL __LC_RETURN_PSW,1 296sysc_done: 297 298#ifdef CONFIG_TRACE_IRQFLAGS 299 .align 8 300 .globl sysc_restore_trace_psw 301sysc_restore_trace_psw: 302 .long 0, sysc_restore_trace + 0x80000000 303#endif 304 305# 306# recheck if there is more work to do 307# 308sysc_work_loop: 309 tm __TI_flags+3(%r9),_TIF_WORK_SVC 310 bz BASED(sysc_restore) # there is no work to do 311# 312# One of the work bits is on. Find out which one. 313# 314sysc_work: 315 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 316 bo BASED(sysc_mcck_pending) 317 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 318 bo BASED(sysc_reschedule) 319 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) 320 bnz BASED(sysc_sigpending) 321 tm __TI_flags+3(%r9),_TIF_RESTART_SVC 322 bo BASED(sysc_restart) 323 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP 324 bo BASED(sysc_singlestep) 325 b BASED(sysc_restore) 326sysc_work_done: 327 328# 329# _TIF_NEED_RESCHED is set, call schedule 330# 331sysc_reschedule: 332 l %r1,BASED(.Lschedule) 333 la %r14,BASED(sysc_work_loop) 334 br %r1 # call scheduler 335 336# 337# _TIF_MCCK_PENDING is set, call handler 338# 339sysc_mcck_pending: 340 l %r1,BASED(.Ls390_handle_mcck) 341 la %r14,BASED(sysc_work_loop) 342 br %r1 # TIF bit will be cleared by handler 343 344# 345# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal 346# 347sysc_sigpending: 348 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 349 la %r2,SP_PTREGS(%r15) # load pt_regs 350 l %r1,BASED(.Ldo_signal) 351 basr %r14,%r1 # call do_signal 352 tm __TI_flags+3(%r9),_TIF_RESTART_SVC 353 bo BASED(sysc_restart) 354 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP 355 bo BASED(sysc_singlestep) 356 b BASED(sysc_work_loop) 357 358# 359# _TIF_RESTART_SVC is set, set up registers and restart svc 360# 361sysc_restart: 362 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC 363 l %r7,SP_R2(%r15) # load new svc number 364 sla %r7,2 365 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument 366 lm %r2,%r6,SP_R2(%r15) # load svc arguments 367 b BASED(sysc_do_restart) # restart svc 368 369# 370# _TIF_SINGLE_STEP is set, call do_single_step 371# 372sysc_singlestep: 373 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 374 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check 375 la %r2,SP_PTREGS(%r15) # address of register-save area 376 l %r1,BASED(.Lhandle_per) # load adr. of per handler 377 la %r14,BASED(sysc_return) # load adr. of system return 378 br %r1 # branch to do_single_step 379 380# 381# call trace before and after sys_call 382# 383sysc_tracesys: 384 l %r1,BASED(.Ltrace) 385 la %r2,SP_PTREGS(%r15) # load pt_regs 386 la %r3,0 387 srl %r7,2 388 st %r7,SP_R2(%r15) 389 basr %r14,%r1 390 clc SP_R2(4,%r15),BASED(.Lnr_syscalls) 391 bnl BASED(sysc_tracenogo) 392 l %r8,BASED(.Lsysc_table) 393 l %r7,SP_R2(%r15) # strace might have changed the 394 sll %r7,2 # system call 395 l %r8,0(%r7,%r8) 396sysc_tracego: 397 lm %r3,%r6,SP_R3(%r15) 398 l %r2,SP_ORIG_R2(%r15) 399 basr %r14,%r8 # call sys_xxx 400 st %r2,SP_R2(%r15) # store return value 401sysc_tracenogo: 402 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) 403 bz BASED(sysc_return) 404 l %r1,BASED(.Ltrace) 405 la %r2,SP_PTREGS(%r15) # load pt_regs 406 la %r3,1 407 la %r14,BASED(sysc_return) 408 br %r1 409 410# 411# a new process exits the kernel with ret_from_fork 412# 413 .globl ret_from_fork 414ret_from_fork: 415 l %r13,__LC_SVC_NEW_PSW+4 416 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 417 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? 418 bo BASED(0f) 419 st %r15,SP_R15(%r15) # store stack pointer for new kthread 4200: l %r1,BASED(.Lschedtail) 421 basr %r14,%r1 422 TRACE_IRQS_ON 423 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 424 b BASED(sysc_return) 425 426# 427# kernel_execve function needs to deal with pt_regs that is not 428# at the usual place 429# 430 .globl kernel_execve 431kernel_execve: 432 stm %r12,%r15,48(%r15) 433 lr %r14,%r15 434 l %r13,__LC_SVC_NEW_PSW+4 435 s %r15,BASED(.Lc_spsize) 436 st %r14,__SF_BACKCHAIN(%r15) 437 la %r12,SP_PTREGS(%r15) 438 xc 0(__PT_SIZE,%r12),0(%r12) 439 l %r1,BASED(.Ldo_execve) 440 lr %r5,%r12 441 basr %r14,%r1 442 ltr %r2,%r2 443 be BASED(0f) 444 a %r15,BASED(.Lc_spsize) 445 lm %r12,%r15,48(%r15) 446 br %r14 447 # execve succeeded. 4480: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts 449 l %r15,__LC_KERNEL_STACK # load ksp 450 s %r15,BASED(.Lc_spsize) # make room for registers & psw 451 l %r9,__LC_THREAD_INFO 452 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs 453 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) 454 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 455 l %r1,BASED(.Lexecve_tail) 456 basr %r14,%r1 457 b BASED(sysc_return) 458 459/* 460 * Program check handler routine 461 */ 462 463 .globl pgm_check_handler 464pgm_check_handler: 465/* 466 * First we need to check for a special case: 467 * Single stepping an instruction that disables the PER event mask will 468 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. 469 * For a single stepped SVC the program check handler gets control after 470 * the SVC new PSW has been loaded. But we want to execute the SVC first and 471 * then handle the PER event. Therefore we update the SVC old PSW to point 472 * to the pgm_check_handler and branch to the SVC handler after we checked 473 * if we have to load the kernel stack register. 474 * For every other possible cause for PER event without the PER mask set 475 * we just ignore the PER event (FIXME: is there anything we have to do 476 * for LPSW?). 477 */ 478 STORE_TIMER __LC_SYNC_ENTER_TIMER 479 SAVE_ALL_BASE __LC_SAVE_AREA 480 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 481 bnz BASED(pgm_per) # got per exception -> special case 482 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 483 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 484#ifdef CONFIG_VIRT_CPU_ACCOUNTING 485 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 486 bz BASED(pgm_no_vtime) 487 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 488 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 489 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 490pgm_no_vtime: 491#endif 492 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 493 TRACE_IRQS_OFF 494 l %r3,__LC_PGM_ILC # load program interruption code 495 la %r8,0x7f 496 nr %r8,%r3 497pgm_do_call: 498 l %r7,BASED(.Ljump_table) 499 sll %r8,2 500 l %r7,0(%r8,%r7) # load address of handler routine 501 la %r2,SP_PTREGS(%r15) # address of register-save area 502 la %r14,BASED(sysc_return) 503 br %r7 # branch to interrupt-handler 504 505# 506# handle per exception 507# 508pgm_per: 509 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on 510 bnz BASED(pgm_per_std) # ok, normal per event from user space 511# ok its one of the special cases, now we need to find out which one 512 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW 513 be BASED(pgm_svcper) 514# no interesting special case, ignore PER event 515 lm %r12,%r15,__LC_SAVE_AREA 516 lpsw 0x28 517 518# 519# Normal per exception 520# 521pgm_per_std: 522 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 523 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 524#ifdef CONFIG_VIRT_CPU_ACCOUNTING 525 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 526 bz BASED(pgm_no_vtime2) 527 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 528 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 529 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 530pgm_no_vtime2: 531#endif 532 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 533 TRACE_IRQS_OFF 534 l %r1,__TI_task(%r9) 535 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 536 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS 537 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 538 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 539 tm SP_PSW+1(%r15),0x01 # kernel per event ? 540 bz BASED(kernel_per) 541 l %r3,__LC_PGM_ILC # load program interruption code 542 la %r8,0x7f 543 nr %r8,%r3 # clear per-event-bit and ilc 544 be BASED(sysc_return) # only per or per+check ? 545 b BASED(pgm_do_call) 546 547# 548# it was a single stepped SVC that is causing all the trouble 549# 550pgm_svcper: 551 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 552 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 553#ifdef CONFIG_VIRT_CPU_ACCOUNTING 554 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 555 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 556 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 557#endif 558 lh %r7,0x8a # get svc number from lowcore 559 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 560 TRACE_IRQS_OFF 561 l %r1,__TI_task(%r9) 562 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 563 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS 564 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 565 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 566 TRACE_IRQS_ON 567 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 568 b BASED(sysc_do_svc) 569 570# 571# per was called from kernel, must be kprobes 572# 573kernel_per: 574 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check 575 la %r2,SP_PTREGS(%r15) # address of register-save area 576 l %r1,BASED(.Lhandle_per) # load adr. of per handler 577 la %r14,BASED(sysc_restore)# load adr. of system return 578 br %r1 # branch to do_single_step 579 580/* 581 * IO interrupt handler routine 582 */ 583 584 .globl io_int_handler 585io_int_handler: 586 STORE_TIMER __LC_ASYNC_ENTER_TIMER 587 stck __LC_INT_CLOCK 588 SAVE_ALL_BASE __LC_SAVE_AREA+16 589 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 590 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 591#ifdef CONFIG_VIRT_CPU_ACCOUNTING 592 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 593 bz BASED(io_no_vtime) 594 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 595 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 596 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 597io_no_vtime: 598#endif 599 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 600 TRACE_IRQS_OFF 601 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ 602 la %r2,SP_PTREGS(%r15) # address of register-save area 603 basr %r14,%r1 # branch to standard irq handler 604io_return: 605 tm SP_PSW+1(%r15),0x01 # returning to user ? 606#ifdef CONFIG_PREEMPT 607 bno BASED(io_preempt) # no -> check for preemptive scheduling 608#else 609 bno BASED(io_restore) # no-> skip resched & signal 610#endif 611 tm __TI_flags+3(%r9),_TIF_WORK_INT 612 bnz BASED(io_work) # there is work to do (signals etc.) 613io_restore: 614#ifdef CONFIG_TRACE_IRQFLAGS 615 la %r1,BASED(io_restore_trace_psw) 616 lpsw 0(%r1) 617io_restore_trace: 618 TRACE_IRQS_CHECK 619 LOCKDEP_SYS_EXIT 620#endif 621io_leave: 622 RESTORE_ALL __LC_RETURN_PSW,0 623io_done: 624 625#ifdef CONFIG_TRACE_IRQFLAGS 626 .align 8 627 .globl io_restore_trace_psw 628io_restore_trace_psw: 629 .long 0, io_restore_trace + 0x80000000 630#endif 631 632#ifdef CONFIG_PREEMPT 633io_preempt: 634 icm %r0,15,__TI_precount(%r9) 635 bnz BASED(io_restore) 636 l %r1,SP_R15(%r15) 637 s %r1,BASED(.Lc_spsize) 638 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 639 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 640 lr %r15,%r1 641io_resume_loop: 642 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 643 bno BASED(io_restore) 644 l %r1,BASED(.Lpreempt_schedule_irq) 645 la %r14,BASED(io_resume_loop) 646 br %r1 # call schedule 647#endif 648 649# 650# switch to kernel stack, then check the TIF bits 651# 652io_work: 653 l %r1,__LC_KERNEL_STACK 654 s %r1,BASED(.Lc_spsize) 655 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 656 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 657 lr %r15,%r1 658# 659# One of the work bits is on. Find out which one. 660# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGMASK, _TIF_NEED_RESCHED 661# and _TIF_MCCK_PENDING 662# 663io_work_loop: 664 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 665 bo BASED(io_mcck_pending) 666 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 667 bo BASED(io_reschedule) 668 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) 669 bnz BASED(io_sigpending) 670 b BASED(io_restore) 671io_work_done: 672 673# 674# _TIF_MCCK_PENDING is set, call handler 675# 676io_mcck_pending: 677 l %r1,BASED(.Ls390_handle_mcck) 678 basr %r14,%r1 # TIF bit will be cleared by handler 679 b BASED(io_work_loop) 680 681# 682# _TIF_NEED_RESCHED is set, call schedule 683# 684io_reschedule: 685 TRACE_IRQS_ON 686 l %r1,BASED(.Lschedule) 687 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 688 basr %r14,%r1 # call scheduler 689 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 690 TRACE_IRQS_OFF 691 tm __TI_flags+3(%r9),_TIF_WORK_INT 692 bz BASED(io_restore) # there is no work to do 693 b BASED(io_work_loop) 694 695# 696# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal 697# 698io_sigpending: 699 TRACE_IRQS_ON 700 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 701 la %r2,SP_PTREGS(%r15) # load pt_regs 702 l %r1,BASED(.Ldo_signal) 703 basr %r14,%r1 # call do_signal 704 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 705 TRACE_IRQS_OFF 706 b BASED(io_work_loop) 707 708/* 709 * External interrupt handler routine 710 */ 711 712 .globl ext_int_handler 713ext_int_handler: 714 STORE_TIMER __LC_ASYNC_ENTER_TIMER 715 stck __LC_INT_CLOCK 716 SAVE_ALL_BASE __LC_SAVE_AREA+16 717 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 718 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 719#ifdef CONFIG_VIRT_CPU_ACCOUNTING 720 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 721 bz BASED(ext_no_vtime) 722 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 723 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 724 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 725ext_no_vtime: 726#endif 727 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 728 TRACE_IRQS_OFF 729 la %r2,SP_PTREGS(%r15) # address of register-save area 730 lh %r3,__LC_EXT_INT_CODE # get interruption code 731 l %r1,BASED(.Ldo_extint) 732 basr %r14,%r1 733 b BASED(io_return) 734 735__critical_end: 736 737/* 738 * Machine check handler routines 739 */ 740 741 .globl mcck_int_handler 742mcck_int_handler: 743 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer 744 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs 745 SAVE_ALL_BASE __LC_SAVE_AREA+32 746 la %r12,__LC_MCK_OLD_PSW 747 tm __LC_MCCK_CODE,0x80 # system damage? 748 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid 749#ifdef CONFIG_VIRT_CPU_ACCOUNTING 750 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER 751 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA 752 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 753 bo BASED(1f) 754 la %r14,__LC_SYNC_ENTER_TIMER 755 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 756 bl BASED(0f) 757 la %r14,__LC_ASYNC_ENTER_TIMER 7580: clc 0(8,%r14),__LC_EXIT_TIMER 759 bl BASED(0f) 760 la %r14,__LC_EXIT_TIMER 7610: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 762 bl BASED(0f) 763 la %r14,__LC_LAST_UPDATE_TIMER 7640: spt 0(%r14) 765 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) 7661: 767#endif 768 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? 769 bno BASED(mcck_int_main) # no -> skip cleanup critical 770 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 771 bnz BASED(mcck_int_main) # from user -> load async stack 772 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) 773 bhe BASED(mcck_int_main) 774 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) 775 bl BASED(mcck_int_main) 776 l %r14,BASED(.Lcleanup_critical) 777 basr %r14,%r14 778mcck_int_main: 779 l %r14,__LC_PANIC_STACK # are we already on the panic stack? 780 slr %r14,%r15 781 sra %r14,PAGE_SHIFT 782 be BASED(0f) 783 l %r15,__LC_PANIC_STACK # load panic stack 7840: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 785#ifdef CONFIG_VIRT_CPU_ACCOUNTING 786 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? 787 bno BASED(mcck_no_vtime) # no -> skip cleanup critical 788 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 789 bz BASED(mcck_no_vtime) 790 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 791 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 792 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 793mcck_no_vtime: 794#endif 795 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 796 la %r2,SP_PTREGS(%r15) # load pt_regs 797 l %r1,BASED(.Ls390_mcck) 798 basr %r14,%r1 # call machine check handler 799 tm SP_PSW+1(%r15),0x01 # returning to user ? 800 bno BASED(mcck_return) 801 l %r1,__LC_KERNEL_STACK # switch to kernel stack 802 s %r1,BASED(.Lc_spsize) 803 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 804 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 805 lr %r15,%r1 806 stosm __SF_EMPTY(%r15),0x04 # turn dat on 807 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 808 bno BASED(mcck_return) 809 TRACE_IRQS_OFF 810 l %r1,BASED(.Ls390_handle_mcck) 811 basr %r14,%r1 # call machine check handler 812 TRACE_IRQS_ON 813mcck_return: 814 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW 815 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 816#ifdef CONFIG_VIRT_CPU_ACCOUNTING 817 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52 818 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 819 bno BASED(0f) 820 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 821 stpt __LC_EXIT_TIMER 822 lpsw __LC_RETURN_MCCK_PSW # back to caller 8230: 824#endif 825 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 826 lpsw __LC_RETURN_MCCK_PSW # back to caller 827 828 RESTORE_ALL __LC_RETURN_MCCK_PSW,0 829 830/* 831 * Restart interruption handler, kick starter for additional CPUs 832 */ 833#ifdef CONFIG_SMP 834 __CPUINIT 835 .globl restart_int_handler 836restart_int_handler: 837 l %r15,__LC_SAVE_AREA+60 # load ksp 838 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs 839 lam %a0,%a15,__LC_AREGS_SAVE_AREA 840 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone 841 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 842 basr %r14,0 843 l %r14,restart_addr-.(%r14) 844 br %r14 # branch to start_secondary 845restart_addr: 846 .long start_secondary 847 .previous 848#else 849/* 850 * If we do not run with SMP enabled, let the new CPU crash ... 851 */ 852 .globl restart_int_handler 853restart_int_handler: 854 basr %r1,0 855restart_base: 856 lpsw restart_crash-restart_base(%r1) 857 .align 8 858restart_crash: 859 .long 0x000a0000,0x00000000 860restart_go: 861#endif 862 863#ifdef CONFIG_CHECK_STACK 864/* 865 * The synchronous or the asynchronous stack overflowed. We are dead. 866 * No need to properly save the registers, we are going to panic anyway. 867 * Setup a pt_regs so that show_trace can provide a good call trace. 868 */ 869stack_overflow: 870 l %r15,__LC_PANIC_STACK # change to panic stack 871 sl %r15,BASED(.Lc_spsize) 872 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 873 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 874 la %r1,__LC_SAVE_AREA 875 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? 876 be BASED(0f) 877 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? 878 be BASED(0f) 879 la %r1,__LC_SAVE_AREA+16 8800: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack 881 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain 882 l %r1,BASED(1f) # branch to kernel_stack_overflow 883 la %r2,SP_PTREGS(%r15) # load pt_regs 884 br %r1 8851: .long kernel_stack_overflow 886#endif 887 888cleanup_table_system_call: 889 .long system_call + 0x80000000, sysc_do_svc + 0x80000000 890cleanup_table_sysc_return: 891 .long sysc_return + 0x80000000, sysc_leave + 0x80000000 892cleanup_table_sysc_leave: 893 .long sysc_leave + 0x80000000, sysc_done + 0x80000000 894cleanup_table_sysc_work_loop: 895 .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000 896cleanup_table_io_return: 897 .long io_return + 0x80000000, io_leave + 0x80000000 898cleanup_table_io_leave: 899 .long io_leave + 0x80000000, io_done + 0x80000000 900cleanup_table_io_work_loop: 901 .long io_work_loop + 0x80000000, io_work_done + 0x80000000 902 903cleanup_critical: 904 clc 4(4,%r12),BASED(cleanup_table_system_call) 905 bl BASED(0f) 906 clc 4(4,%r12),BASED(cleanup_table_system_call+4) 907 bl BASED(cleanup_system_call) 9080: 909 clc 4(4,%r12),BASED(cleanup_table_sysc_return) 910 bl BASED(0f) 911 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4) 912 bl BASED(cleanup_sysc_return) 9130: 914 clc 4(4,%r12),BASED(cleanup_table_sysc_leave) 915 bl BASED(0f) 916 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4) 917 bl BASED(cleanup_sysc_leave) 9180: 919 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop) 920 bl BASED(0f) 921 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) 922 bl BASED(cleanup_sysc_return) 9230: 924 clc 4(4,%r12),BASED(cleanup_table_io_return) 925 bl BASED(0f) 926 clc 4(4,%r12),BASED(cleanup_table_io_return+4) 927 bl BASED(cleanup_io_return) 9280: 929 clc 4(4,%r12),BASED(cleanup_table_io_leave) 930 bl BASED(0f) 931 clc 4(4,%r12),BASED(cleanup_table_io_leave+4) 932 bl BASED(cleanup_io_leave) 9330: 934 clc 4(4,%r12),BASED(cleanup_table_io_work_loop) 935 bl BASED(0f) 936 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4) 937 bl BASED(cleanup_io_return) 9380: 939 br %r14 940 941cleanup_system_call: 942 mvc __LC_RETURN_PSW(8),0(%r12) 943 c %r12,BASED(.Lmck_old_psw) 944 be BASED(0f) 945 la %r12,__LC_SAVE_AREA+16 946 b BASED(1f) 9470: la %r12,__LC_SAVE_AREA+32 9481: 949#ifdef CONFIG_VIRT_CPU_ACCOUNTING 950 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) 951 bh BASED(0f) 952 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 9530: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) 954 bhe BASED(cleanup_vtime) 955#endif 956 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) 957 bh BASED(0f) 958 mvc __LC_SAVE_AREA(16),0(%r12) 9590: st %r13,4(%r12) 960 st %r12,__LC_SAVE_AREA+48 # argh 961 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 962 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 963 l %r12,__LC_SAVE_AREA+48 # argh 964 st %r15,12(%r12) 965 lh %r7,0x8a 966#ifdef CONFIG_VIRT_CPU_ACCOUNTING 967cleanup_vtime: 968 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) 969 bhe BASED(cleanup_stime) 970 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 971cleanup_stime: 972 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) 973 bh BASED(cleanup_update) 974 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 975cleanup_update: 976 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 977#endif 978 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) 979 la %r12,__LC_RETURN_PSW 980 br %r14 981cleanup_system_call_insn: 982 .long sysc_saveall + 0x80000000 983#ifdef CONFIG_VIRT_CPU_ACCOUNTING 984 .long system_call + 0x80000000 985 .long sysc_vtime + 0x80000000 986 .long sysc_stime + 0x80000000 987 .long sysc_update + 0x80000000 988#endif 989 990cleanup_sysc_return: 991 mvc __LC_RETURN_PSW(4),0(%r12) 992 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return) 993 la %r12,__LC_RETURN_PSW 994 br %r14 995 996cleanup_sysc_leave: 997 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) 998 be BASED(2f) 999#ifdef CONFIG_VIRT_CPU_ACCOUNTING 1000 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1001 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) 1002 be BASED(2f) 1003#endif 1004 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 1005 c %r12,BASED(.Lmck_old_psw) 1006 bne BASED(0f) 1007 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) 1008 b BASED(1f) 10090: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) 10101: lm %r0,%r11,SP_R0(%r15) 1011 l %r15,SP_R15(%r15) 10122: la %r12,__LC_RETURN_PSW 1013 br %r14 1014cleanup_sysc_leave_insn: 1015 .long sysc_done - 4 + 0x80000000 1016#ifdef CONFIG_VIRT_CPU_ACCOUNTING 1017 .long sysc_done - 8 + 0x80000000 1018#endif 1019 1020cleanup_io_return: 1021 mvc __LC_RETURN_PSW(4),0(%r12) 1022 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop) 1023 la %r12,__LC_RETURN_PSW 1024 br %r14 1025 1026cleanup_io_leave: 1027 clc 4(4,%r12),BASED(cleanup_io_leave_insn) 1028 be BASED(2f) 1029#ifdef CONFIG_VIRT_CPU_ACCOUNTING 1030 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1031 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4) 1032 be BASED(2f) 1033#endif 1034 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 1035 c %r12,BASED(.Lmck_old_psw) 1036 bne BASED(0f) 1037 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) 1038 b BASED(1f) 10390: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) 10401: lm %r0,%r11,SP_R0(%r15) 1041 l %r15,SP_R15(%r15) 10422: la %r12,__LC_RETURN_PSW 1043 br %r14 1044cleanup_io_leave_insn: 1045 .long io_done - 4 + 0x80000000 1046#ifdef CONFIG_VIRT_CPU_ACCOUNTING 1047 .long io_done - 8 + 0x80000000 1048#endif 1049 1050/* 1051 * Integer constants 1052 */ 1053 .align 4 1054.Lc_spsize: .long SP_SIZE 1055.Lc_overhead: .long STACK_FRAME_OVERHEAD 1056.Lnr_syscalls: .long NR_syscalls 1057.L0x018: .short 0x018 1058.L0x020: .short 0x020 1059.L0x028: .short 0x028 1060.L0x030: .short 0x030 1061.L0x038: .short 0x038 1062.Lc_1: .long 1 1063 1064/* 1065 * Symbol constants 1066 */ 1067.Ls390_mcck: .long s390_do_machine_check 1068.Ls390_handle_mcck: 1069 .long s390_handle_mcck 1070.Lmck_old_psw: .long __LC_MCK_OLD_PSW 1071.Ldo_IRQ: .long do_IRQ 1072.Ldo_extint: .long do_extint 1073.Ldo_signal: .long do_signal 1074.Lhandle_per: .long do_single_step 1075.Ldo_execve: .long do_execve 1076.Lexecve_tail: .long execve_tail 1077.Ljump_table: .long pgm_check_table 1078.Lschedule: .long schedule 1079#ifdef CONFIG_PREEMPT 1080.Lpreempt_schedule_irq: 1081 .long preempt_schedule_irq 1082#endif 1083.Ltrace: .long syscall_trace 1084.Lschedtail: .long schedule_tail 1085.Lsysc_table: .long sys_call_table 1086#ifdef CONFIG_TRACE_IRQFLAGS 1087.Ltrace_irq_on: .long trace_hardirqs_on 1088.Ltrace_irq_off: 1089 .long trace_hardirqs_off 1090.Llockdep_sys_exit: 1091 .long lockdep_sys_exit 1092#endif 1093.Lcritical_start: 1094 .long __critical_start + 0x80000000 1095.Lcritical_end: 1096 .long __critical_end + 0x80000000 1097.Lcleanup_critical: 1098 .long cleanup_critical 1099 1100 .section .rodata, "a" 1101#define SYSCALL(esa,esame,emu) .long esa 1102sys_call_table: 1103#include "syscalls.S" 1104#undef SYSCALL 1105