xref: /openbmc/linux/arch/s390/kernel/entry.S (revision b240b419db5d624ce7a5a397d6f62a1a686009ec) 
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *    S390 low-level entry points.
4 *
5 *    Copyright IBM Corp. 1999, 2012
6 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 *		 Hartmut Penner (hp@de.ibm.com),
8 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/processor.h>
15#include <asm/cache.h>
16#include <asm/ctl_reg.h>
17#include <asm/dwarf.h>
18#include <asm/errno.h>
19#include <asm/ptrace.h>
20#include <asm/thread_info.h>
21#include <asm/asm-offsets.h>
22#include <asm/unistd.h>
23#include <asm/page.h>
24#include <asm/sigp.h>
25#include <asm/irq.h>
26#include <asm/vx-insn.h>
27#include <asm/setup.h>
28#include <asm/nmi.h>
29#include <asm/export.h>
30
31__PT_R0      =	__PT_GPRS
32__PT_R1      =	__PT_GPRS + 8
33__PT_R2      =	__PT_GPRS + 16
34__PT_R3      =	__PT_GPRS + 24
35__PT_R4      =	__PT_GPRS + 32
36__PT_R5      =	__PT_GPRS + 40
37__PT_R6      =	__PT_GPRS + 48
38__PT_R7      =	__PT_GPRS + 56
39__PT_R8      =	__PT_GPRS + 64
40__PT_R9      =	__PT_GPRS + 72
41__PT_R10     =	__PT_GPRS + 80
42__PT_R11     =	__PT_GPRS + 88
43__PT_R12     =	__PT_GPRS + 96
44__PT_R13     =	__PT_GPRS + 104
45__PT_R14     =	__PT_GPRS + 112
46__PT_R15     =	__PT_GPRS + 120
47
48STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
49STACK_SIZE  = 1 << STACK_SHIFT
50STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
51
52_TIF_WORK	= (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
53		   _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
54_TIF_TRACE	= (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
55		   _TIF_SYSCALL_TRACEPOINT)
56_CIF_WORK	= (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
57		   _CIF_ASCE_SECONDARY | _CIF_FPU)
58_PIF_WORK	= (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
59
60#define BASED(name) name-cleanup_critical(%r13)
61
62	.macro	TRACE_IRQS_ON
63#ifdef CONFIG_TRACE_IRQFLAGS
64	basr	%r2,%r0
65	brasl	%r14,trace_hardirqs_on_caller
66#endif
67	.endm
68
69	.macro	TRACE_IRQS_OFF
70#ifdef CONFIG_TRACE_IRQFLAGS
71	basr	%r2,%r0
72	brasl	%r14,trace_hardirqs_off_caller
73#endif
74	.endm
75
76	.macro	LOCKDEP_SYS_EXIT
77#ifdef CONFIG_LOCKDEP
78	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
79	jz	.+10
80	brasl	%r14,lockdep_sys_exit
81#endif
82	.endm
83
84	.macro	CHECK_STACK stacksize,savearea
85#ifdef CONFIG_CHECK_STACK
86	tml	%r15,\stacksize - CONFIG_STACK_GUARD
87	lghi	%r14,\savearea
88	jz	stack_overflow
89#endif
90	.endm
91
92	.macro	SWITCH_ASYNC savearea,timer
93	tmhh	%r8,0x0001		# interrupting from user ?
94	jnz	1f
95	lgr	%r14,%r9
96	slg	%r14,BASED(.Lcritical_start)
97	clg	%r14,BASED(.Lcritical_length)
98	jhe	0f
99	lghi	%r11,\savearea		# inside critical section, do cleanup
100	brasl	%r14,cleanup_critical
101	tmhh	%r8,0x0001		# retest problem state after cleanup
102	jnz	1f
1030:	lg	%r14,__LC_ASYNC_STACK	# are we already on the async stack?
104	slgr	%r14,%r15
105	srag	%r14,%r14,STACK_SHIFT
106	jnz	2f
107	CHECK_STACK 1<<STACK_SHIFT,\savearea
108	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
109	j	3f
1101:	UPDATE_VTIME %r14,%r15,\timer
111	BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
1122:	lg	%r15,__LC_ASYNC_STACK	# load async stack
1133:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
114	.endm
115
116	.macro UPDATE_VTIME w1,w2,enter_timer
117	lg	\w1,__LC_EXIT_TIMER
118	lg	\w2,__LC_LAST_UPDATE_TIMER
119	slg	\w1,\enter_timer
120	slg	\w2,__LC_EXIT_TIMER
121	alg	\w1,__LC_USER_TIMER
122	alg	\w2,__LC_SYSTEM_TIMER
123	stg	\w1,__LC_USER_TIMER
124	stg	\w2,__LC_SYSTEM_TIMER
125	mvc	__LC_LAST_UPDATE_TIMER(8),\enter_timer
126	.endm
127
128	.macro REENABLE_IRQS
129	stg	%r8,__LC_RETURN_PSW
130	ni	__LC_RETURN_PSW,0xbf
131	ssm	__LC_RETURN_PSW
132	.endm
133
134	.macro STCK savearea
135#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
136	.insn	s,0xb27c0000,\savearea		# store clock fast
137#else
138	.insn	s,0xb2050000,\savearea		# store clock
139#endif
140	.endm
141
142	/*
143	 * The TSTMSK macro generates a test-under-mask instruction by
144	 * calculating the memory offset for the specified mask value.
145	 * Mask value can be any constant.  The macro shifts the mask
146	 * value to calculate the memory offset for the test-under-mask
147	 * instruction.
148	 */
149	.macro TSTMSK addr, mask, size=8, bytepos=0
150		.if (\bytepos < \size) && (\mask >> 8)
151			.if (\mask & 0xff)
152				.error "Mask exceeds byte boundary"
153			.endif
154			TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
155			.exitm
156		.endif
157		.ifeq \mask
158			.error "Mask must not be zero"
159		.endif
160		off = \size - \bytepos - 1
161		tm	off+\addr, \mask
162	.endm
163
164	.macro BPOFF
165	.pushsection .altinstr_replacement, "ax"
166660:	.long	0xb2e8c000
167	.popsection
168661:	.long	0x47000000
169	.pushsection .altinstructions, "a"
170	.long 661b - .
171	.long 660b - .
172	.word 82
173	.byte 4
174	.byte 4
175	.popsection
176	.endm
177
178	.macro BPON
179	.pushsection .altinstr_replacement, "ax"
180662:	.long	0xb2e8d000
181	.popsection
182663:	.long	0x47000000
183	.pushsection .altinstructions, "a"
184	.long 663b - .
185	.long 662b - .
186	.word 82
187	.byte 4
188	.byte 4
189	.popsection
190	.endm
191
192	.macro BPENTER tif_ptr,tif_mask
193	.pushsection .altinstr_replacement, "ax"
194662:	.word	0xc004, 0x0000, 0x0000	# 6 byte nop
195	.word	0xc004, 0x0000, 0x0000	# 6 byte nop
196	.popsection
197664:	TSTMSK	\tif_ptr,\tif_mask
198	jz	. + 8
199	.long	0xb2e8d000
200	.pushsection .altinstructions, "a"
201	.long 664b - .
202	.long 662b - .
203	.word 82
204	.byte 12
205	.byte 12
206	.popsection
207	.endm
208
209	.macro BPEXIT tif_ptr,tif_mask
210	TSTMSK	\tif_ptr,\tif_mask
211	.pushsection .altinstr_replacement, "ax"
212662:	jnz	. + 8
213	.long	0xb2e8d000
214	.popsection
215664:	jz	. + 8
216	.long	0xb2e8c000
217	.pushsection .altinstructions, "a"
218	.long 664b - .
219	.long 662b - .
220	.word 82
221	.byte 8
222	.byte 8
223	.popsection
224	.endm
225
226#ifdef CONFIG_EXPOLINE
227
228	.macro GEN_BR_THUNK name,reg,tmp
229	.section .text.\name,"axG",@progbits,\name,comdat
230	.globl \name
231	.hidden \name
232	.type \name,@function
233\name:
234	CFI_STARTPROC
235#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
236	exrl	0,0f
237#else
238	larl	\tmp,0f
239	ex	0,0(\tmp)
240#endif
241	j	.
2420:	br	\reg
243	CFI_ENDPROC
244	.endm
245
246	GEN_BR_THUNK __s390x_indirect_jump_r1use_r9,%r9,%r1
247	GEN_BR_THUNK __s390x_indirect_jump_r1use_r14,%r14,%r1
248	GEN_BR_THUNK __s390x_indirect_jump_r11use_r14,%r14,%r11
249
250	.macro BASR_R14_R9
2510:	brasl	%r14,__s390x_indirect_jump_r1use_r9
252	.pushsection .s390_indirect_branches,"a",@progbits
253	.long	0b-.
254	.popsection
255	.endm
256
257	.macro BR_R1USE_R14
2580:	jg	__s390x_indirect_jump_r1use_r14
259	.pushsection .s390_indirect_branches,"a",@progbits
260	.long	0b-.
261	.popsection
262	.endm
263
264	.macro BR_R11USE_R14
2650:	jg	__s390x_indirect_jump_r11use_r14
266	.pushsection .s390_indirect_branches,"a",@progbits
267	.long	0b-.
268	.popsection
269	.endm
270
271#else	/* CONFIG_EXPOLINE */
272
273	.macro BASR_R14_R9
274	basr	%r14,%r9
275	.endm
276
277	.macro BR_R1USE_R14
278	br	%r14
279	.endm
280
281	.macro BR_R11USE_R14
282	br	%r14
283	.endm
284
285#endif /* CONFIG_EXPOLINE */
286
287
288	.section .kprobes.text, "ax"
289.Ldummy:
290	/*
291	 * This nop exists only in order to avoid that __switch_to starts at
292	 * the beginning of the kprobes text section. In that case we would
293	 * have several symbols at the same address. E.g. objdump would take
294	 * an arbitrary symbol name when disassembling this code.
295	 * With the added nop in between the __switch_to symbol is unique
296	 * again.
297	 */
298	nop	0
299
300ENTRY(__bpon)
301	.globl __bpon
302	BPON
303	BR_R1USE_R14
304
305/*
306 * Scheduler resume function, called by switch_to
307 *  gpr2 = (task_struct *) prev
308 *  gpr3 = (task_struct *) next
309 * Returns:
310 *  gpr2 = prev
311 */
312ENTRY(__switch_to)
313	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task
314	lghi	%r4,__TASK_stack
315	lghi	%r1,__TASK_thread
316	lg	%r5,0(%r4,%r3)			# start of kernel stack of next
317	stg	%r15,__THREAD_ksp(%r1,%r2)	# store kernel stack of prev
318	lgr	%r15,%r5
319	aghi	%r15,STACK_INIT			# end of kernel stack of next
320	stg	%r3,__LC_CURRENT		# store task struct of next
321	stg	%r15,__LC_KERNEL_STACK		# store end of kernel stack
322	lg	%r15,__THREAD_ksp(%r1,%r3)	# load kernel stack of next
323	aghi	%r3,__TASK_pid
324	mvc	__LC_CURRENT_PID(4,%r0),0(%r3)	# store pid of next
325	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task
326	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
327	jz	0f
328	.insn	s,0xb2800000,__LC_LPP		# set program parameter
3290:	BR_R1USE_R14
330
331.L__critical_start:
332
333#if IS_ENABLED(CONFIG_KVM)
334/*
335 * sie64a calling convention:
336 * %r2 pointer to sie control block
337 * %r3 guest register save area
338 */
339ENTRY(sie64a)
340	stmg	%r6,%r14,__SF_GPRS(%r15)	# save kernel registers
341	lg	%r12,__LC_CURRENT
342	stg	%r2,__SF_EMPTY(%r15)		# save control block pointer
343	stg	%r3,__SF_EMPTY+8(%r15)		# save guest register save area
344	xc	__SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
345	mvc	__SF_EMPTY+24(8,%r15),__TI_flags(%r12) # copy thread flags
346	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU		# load guest fp/vx registers ?
347	jno	.Lsie_load_guest_gprs
348	brasl	%r14,load_fpu_regs		# load guest fp/vx regs
349.Lsie_load_guest_gprs:
350	lmg	%r0,%r13,0(%r3)			# load guest gprs 0-13
351	lg	%r14,__LC_GMAP			# get gmap pointer
352	ltgr	%r14,%r14
353	jz	.Lsie_gmap
354	lctlg	%c1,%c1,__GMAP_ASCE(%r14)	# load primary asce
355.Lsie_gmap:
356	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
357	oi	__SIE_PROG0C+3(%r14),1		# we are going into SIE now
358	tm	__SIE_PROG20+3(%r14),3		# last exit...
359	jnz	.Lsie_skip
360	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
361	jo	.Lsie_skip			# exit if fp/vx regs changed
362	BPEXIT	__SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
363.Lsie_entry:
364	sie	0(%r14)
365.Lsie_exit:
366	BPOFF
367	BPENTER	__SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
368.Lsie_skip:
369	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
370	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
371.Lsie_done:
372# some program checks are suppressing. C code (e.g. do_protection_exception)
373# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
374# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
375# Other instructions between sie64a and .Lsie_done should not cause program
376# interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
377# See also .Lcleanup_sie
378.Lrewind_pad6:
379	nopr	7
380.Lrewind_pad4:
381	nopr	7
382.Lrewind_pad2:
383	nopr	7
384	.globl sie_exit
385sie_exit:
386	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area
387	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13
388	xgr	%r0,%r0				# clear guest registers to
389	xgr	%r1,%r1				# prevent speculative use
390	xgr	%r2,%r2
391	xgr	%r3,%r3
392	xgr	%r4,%r4
393	xgr	%r5,%r5
394	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers
395	lg	%r2,__SF_EMPTY+16(%r15)		# return exit reason code
396	BR_R1USE_R14
397.Lsie_fault:
398	lghi	%r14,-EFAULT
399	stg	%r14,__SF_EMPTY+16(%r15)	# set exit reason code
400	j	sie_exit
401
402	EX_TABLE(.Lrewind_pad6,.Lsie_fault)
403	EX_TABLE(.Lrewind_pad4,.Lsie_fault)
404	EX_TABLE(.Lrewind_pad2,.Lsie_fault)
405	EX_TABLE(sie_exit,.Lsie_fault)
406EXPORT_SYMBOL(sie64a)
407EXPORT_SYMBOL(sie_exit)
408#endif
409
410/*
411 * SVC interrupt handler routine. System calls are synchronous events and
412 * are executed with interrupts enabled.
413 */
414
415ENTRY(system_call)
416	stpt	__LC_SYNC_ENTER_TIMER
417.Lsysc_stmg:
418	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
419	BPOFF
420	lg	%r12,__LC_CURRENT
421	lghi	%r13,__TASK_thread
422	lghi	%r14,_PIF_SYSCALL
423.Lsysc_per:
424	lg	%r15,__LC_KERNEL_STACK
425	la	%r11,STACK_FRAME_OVERHEAD(%r15)	# pointer to pt_regs
426.Lsysc_vtime:
427	UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
428	BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
429	stmg	%r0,%r7,__PT_R0(%r11)
430	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
431	mvc	__PT_PSW(16,%r11),__LC_SVC_OLD_PSW
432	mvc	__PT_INT_CODE(4,%r11),__LC_SVC_ILC
433	stg	%r14,__PT_FLAGS(%r11)
434.Lsysc_do_svc:
435	# clear user controlled register to prevent speculative use
436	xgr	%r0,%r0
437	# load address of system call table
438	lg	%r10,__THREAD_sysc_table(%r13,%r12)
439	llgh	%r8,__PT_INT_CODE+2(%r11)
440	slag	%r8,%r8,2			# shift and test for svc 0
441	jnz	.Lsysc_nr_ok
442	# svc 0: system call number in %r1
443	llgfr	%r1,%r1				# clear high word in r1
444	cghi	%r1,NR_syscalls
445	jnl	.Lsysc_nr_ok
446	sth	%r1,__PT_INT_CODE+2(%r11)
447	slag	%r8,%r1,2
448.Lsysc_nr_ok:
449	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
450	stg	%r2,__PT_ORIG_GPR2(%r11)
451	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
452	lgf	%r9,0(%r8,%r10)			# get system call add.
453	TSTMSK	__TI_flags(%r12),_TIF_TRACE
454	jnz	.Lsysc_tracesys
455	BASR_R14_R9				# call sys_xxxx
456	stg	%r2,__PT_R2(%r11)		# store return value
457
458.Lsysc_return:
459	LOCKDEP_SYS_EXIT
460.Lsysc_tif:
461	TSTMSK	__PT_FLAGS(%r11),_PIF_WORK
462	jnz	.Lsysc_work
463	TSTMSK	__TI_flags(%r12),_TIF_WORK
464	jnz	.Lsysc_work			# check for work
465	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
466	jnz	.Lsysc_work
467	BPEXIT	__TI_flags(%r12),_TIF_ISOLATE_BP
468.Lsysc_restore:
469	lg	%r14,__LC_VDSO_PER_CPU
470	lmg	%r0,%r10,__PT_R0(%r11)
471	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
472.Lsysc_exit_timer:
473	stpt	__LC_EXIT_TIMER
474	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
475	lmg	%r11,%r15,__PT_R11(%r11)
476	lpswe	__LC_RETURN_PSW
477.Lsysc_done:
478
479#
480# One of the work bits is on. Find out which one.
481#
482.Lsysc_work:
483	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
484	jo	.Lsysc_mcck_pending
485	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
486	jo	.Lsysc_reschedule
487	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
488	jo	.Lsysc_syscall_restart
489#ifdef CONFIG_UPROBES
490	TSTMSK	__TI_flags(%r12),_TIF_UPROBE
491	jo	.Lsysc_uprobe_notify
492#endif
493	TSTMSK	__TI_flags(%r12),_TIF_GUARDED_STORAGE
494	jo	.Lsysc_guarded_storage
495	TSTMSK	__PT_FLAGS(%r11),_PIF_PER_TRAP
496	jo	.Lsysc_singlestep
497#ifdef CONFIG_LIVEPATCH
498	TSTMSK	__TI_flags(%r12),_TIF_PATCH_PENDING
499	jo	.Lsysc_patch_pending	# handle live patching just before
500					# signals and possible syscall restart
501#endif
502	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
503	jo	.Lsysc_syscall_restart
504	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
505	jo	.Lsysc_sigpending
506	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
507	jo	.Lsysc_notify_resume
508	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
509	jo	.Lsysc_vxrs
510	TSTMSK	__LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
511	jnz	.Lsysc_asce
512	j	.Lsysc_return		# beware of critical section cleanup
513
514#
515# _TIF_NEED_RESCHED is set, call schedule
516#
517.Lsysc_reschedule:
518	larl	%r14,.Lsysc_return
519	jg	schedule
520
521#
522# _CIF_MCCK_PENDING is set, call handler
523#
524.Lsysc_mcck_pending:
525	larl	%r14,.Lsysc_return
526	jg	s390_handle_mcck	# TIF bit will be cleared by handler
527
528#
529# _CIF_ASCE_PRIMARY and/or _CIF_ASCE_SECONDARY set, load user space asce
530#
531.Lsysc_asce:
532	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY
533	lctlg	%c7,%c7,__LC_VDSO_ASCE		# load secondary asce
534	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE_PRIMARY
535	jz	.Lsysc_return
536#ifndef CONFIG_HAVE_MARCH_Z10_FEATURES
537	tm	__LC_STFLE_FAC_LIST+3,0x10	# has MVCOS ?
538	jnz	.Lsysc_set_fs_fixup
539	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
540	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
541	j	.Lsysc_return
542.Lsysc_set_fs_fixup:
543#endif
544	larl	%r14,.Lsysc_return
545	jg	set_fs_fixup
546
547#
548# CIF_FPU is set, restore floating-point controls and floating-point registers.
549#
550.Lsysc_vxrs:
551	larl	%r14,.Lsysc_return
552	jg	load_fpu_regs
553
554#
555# _TIF_SIGPENDING is set, call do_signal
556#
557.Lsysc_sigpending:
558	lgr	%r2,%r11		# pass pointer to pt_regs
559	brasl	%r14,do_signal
560	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
561	jno	.Lsysc_return
562.Lsysc_do_syscall:
563	lghi	%r13,__TASK_thread
564	lmg	%r2,%r7,__PT_R2(%r11)	# load svc arguments
565	lghi	%r1,0			# svc 0 returns -ENOSYS
566	j	.Lsysc_do_svc
567
568#
569# _TIF_NOTIFY_RESUME is set, call do_notify_resume
570#
571.Lsysc_notify_resume:
572	lgr	%r2,%r11		# pass pointer to pt_regs
573	larl	%r14,.Lsysc_return
574	jg	do_notify_resume
575
576#
577# _TIF_UPROBE is set, call uprobe_notify_resume
578#
579#ifdef CONFIG_UPROBES
580.Lsysc_uprobe_notify:
581	lgr	%r2,%r11		# pass pointer to pt_regs
582	larl	%r14,.Lsysc_return
583	jg	uprobe_notify_resume
584#endif
585
586#
587# _TIF_GUARDED_STORAGE is set, call guarded_storage_load
588#
589.Lsysc_guarded_storage:
590	lgr	%r2,%r11		# pass pointer to pt_regs
591	larl	%r14,.Lsysc_return
592	jg	gs_load_bc_cb
593#
594# _TIF_PATCH_PENDING is set, call klp_update_patch_state
595#
596#ifdef CONFIG_LIVEPATCH
597.Lsysc_patch_pending:
598	lg	%r2,__LC_CURRENT	# pass pointer to task struct
599	larl	%r14,.Lsysc_return
600	jg	klp_update_patch_state
601#endif
602
603#
604# _PIF_PER_TRAP is set, call do_per_trap
605#
606.Lsysc_singlestep:
607	ni	__PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
608	lgr	%r2,%r11		# pass pointer to pt_regs
609	larl	%r14,.Lsysc_return
610	jg	do_per_trap
611
612#
613# _PIF_SYSCALL_RESTART is set, repeat the current system call
614#
615.Lsysc_syscall_restart:
616	ni	__PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
617	lmg	%r1,%r7,__PT_R1(%r11)	# load svc arguments
618	lg	%r2,__PT_ORIG_GPR2(%r11)
619	j	.Lsysc_do_svc
620
621#
622# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
623# and after the system call
624#
625.Lsysc_tracesys:
626	lgr	%r2,%r11		# pass pointer to pt_regs
627	la	%r3,0
628	llgh	%r0,__PT_INT_CODE+2(%r11)
629	stg	%r0,__PT_R2(%r11)
630	brasl	%r14,do_syscall_trace_enter
631	lghi	%r0,NR_syscalls
632	clgr	%r0,%r2
633	jnh	.Lsysc_tracenogo
634	sllg	%r8,%r2,2
635	lgf	%r9,0(%r8,%r10)
636.Lsysc_tracego:
637	lmg	%r3,%r7,__PT_R3(%r11)
638	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
639	lg	%r2,__PT_ORIG_GPR2(%r11)
640	BASR_R14_R9			# call sys_xxx
641	stg	%r2,__PT_R2(%r11)	# store return value
642.Lsysc_tracenogo:
643	TSTMSK	__TI_flags(%r12),_TIF_TRACE
644	jz	.Lsysc_return
645	lgr	%r2,%r11		# pass pointer to pt_regs
646	larl	%r14,.Lsysc_return
647	jg	do_syscall_trace_exit
648
649#
650# a new process exits the kernel with ret_from_fork
651#
652ENTRY(ret_from_fork)
653	la	%r11,STACK_FRAME_OVERHEAD(%r15)
654	lg	%r12,__LC_CURRENT
655	brasl	%r14,schedule_tail
656	TRACE_IRQS_ON
657	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
658	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
659	jne	.Lsysc_tracenogo
660	# it's a kernel thread
661	lmg	%r9,%r10,__PT_R9(%r11)	# load gprs
662ENTRY(kernel_thread_starter)
663	la	%r2,0(%r10)
664	BASR_R14_R9
665	j	.Lsysc_tracenogo
666
667/*
668 * Program check handler routine
669 */
670
671ENTRY(pgm_check_handler)
672	stpt	__LC_SYNC_ENTER_TIMER
673	BPOFF
674	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
675	lg	%r10,__LC_LAST_BREAK
676	lg	%r12,__LC_CURRENT
677	lghi	%r11,0
678	larl	%r13,cleanup_critical
679	lmg	%r8,%r9,__LC_PGM_OLD_PSW
680	tmhh	%r8,0x0001		# test problem state bit
681	jnz	2f			# -> fault in user space
682#if IS_ENABLED(CONFIG_KVM)
683	# cleanup critical section for program checks in sie64a
684	lgr	%r14,%r9
685	slg	%r14,BASED(.Lsie_critical_start)
686	clg	%r14,BASED(.Lsie_critical_length)
687	jhe	0f
688	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
689	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
690	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
691	larl	%r9,sie_exit			# skip forward to sie_exit
692	lghi	%r11,_PIF_GUEST_FAULT
693#endif
6940:	tmhh	%r8,0x4000		# PER bit set in old PSW ?
695	jnz	1f			# -> enabled, can't be a double fault
696	tm	__LC_PGM_ILC+3,0x80	# check for per exception
697	jnz	.Lpgm_svcper		# -> single stepped svc
6981:	CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
699	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
700	j	4f
7012:	UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
702	BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
703	lg	%r15,__LC_KERNEL_STACK
704	lgr	%r14,%r12
705	aghi	%r14,__TASK_thread	# pointer to thread_struct
706	lghi	%r13,__LC_PGM_TDB
707	tm	__LC_PGM_ILC+2,0x02	# check for transaction abort
708	jz	3f
709	mvc	__THREAD_trap_tdb(256,%r14),0(%r13)
7103:	stg	%r10,__THREAD_last_break(%r14)
7114:	lgr	%r13,%r11
712	la	%r11,STACK_FRAME_OVERHEAD(%r15)
713	stmg	%r0,%r7,__PT_R0(%r11)
714	# clear user controlled registers to prevent speculative use
715	xgr	%r0,%r0
716	xgr	%r1,%r1
717	xgr	%r2,%r2
718	xgr	%r3,%r3
719	xgr	%r4,%r4
720	xgr	%r5,%r5
721	xgr	%r6,%r6
722	xgr	%r7,%r7
723	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
724	stmg	%r8,%r9,__PT_PSW(%r11)
725	mvc	__PT_INT_CODE(4,%r11),__LC_PGM_ILC
726	mvc	__PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
727	stg	%r13,__PT_FLAGS(%r11)
728	stg	%r10,__PT_ARGS(%r11)
729	tm	__LC_PGM_ILC+3,0x80	# check for per exception
730	jz	5f
731	tmhh	%r8,0x0001		# kernel per event ?
732	jz	.Lpgm_kprobe
733	oi	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
734	mvc	__THREAD_per_address(8,%r14),__LC_PER_ADDRESS
735	mvc	__THREAD_per_cause(2,%r14),__LC_PER_CODE
736	mvc	__THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
7375:	REENABLE_IRQS
738	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
739	larl	%r1,pgm_check_table
740	llgh	%r10,__PT_INT_CODE+2(%r11)
741	nill	%r10,0x007f
742	sll	%r10,2
743	je	.Lpgm_return
744	lgf	%r9,0(%r10,%r1)		# load address of handler routine
745	lgr	%r2,%r11		# pass pointer to pt_regs
746	BASR_R14_R9			# branch to interrupt-handler
747.Lpgm_return:
748	LOCKDEP_SYS_EXIT
749	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
750	jno	.Lsysc_restore
751	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
752	jo	.Lsysc_do_syscall
753	j	.Lsysc_tif
754
755#
756# PER event in supervisor state, must be kprobes
757#
758.Lpgm_kprobe:
759	REENABLE_IRQS
760	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
761	lgr	%r2,%r11		# pass pointer to pt_regs
762	brasl	%r14,do_per_trap
763	j	.Lpgm_return
764
765#
766# single stepped system call
767#
768.Lpgm_svcper:
769	mvc	__LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
770	lghi	%r13,__TASK_thread
771	larl	%r14,.Lsysc_per
772	stg	%r14,__LC_RETURN_PSW+8
773	lghi	%r14,_PIF_SYSCALL | _PIF_PER_TRAP
774	lpswe	__LC_RETURN_PSW		# branch to .Lsysc_per and enable irqs
775
776/*
777 * IO interrupt handler routine
778 */
779ENTRY(io_int_handler)
780	STCK	__LC_INT_CLOCK
781	stpt	__LC_ASYNC_ENTER_TIMER
782	BPOFF
783	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
784	lg	%r12,__LC_CURRENT
785	larl	%r13,cleanup_critical
786	lmg	%r8,%r9,__LC_IO_OLD_PSW
787	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
788	stmg	%r0,%r7,__PT_R0(%r11)
789	# clear user controlled registers to prevent speculative use
790	xgr	%r0,%r0
791	xgr	%r1,%r1
792	xgr	%r2,%r2
793	xgr	%r3,%r3
794	xgr	%r4,%r4
795	xgr	%r5,%r5
796	xgr	%r6,%r6
797	xgr	%r7,%r7
798	xgr	%r10,%r10
799	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
800	stmg	%r8,%r9,__PT_PSW(%r11)
801	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
802	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
803	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
804	jo	.Lio_restore
805	TRACE_IRQS_OFF
806	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
807.Lio_loop:
808	lgr	%r2,%r11		# pass pointer to pt_regs
809	lghi	%r3,IO_INTERRUPT
810	tm	__PT_INT_CODE+8(%r11),0x80	# adapter interrupt ?
811	jz	.Lio_call
812	lghi	%r3,THIN_INTERRUPT
813.Lio_call:
814	brasl	%r14,do_IRQ
815	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
816	jz	.Lio_return
817	tpi	0
818	jz	.Lio_return
819	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
820	j	.Lio_loop
821.Lio_return:
822	LOCKDEP_SYS_EXIT
823	TRACE_IRQS_ON
824.Lio_tif:
825	TSTMSK	__TI_flags(%r12),_TIF_WORK
826	jnz	.Lio_work		# there is work to do (signals etc.)
827	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
828	jnz	.Lio_work
829.Lio_restore:
830	lg	%r14,__LC_VDSO_PER_CPU
831	lmg	%r0,%r10,__PT_R0(%r11)
832	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
833	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
834	jno	.Lio_exit_kernel
835	BPEXIT	__TI_flags(%r12),_TIF_ISOLATE_BP
836.Lio_exit_timer:
837	stpt	__LC_EXIT_TIMER
838	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
839.Lio_exit_kernel:
840	lmg	%r11,%r15,__PT_R11(%r11)
841	lpswe	__LC_RETURN_PSW
842.Lio_done:
843
844#
845# There is work todo, find out in which context we have been interrupted:
846# 1) if we return to user space we can do all _TIF_WORK work
847# 2) if we return to kernel code and kvm is enabled check if we need to
848#    modify the psw to leave SIE
849# 3) if we return to kernel code and preemptive scheduling is enabled check
850#    the preemption counter and if it is zero call preempt_schedule_irq
851# Before any work can be done, a switch to the kernel stack is required.
852#
853.Lio_work:
854	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
855	jo	.Lio_work_user		# yes -> do resched & signal
856#ifdef CONFIG_PREEMPT
857	# check for preemptive scheduling
858	icm	%r0,15,__LC_PREEMPT_COUNT
859	jnz	.Lio_restore		# preemption is disabled
860	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
861	jno	.Lio_restore
862	# switch to kernel stack
863	lg	%r1,__PT_R15(%r11)
864	aghi	%r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
865	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
866	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
867	la	%r11,STACK_FRAME_OVERHEAD(%r1)
868	lgr	%r15,%r1
869	# TRACE_IRQS_ON already done at .Lio_return, call
870	# TRACE_IRQS_OFF to keep things symmetrical
871	TRACE_IRQS_OFF
872	brasl	%r14,preempt_schedule_irq
873	j	.Lio_return
874#else
875	j	.Lio_restore
876#endif
877
878#
879# Need to do work before returning to userspace, switch to kernel stack
880#
881.Lio_work_user:
882	lg	%r1,__LC_KERNEL_STACK
883	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
884	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
885	la	%r11,STACK_FRAME_OVERHEAD(%r1)
886	lgr	%r15,%r1
887
888#
889# One of the work bits is on. Find out which one.
890#
891.Lio_work_tif:
892	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
893	jo	.Lio_mcck_pending
894	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
895	jo	.Lio_reschedule
896#ifdef CONFIG_LIVEPATCH
897	TSTMSK	__TI_flags(%r12),_TIF_PATCH_PENDING
898	jo	.Lio_patch_pending
899#endif
900	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
901	jo	.Lio_sigpending
902	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
903	jo	.Lio_notify_resume
904	TSTMSK	__TI_flags(%r12),_TIF_GUARDED_STORAGE
905	jo	.Lio_guarded_storage
906	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
907	jo	.Lio_vxrs
908	TSTMSK	__LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
909	jnz	.Lio_asce
910	j	.Lio_return		# beware of critical section cleanup
911
912#
913# _CIF_MCCK_PENDING is set, call handler
914#
915.Lio_mcck_pending:
916	# TRACE_IRQS_ON already done at .Lio_return
917	brasl	%r14,s390_handle_mcck	# TIF bit will be cleared by handler
918	TRACE_IRQS_OFF
919	j	.Lio_return
920
921#
922# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
923#
924.Lio_asce:
925	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY
926	lctlg	%c7,%c7,__LC_VDSO_ASCE		# load secondary asce
927	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE_PRIMARY
928	jz	.Lio_return
929#ifndef CONFIG_HAVE_MARCH_Z10_FEATURES
930	tm	__LC_STFLE_FAC_LIST+3,0x10	# has MVCOS ?
931	jnz	.Lio_set_fs_fixup
932	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
933	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
934	j	.Lio_return
935.Lio_set_fs_fixup:
936#endif
937	larl	%r14,.Lio_return
938	jg	set_fs_fixup
939
940#
941# CIF_FPU is set, restore floating-point controls and floating-point registers.
942#
943.Lio_vxrs:
944	larl	%r14,.Lio_return
945	jg	load_fpu_regs
946
947#
948# _TIF_GUARDED_STORAGE is set, call guarded_storage_load
949#
950.Lio_guarded_storage:
951	# TRACE_IRQS_ON already done at .Lio_return
952	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
953	lgr	%r2,%r11		# pass pointer to pt_regs
954	brasl	%r14,gs_load_bc_cb
955	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
956	TRACE_IRQS_OFF
957	j	.Lio_return
958
959#
960# _TIF_NEED_RESCHED is set, call schedule
961#
962.Lio_reschedule:
963	# TRACE_IRQS_ON already done at .Lio_return
964	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
965	brasl	%r14,schedule		# call scheduler
966	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
967	TRACE_IRQS_OFF
968	j	.Lio_return
969
970#
971# _TIF_PATCH_PENDING is set, call klp_update_patch_state
972#
973#ifdef CONFIG_LIVEPATCH
974.Lio_patch_pending:
975	lg	%r2,__LC_CURRENT	# pass pointer to task struct
976	larl	%r14,.Lio_return
977	jg	klp_update_patch_state
978#endif
979
980#
981# _TIF_SIGPENDING or is set, call do_signal
982#
983.Lio_sigpending:
984	# TRACE_IRQS_ON already done at .Lio_return
985	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
986	lgr	%r2,%r11		# pass pointer to pt_regs
987	brasl	%r14,do_signal
988	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
989	TRACE_IRQS_OFF
990	j	.Lio_return
991
992#
993# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
994#
995.Lio_notify_resume:
996	# TRACE_IRQS_ON already done at .Lio_return
997	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
998	lgr	%r2,%r11		# pass pointer to pt_regs
999	brasl	%r14,do_notify_resume
1000	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
1001	TRACE_IRQS_OFF
1002	j	.Lio_return
1003
1004/*
1005 * External interrupt handler routine
1006 */
1007ENTRY(ext_int_handler)
1008	STCK	__LC_INT_CLOCK
1009	stpt	__LC_ASYNC_ENTER_TIMER
1010	BPOFF
1011	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
1012	lg	%r12,__LC_CURRENT
1013	larl	%r13,cleanup_critical
1014	lmg	%r8,%r9,__LC_EXT_OLD_PSW
1015	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
1016	stmg	%r0,%r7,__PT_R0(%r11)
1017	# clear user controlled registers to prevent speculative use
1018	xgr	%r0,%r0
1019	xgr	%r1,%r1
1020	xgr	%r2,%r2
1021	xgr	%r3,%r3
1022	xgr	%r4,%r4
1023	xgr	%r5,%r5
1024	xgr	%r6,%r6
1025	xgr	%r7,%r7
1026	xgr	%r10,%r10
1027	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
1028	stmg	%r8,%r9,__PT_PSW(%r11)
1029	lghi	%r1,__LC_EXT_PARAMS2
1030	mvc	__PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
1031	mvc	__PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
1032	mvc	__PT_INT_PARM_LONG(8,%r11),0(%r1)
1033	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1034	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
1035	jo	.Lio_restore
1036	TRACE_IRQS_OFF
1037	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1038	lgr	%r2,%r11		# pass pointer to pt_regs
1039	lghi	%r3,EXT_INTERRUPT
1040	brasl	%r14,do_IRQ
1041	j	.Lio_return
1042
1043/*
1044 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
1045 */
1046ENTRY(psw_idle)
1047	stg	%r3,__SF_EMPTY(%r15)
1048	larl	%r1,.Lpsw_idle_lpsw+4
1049	stg	%r1,__SF_EMPTY+8(%r15)
1050#ifdef CONFIG_SMP
1051	larl	%r1,smp_cpu_mtid
1052	llgf	%r1,0(%r1)
1053	ltgr	%r1,%r1
1054	jz	.Lpsw_idle_stcctm
1055	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
1056.Lpsw_idle_stcctm:
1057#endif
1058	oi	__LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
1059	BPON
1060	STCK	__CLOCK_IDLE_ENTER(%r2)
1061	stpt	__TIMER_IDLE_ENTER(%r2)
1062.Lpsw_idle_lpsw:
1063	lpswe	__SF_EMPTY(%r15)
1064	BR_R1USE_R14
1065.Lpsw_idle_end:
1066
1067/*
1068 * Store floating-point controls and floating-point or vector register
1069 * depending whether the vector facility is available.	A critical section
1070 * cleanup assures that the registers are stored even if interrupted for
1071 * some other work.  The CIF_FPU flag is set to trigger a lazy restore
1072 * of the register contents at return from io or a system call.
1073 */
1074ENTRY(save_fpu_regs)
1075	lg	%r2,__LC_CURRENT
1076	aghi	%r2,__TASK_thread
1077	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
1078	jo	.Lsave_fpu_regs_exit
1079	stfpc	__THREAD_FPU_fpc(%r2)
1080	lg	%r3,__THREAD_FPU_regs(%r2)
1081	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1082	jz	.Lsave_fpu_regs_fp	  # no -> store FP regs
1083	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
1084	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
1085	j	.Lsave_fpu_regs_done	  # -> set CIF_FPU flag
1086.Lsave_fpu_regs_fp:
1087	std	0,0(%r3)
1088	std	1,8(%r3)
1089	std	2,16(%r3)
1090	std	3,24(%r3)
1091	std	4,32(%r3)
1092	std	5,40(%r3)
1093	std	6,48(%r3)
1094	std	7,56(%r3)
1095	std	8,64(%r3)
1096	std	9,72(%r3)
1097	std	10,80(%r3)
1098	std	11,88(%r3)
1099	std	12,96(%r3)
1100	std	13,104(%r3)
1101	std	14,112(%r3)
1102	std	15,120(%r3)
1103.Lsave_fpu_regs_done:
1104	oi	__LC_CPU_FLAGS+7,_CIF_FPU
1105.Lsave_fpu_regs_exit:
1106	BR_R1USE_R14
1107.Lsave_fpu_regs_end:
1108EXPORT_SYMBOL(save_fpu_regs)
1109
1110/*
1111 * Load floating-point controls and floating-point or vector registers.
1112 * A critical section cleanup assures that the register contents are
1113 * loaded even if interrupted for some other work.
1114 *
1115 * There are special calling conventions to fit into sysc and io return work:
1116 *	%r15:	<kernel stack>
1117 * The function requires:
1118 *	%r4
1119 */
1120load_fpu_regs:
1121	lg	%r4,__LC_CURRENT
1122	aghi	%r4,__TASK_thread
1123	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
1124	jno	.Lload_fpu_regs_exit
1125	lfpc	__THREAD_FPU_fpc(%r4)
1126	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1127	lg	%r4,__THREAD_FPU_regs(%r4)	# %r4 <- reg save area
1128	jz	.Lload_fpu_regs_fp		# -> no VX, load FP regs
1129	VLM	%v0,%v15,0,%r4
1130	VLM	%v16,%v31,256,%r4
1131	j	.Lload_fpu_regs_done
1132.Lload_fpu_regs_fp:
1133	ld	0,0(%r4)
1134	ld	1,8(%r4)
1135	ld	2,16(%r4)
1136	ld	3,24(%r4)
1137	ld	4,32(%r4)
1138	ld	5,40(%r4)
1139	ld	6,48(%r4)
1140	ld	7,56(%r4)
1141	ld	8,64(%r4)
1142	ld	9,72(%r4)
1143	ld	10,80(%r4)
1144	ld	11,88(%r4)
1145	ld	12,96(%r4)
1146	ld	13,104(%r4)
1147	ld	14,112(%r4)
1148	ld	15,120(%r4)
1149.Lload_fpu_regs_done:
1150	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
1151.Lload_fpu_regs_exit:
1152	BR_R1USE_R14
1153.Lload_fpu_regs_end:
1154
1155.L__critical_end:
1156
1157/*
1158 * Machine check handler routines
1159 */
1160ENTRY(mcck_int_handler)
1161	STCK	__LC_MCCK_CLOCK
1162	BPOFF
1163	la	%r1,4095		# validate r1
1164	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# validate cpu timer
1165	sckc	__LC_CLOCK_COMPARATOR			# validate comparator
1166	lam	%a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
1167	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
1168	lg	%r12,__LC_CURRENT
1169	larl	%r13,cleanup_critical
1170	lmg	%r8,%r9,__LC_MCK_OLD_PSW
1171	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
1172	jo	.Lmcck_panic		# yes -> rest of mcck code invalid
1173	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_CR_VALID
1174	jno	.Lmcck_panic		# control registers invalid -> panic
1175	la	%r14,4095
1176	lctlg	%c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
1177	ptlb
1178	lg	%r11,__LC_MCESAD-4095(%r14) # extended machine check save area
1179	nill	%r11,0xfc00		# MCESA_ORIGIN_MASK
1180	TSTMSK	__LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
1181	jno	0f
1182	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_GS_VALID
1183	jno	0f
1184	.insn	 rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
11850:	l	%r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
1186	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_FC_VALID
1187	jo	0f
1188	sr	%r14,%r14
11890:	sfpc	%r14
1190	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1191	jo	0f
1192	lghi	%r14,__LC_FPREGS_SAVE_AREA
1193	ld	%f0,0(%r14)
1194	ld	%f1,8(%r14)
1195	ld	%f2,16(%r14)
1196	ld	%f3,24(%r14)
1197	ld	%f4,32(%r14)
1198	ld	%f5,40(%r14)
1199	ld	%f6,48(%r14)
1200	ld	%f7,56(%r14)
1201	ld	%f8,64(%r14)
1202	ld	%f9,72(%r14)
1203	ld	%f10,80(%r14)
1204	ld	%f11,88(%r14)
1205	ld	%f12,96(%r14)
1206	ld	%f13,104(%r14)
1207	ld	%f14,112(%r14)
1208	ld	%f15,120(%r14)
1209	j	1f
12100:	VLM	%v0,%v15,0,%r11
1211	VLM	%v16,%v31,256,%r11
12121:	lghi	%r14,__LC_CPU_TIMER_SAVE_AREA
1213	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
1214	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1215	jo	3f
1216	la	%r14,__LC_SYNC_ENTER_TIMER
1217	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
1218	jl	0f
1219	la	%r14,__LC_ASYNC_ENTER_TIMER
12200:	clc	0(8,%r14),__LC_EXIT_TIMER
1221	jl	1f
1222	la	%r14,__LC_EXIT_TIMER
12231:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
1224	jl	2f
1225	la	%r14,__LC_LAST_UPDATE_TIMER
12262:	spt	0(%r14)
1227	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
12283:	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
1229	jno	.Lmcck_panic
1230	tmhh	%r8,0x0001		# interrupting from user ?
1231	jnz	4f
1232	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
1233	jno	.Lmcck_panic
12344:	SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
1235.Lmcck_skip:
1236	lghi	%r14,__LC_GPREGS_SAVE_AREA+64
1237	stmg	%r0,%r7,__PT_R0(%r11)
1238	# clear user controlled registers to prevent speculative use
1239	xgr	%r0,%r0
1240	xgr	%r1,%r1
1241	xgr	%r2,%r2
1242	xgr	%r3,%r3
1243	xgr	%r4,%r4
1244	xgr	%r5,%r5
1245	xgr	%r6,%r6
1246	xgr	%r7,%r7
1247	xgr	%r10,%r10
1248	mvc	__PT_R8(64,%r11),0(%r14)
1249	stmg	%r8,%r9,__PT_PSW(%r11)
1250	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1251	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1252	lgr	%r2,%r11		# pass pointer to pt_regs
1253	brasl	%r14,s390_do_machine_check
1254	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
1255	jno	.Lmcck_return
1256	lg	%r1,__LC_KERNEL_STACK	# switch to kernel stack
1257	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1258	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1259	la	%r11,STACK_FRAME_OVERHEAD(%r1)
1260	lgr	%r15,%r1
1261	ssm	__LC_PGM_NEW_PSW	# turn dat on, keep irqs off
1262	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
1263	jno	.Lmcck_return
1264	TRACE_IRQS_OFF
1265	brasl	%r14,s390_handle_mcck
1266	TRACE_IRQS_ON
1267.Lmcck_return:
1268	lg	%r14,__LC_VDSO_PER_CPU
1269	lmg	%r0,%r10,__PT_R0(%r11)
1270	mvc	__LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1271	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1272	jno	0f
1273	BPEXIT	__TI_flags(%r12),_TIF_ISOLATE_BP
1274	stpt	__LC_EXIT_TIMER
1275	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
12760:	lmg	%r11,%r15,__PT_R11(%r11)
1277	lpswe	__LC_RETURN_MCCK_PSW
1278
1279.Lmcck_panic:
1280	lg	%r15,__LC_PANIC_STACK
1281	la	%r11,STACK_FRAME_OVERHEAD(%r15)
1282	j	.Lmcck_skip
1283
1284#
1285# PSW restart interrupt handler
1286#
1287ENTRY(restart_int_handler)
1288	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1289	jz	0f
1290	.insn	s,0xb2800000,__LC_LPP
12910:	stg	%r15,__LC_SAVE_AREA_RESTART
1292	lg	%r15,__LC_RESTART_STACK
1293	aghi	%r15,-__PT_SIZE			# create pt_regs on stack
1294	xc	0(__PT_SIZE,%r15),0(%r15)
1295	stmg	%r0,%r14,__PT_R0(%r15)
1296	mvc	__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1297	mvc	__PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1298	aghi	%r15,-STACK_FRAME_OVERHEAD	# create stack frame on stack
1299	xc	0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1300	lg	%r1,__LC_RESTART_FN		# load fn, parm & source cpu
1301	lg	%r2,__LC_RESTART_DATA
1302	lg	%r3,__LC_RESTART_SOURCE
1303	ltgr	%r3,%r3				# test source cpu address
1304	jm	1f				# negative -> skip source stop
13050:	sigp	%r4,%r3,SIGP_SENSE		# sigp sense to source cpu
1306	brc	10,0b				# wait for status stored
13071:	basr	%r14,%r1			# call function
1308	stap	__SF_EMPTY(%r15)		# store cpu address
1309	llgh	%r3,__SF_EMPTY(%r15)
13102:	sigp	%r4,%r3,SIGP_STOP		# sigp stop to current cpu
1311	brc	2,2b
13123:	j	3b
1313
1314	.section .kprobes.text, "ax"
1315
1316#ifdef CONFIG_CHECK_STACK
1317/*
1318 * The synchronous or the asynchronous stack overflowed. We are dead.
1319 * No need to properly save the registers, we are going to panic anyway.
1320 * Setup a pt_regs so that show_trace can provide a good call trace.
1321 */
1322stack_overflow:
1323	lg	%r15,__LC_PANIC_STACK	# change to panic stack
1324	la	%r11,STACK_FRAME_OVERHEAD(%r15)
1325	stmg	%r0,%r7,__PT_R0(%r11)
1326	stmg	%r8,%r9,__PT_PSW(%r11)
1327	mvc	__PT_R8(64,%r11),0(%r14)
1328	stg	%r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1329	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1330	lgr	%r2,%r11		# pass pointer to pt_regs
1331	jg	kernel_stack_overflow
1332#endif
1333
1334cleanup_critical:
1335#if IS_ENABLED(CONFIG_KVM)
1336	clg	%r9,BASED(.Lcleanup_table_sie)	# .Lsie_gmap
1337	jl	0f
1338	clg	%r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1339	jl	.Lcleanup_sie
1340#endif
1341	clg	%r9,BASED(.Lcleanup_table)	# system_call
1342	jl	0f
1343	clg	%r9,BASED(.Lcleanup_table+8)	# .Lsysc_do_svc
1344	jl	.Lcleanup_system_call
1345	clg	%r9,BASED(.Lcleanup_table+16)	# .Lsysc_tif
1346	jl	0f
1347	clg	%r9,BASED(.Lcleanup_table+24)	# .Lsysc_restore
1348	jl	.Lcleanup_sysc_tif
1349	clg	%r9,BASED(.Lcleanup_table+32)	# .Lsysc_done
1350	jl	.Lcleanup_sysc_restore
1351	clg	%r9,BASED(.Lcleanup_table+40)	# .Lio_tif
1352	jl	0f
1353	clg	%r9,BASED(.Lcleanup_table+48)	# .Lio_restore
1354	jl	.Lcleanup_io_tif
1355	clg	%r9,BASED(.Lcleanup_table+56)	# .Lio_done
1356	jl	.Lcleanup_io_restore
1357	clg	%r9,BASED(.Lcleanup_table+64)	# psw_idle
1358	jl	0f
1359	clg	%r9,BASED(.Lcleanup_table+72)	# .Lpsw_idle_end
1360	jl	.Lcleanup_idle
1361	clg	%r9,BASED(.Lcleanup_table+80)	# save_fpu_regs
1362	jl	0f
1363	clg	%r9,BASED(.Lcleanup_table+88)	# .Lsave_fpu_regs_end
1364	jl	.Lcleanup_save_fpu_regs
1365	clg	%r9,BASED(.Lcleanup_table+96)	# load_fpu_regs
1366	jl	0f
1367	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
1368	jl	.Lcleanup_load_fpu_regs
13690:	BR_R11USE_R14
1370
1371	.align	8
1372.Lcleanup_table:
1373	.quad	system_call
1374	.quad	.Lsysc_do_svc
1375	.quad	.Lsysc_tif
1376	.quad	.Lsysc_restore
1377	.quad	.Lsysc_done
1378	.quad	.Lio_tif
1379	.quad	.Lio_restore
1380	.quad	.Lio_done
1381	.quad	psw_idle
1382	.quad	.Lpsw_idle_end
1383	.quad	save_fpu_regs
1384	.quad	.Lsave_fpu_regs_end
1385	.quad	load_fpu_regs
1386	.quad	.Lload_fpu_regs_end
1387
1388#if IS_ENABLED(CONFIG_KVM)
1389.Lcleanup_table_sie:
1390	.quad	.Lsie_gmap
1391	.quad	.Lsie_done
1392
1393.Lcleanup_sie:
1394	cghi    %r11,__LC_SAVE_AREA_ASYNC 	#Is this in normal interrupt?
1395	je      1f
1396	slg     %r9,BASED(.Lsie_crit_mcck_start)
1397	clg     %r9,BASED(.Lsie_crit_mcck_length)
1398	jh      1f
1399	oi      __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
14001:	BPENTER __SF_EMPTY+24(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
1401	lg	%r9,__SF_EMPTY(%r15)		# get control block pointer
1402	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
1403	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
1404	larl	%r9,sie_exit			# skip forward to sie_exit
1405	BR_R11USE_R14
1406#endif
1407
1408.Lcleanup_system_call:
1409	# check if stpt has been executed
1410	clg	%r9,BASED(.Lcleanup_system_call_insn)
1411	jh	0f
1412	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1413	cghi	%r11,__LC_SAVE_AREA_ASYNC
1414	je	0f
1415	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
14160:	# check if stmg has been executed
1417	clg	%r9,BASED(.Lcleanup_system_call_insn+8)
1418	jh	0f
1419	mvc	__LC_SAVE_AREA_SYNC(64),0(%r11)
14200:	# check if base register setup + TIF bit load has been done
1421	clg	%r9,BASED(.Lcleanup_system_call_insn+16)
1422	jhe	0f
1423	# set up saved register r12 task struct pointer
1424	stg	%r12,32(%r11)
1425	# set up saved register r13 __TASK_thread offset
1426	mvc	40(8,%r11),BASED(.Lcleanup_system_call_const)
14270:	# check if the user time update has been done
1428	clg	%r9,BASED(.Lcleanup_system_call_insn+24)
1429	jh	0f
1430	lg	%r15,__LC_EXIT_TIMER
1431	slg	%r15,__LC_SYNC_ENTER_TIMER
1432	alg	%r15,__LC_USER_TIMER
1433	stg	%r15,__LC_USER_TIMER
14340:	# check if the system time update has been done
1435	clg	%r9,BASED(.Lcleanup_system_call_insn+32)
1436	jh	0f
1437	lg	%r15,__LC_LAST_UPDATE_TIMER
1438	slg	%r15,__LC_EXIT_TIMER
1439	alg	%r15,__LC_SYSTEM_TIMER
1440	stg	%r15,__LC_SYSTEM_TIMER
14410:	# update accounting time stamp
1442	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1443	BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
1444	# set up saved register r11
1445	lg	%r15,__LC_KERNEL_STACK
1446	la	%r9,STACK_FRAME_OVERHEAD(%r15)
1447	stg	%r9,24(%r11)		# r11 pt_regs pointer
1448	# fill pt_regs
1449	mvc	__PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1450	stmg	%r0,%r7,__PT_R0(%r9)
1451	mvc	__PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1452	mvc	__PT_INT_CODE(4,%r9),__LC_SVC_ILC
1453	xc	__PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1454	mvi	__PT_FLAGS+7(%r9),_PIF_SYSCALL
1455	# setup saved register r15
1456	stg	%r15,56(%r11)		# r15 stack pointer
1457	# set new psw address and exit
1458	larl	%r9,.Lsysc_do_svc
1459	BR_R11USE_R14
1460.Lcleanup_system_call_insn:
1461	.quad	system_call
1462	.quad	.Lsysc_stmg
1463	.quad	.Lsysc_per
1464	.quad	.Lsysc_vtime+36
1465	.quad	.Lsysc_vtime+42
1466.Lcleanup_system_call_const:
1467	.quad	__TASK_thread
1468
1469.Lcleanup_sysc_tif:
1470	larl	%r9,.Lsysc_tif
1471	BR_R11USE_R14
1472
1473.Lcleanup_sysc_restore:
1474	# check if stpt has been executed
1475	clg	%r9,BASED(.Lcleanup_sysc_restore_insn)
1476	jh	0f
1477	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1478	cghi	%r11,__LC_SAVE_AREA_ASYNC
1479	je	0f
1480	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
14810:	clg	%r9,BASED(.Lcleanup_sysc_restore_insn+8)
1482	je	1f
1483	lg	%r9,24(%r11)		# get saved pointer to pt_regs
1484	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1485	mvc	0(64,%r11),__PT_R8(%r9)
1486	lmg	%r0,%r7,__PT_R0(%r9)
14871:	lmg	%r8,%r9,__LC_RETURN_PSW
1488	BR_R11USE_R14
1489.Lcleanup_sysc_restore_insn:
1490	.quad	.Lsysc_exit_timer
1491	.quad	.Lsysc_done - 4
1492
1493.Lcleanup_io_tif:
1494	larl	%r9,.Lio_tif
1495	BR_R11USE_R14
1496
1497.Lcleanup_io_restore:
1498	# check if stpt has been executed
1499	clg	%r9,BASED(.Lcleanup_io_restore_insn)
1500	jh	0f
1501	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
15020:	clg	%r9,BASED(.Lcleanup_io_restore_insn+8)
1503	je	1f
1504	lg	%r9,24(%r11)		# get saved r11 pointer to pt_regs
1505	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1506	mvc	0(64,%r11),__PT_R8(%r9)
1507	lmg	%r0,%r7,__PT_R0(%r9)
15081:	lmg	%r8,%r9,__LC_RETURN_PSW
1509	BR_R11USE_R14
1510.Lcleanup_io_restore_insn:
1511	.quad	.Lio_exit_timer
1512	.quad	.Lio_done - 4
1513
1514.Lcleanup_idle:
1515	ni	__LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1516	# copy interrupt clock & cpu timer
1517	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1518	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1519	cghi	%r11,__LC_SAVE_AREA_ASYNC
1520	je	0f
1521	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1522	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
15230:	# check if stck & stpt have been executed
1524	clg	%r9,BASED(.Lcleanup_idle_insn)
1525	jhe	1f
1526	mvc	__CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1527	mvc	__TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
15281:	# calculate idle cycles
1529#ifdef CONFIG_SMP
1530	clg	%r9,BASED(.Lcleanup_idle_insn)
1531	jl	3f
1532	larl	%r1,smp_cpu_mtid
1533	llgf	%r1,0(%r1)
1534	ltgr	%r1,%r1
1535	jz	3f
1536	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1537	larl	%r3,mt_cycles
1538	ag	%r3,__LC_PERCPU_OFFSET
1539	la	%r4,__SF_EMPTY+16(%r15)
15402:	lg	%r0,0(%r3)
1541	slg	%r0,0(%r4)
1542	alg	%r0,64(%r4)
1543	stg	%r0,0(%r3)
1544	la	%r3,8(%r3)
1545	la	%r4,8(%r4)
1546	brct	%r1,2b
1547#endif
15483:	# account system time going idle
1549	lg	%r9,__LC_STEAL_TIMER
1550	alg	%r9,__CLOCK_IDLE_ENTER(%r2)
1551	slg	%r9,__LC_LAST_UPDATE_CLOCK
1552	stg	%r9,__LC_STEAL_TIMER
1553	mvc	__LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1554	lg	%r9,__LC_SYSTEM_TIMER
1555	alg	%r9,__LC_LAST_UPDATE_TIMER
1556	slg	%r9,__TIMER_IDLE_ENTER(%r2)
1557	stg	%r9,__LC_SYSTEM_TIMER
1558	mvc	__LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1559	# prepare return psw
1560	nihh	%r8,0xfcfd		# clear irq & wait state bits
1561	lg	%r9,48(%r11)		# return from psw_idle
1562	BR_R11USE_R14
1563.Lcleanup_idle_insn:
1564	.quad	.Lpsw_idle_lpsw
1565
1566.Lcleanup_save_fpu_regs:
1567	larl	%r9,save_fpu_regs
1568	BR_R11USE_R14
1569
1570.Lcleanup_load_fpu_regs:
1571	larl	%r9,load_fpu_regs
1572	BR_R11USE_R14
1573
1574/*
1575 * Integer constants
1576 */
1577	.align	8
1578.Lcritical_start:
1579	.quad	.L__critical_start
1580.Lcritical_length:
1581	.quad	.L__critical_end - .L__critical_start
1582#if IS_ENABLED(CONFIG_KVM)
1583.Lsie_critical_start:
1584	.quad	.Lsie_gmap
1585.Lsie_critical_length:
1586	.quad	.Lsie_done - .Lsie_gmap
1587.Lsie_crit_mcck_start:
1588	.quad   .Lsie_entry
1589.Lsie_crit_mcck_length:
1590	.quad   .Lsie_skip - .Lsie_entry
1591#endif
1592	.section .rodata, "a"
1593#define SYSCALL(esame,emu)	.long esame
1594	.globl	sys_call_table
1595sys_call_table:
1596#include "asm/syscall_table.h"
1597#undef SYSCALL
1598
1599#ifdef CONFIG_COMPAT
1600
1601#define SYSCALL(esame,emu)	.long emu
1602	.globl	sys_call_table_emu
1603sys_call_table_emu:
1604#include "asm/syscall_table.h"
1605#undef SYSCALL
1606#endif
1607