1/* 2 * S390 low-level entry points. 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 6 * Hartmut Penner (hp@de.ibm.com), 7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 8 * Heiko Carstens <heiko.carstens@de.ibm.com> 9 */ 10 11#include <linux/init.h> 12#include <linux/linkage.h> 13#include <asm/processor.h> 14#include <asm/cache.h> 15#include <asm/errno.h> 16#include <asm/ptrace.h> 17#include <asm/thread_info.h> 18#include <asm/asm-offsets.h> 19#include <asm/unistd.h> 20#include <asm/page.h> 21#include <asm/sigp.h> 22#include <asm/irq.h> 23#include <asm/vx-insn.h> 24#include <asm/setup.h> 25#include <asm/nmi.h> 26#include <asm/export.h> 27 28__PT_R0 = __PT_GPRS 29__PT_R1 = __PT_GPRS + 8 30__PT_R2 = __PT_GPRS + 16 31__PT_R3 = __PT_GPRS + 24 32__PT_R4 = __PT_GPRS + 32 33__PT_R5 = __PT_GPRS + 40 34__PT_R6 = __PT_GPRS + 48 35__PT_R7 = __PT_GPRS + 56 36__PT_R8 = __PT_GPRS + 64 37__PT_R9 = __PT_GPRS + 72 38__PT_R10 = __PT_GPRS + 80 39__PT_R11 = __PT_GPRS + 88 40__PT_R12 = __PT_GPRS + 96 41__PT_R13 = __PT_GPRS + 104 42__PT_R14 = __PT_GPRS + 112 43__PT_R15 = __PT_GPRS + 120 44 45STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER 46STACK_SIZE = 1 << STACK_SHIFT 47STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE 48 49_TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 50 _TIF_UPROBE) 51_TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ 52 _TIF_SYSCALL_TRACEPOINT) 53_CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \ 54 _CIF_ASCE_SECONDARY | _CIF_FPU) 55_PIF_WORK = (_PIF_PER_TRAP) 56 57#define BASED(name) name-cleanup_critical(%r13) 58 59 .macro TRACE_IRQS_ON 60#ifdef CONFIG_TRACE_IRQFLAGS 61 basr %r2,%r0 62 brasl %r14,trace_hardirqs_on_caller 63#endif 64 .endm 65 66 .macro TRACE_IRQS_OFF 67#ifdef CONFIG_TRACE_IRQFLAGS 68 basr %r2,%r0 69 brasl %r14,trace_hardirqs_off_caller 70#endif 71 .endm 72 73 .macro LOCKDEP_SYS_EXIT 74#ifdef CONFIG_LOCKDEP 75 tm __PT_PSW+1(%r11),0x01 # returning to user ? 76 jz .+10 77 brasl %r14,lockdep_sys_exit 78#endif 79 .endm 80 81 .macro CHECK_STACK stacksize,savearea 82#ifdef CONFIG_CHECK_STACK 83 tml %r15,\stacksize - CONFIG_STACK_GUARD 84 lghi %r14,\savearea 85 jz stack_overflow 86#endif 87 .endm 88 89 .macro SWITCH_ASYNC savearea,timer 90 tmhh %r8,0x0001 # interrupting from user ? 91 jnz 1f 92 lgr %r14,%r9 93 slg %r14,BASED(.Lcritical_start) 94 clg %r14,BASED(.Lcritical_length) 95 jhe 0f 96 lghi %r11,\savearea # inside critical section, do cleanup 97 brasl %r14,cleanup_critical 98 tmhh %r8,0x0001 # retest problem state after cleanup 99 jnz 1f 1000: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? 101 slgr %r14,%r15 102 srag %r14,%r14,STACK_SHIFT 103 jnz 2f 104 CHECK_STACK 1<<STACK_SHIFT,\savearea 105 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 106 j 3f 1071: UPDATE_VTIME %r14,%r15,\timer 1082: lg %r15,__LC_ASYNC_STACK # load async stack 1093: la %r11,STACK_FRAME_OVERHEAD(%r15) 110 .endm 111 112 .macro UPDATE_VTIME w1,w2,enter_timer 113 lg \w1,__LC_EXIT_TIMER 114 lg \w2,__LC_LAST_UPDATE_TIMER 115 slg \w1,\enter_timer 116 slg \w2,__LC_EXIT_TIMER 117 alg \w1,__LC_USER_TIMER 118 alg \w2,__LC_SYSTEM_TIMER 119 stg \w1,__LC_USER_TIMER 120 stg \w2,__LC_SYSTEM_TIMER 121 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer 122 .endm 123 124 .macro REENABLE_IRQS 125 stg %r8,__LC_RETURN_PSW 126 ni __LC_RETURN_PSW,0xbf 127 ssm __LC_RETURN_PSW 128 .endm 129 130 .macro STCK savearea 131#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES 132 .insn s,0xb27c0000,\savearea # store clock fast 133#else 134 .insn s,0xb2050000,\savearea # store clock 135#endif 136 .endm 137 138 /* 139 * The TSTMSK macro generates a test-under-mask instruction by 140 * calculating the memory offset for the specified mask value. 141 * Mask value can be any constant. The macro shifts the mask 142 * value to calculate the memory offset for the test-under-mask 143 * instruction. 144 */ 145 .macro TSTMSK addr, mask, size=8, bytepos=0 146 .if (\bytepos < \size) && (\mask >> 8) 147 .if (\mask & 0xff) 148 .error "Mask exceeds byte boundary" 149 .endif 150 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" 151 .exitm 152 .endif 153 .ifeq \mask 154 .error "Mask must not be zero" 155 .endif 156 off = \size - \bytepos - 1 157 tm off+\addr, \mask 158 .endm 159 160 .section .kprobes.text, "ax" 161.Ldummy: 162 /* 163 * This nop exists only in order to avoid that __switch_to starts at 164 * the beginning of the kprobes text section. In that case we would 165 * have several symbols at the same address. E.g. objdump would take 166 * an arbitrary symbol name when disassembling this code. 167 * With the added nop in between the __switch_to symbol is unique 168 * again. 169 */ 170 nop 0 171 172/* 173 * Scheduler resume function, called by switch_to 174 * gpr2 = (task_struct *) prev 175 * gpr3 = (task_struct *) next 176 * Returns: 177 * gpr2 = prev 178 */ 179ENTRY(__switch_to) 180 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task 181 lgr %r1,%r2 182 aghi %r1,__TASK_thread # thread_struct of prev task 183 lg %r5,__TASK_stack(%r3) # start of kernel stack of next 184 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev 185 lgr %r1,%r3 186 aghi %r1,__TASK_thread # thread_struct of next task 187 lgr %r15,%r5 188 aghi %r15,STACK_INIT # end of kernel stack of next 189 stg %r3,__LC_CURRENT # store task struct of next 190 stg %r15,__LC_KERNEL_STACK # store end of kernel stack 191 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next 192 /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */ 193 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 194 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next 195 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task 196 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 197 bzr %r14 198 .insn s,0xb2800000,__LC_LPP # set program parameter 199 br %r14 200 201.L__critical_start: 202 203#if IS_ENABLED(CONFIG_KVM) 204/* 205 * sie64a calling convention: 206 * %r2 pointer to sie control block 207 * %r3 guest register save area 208 */ 209ENTRY(sie64a) 210 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers 211 stg %r2,__SF_EMPTY(%r15) # save control block pointer 212 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area 213 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 214 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? 215 jno .Lsie_load_guest_gprs 216 brasl %r14,load_fpu_regs # load guest fp/vx regs 217.Lsie_load_guest_gprs: 218 lmg %r0,%r13,0(%r3) # load guest gprs 0-13 219 lg %r14,__LC_GMAP # get gmap pointer 220 ltgr %r14,%r14 221 jz .Lsie_gmap 222 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce 223.Lsie_gmap: 224 lg %r14,__SF_EMPTY(%r15) # get control block pointer 225 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now 226 tm __SIE_PROG20+3(%r14),3 # last exit... 227 jnz .Lsie_skip 228 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 229 jo .Lsie_skip # exit if fp/vx regs changed 230 sie 0(%r14) 231.Lsie_skip: 232 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE 233 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 234.Lsie_done: 235# some program checks are suppressing. C code (e.g. do_protection_exception) 236# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other 237# instructions between sie64a and .Lsie_done should not cause program 238# interrupts. So lets use a nop (47 00 00 00) as a landing pad. 239# See also .Lcleanup_sie 240.Lrewind_pad: 241 nop 0 242 .globl sie_exit 243sie_exit: 244 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area 245 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 246 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers 247 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code 248 br %r14 249.Lsie_fault: 250 lghi %r14,-EFAULT 251 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code 252 j sie_exit 253 254 EX_TABLE(.Lrewind_pad,.Lsie_fault) 255 EX_TABLE(sie_exit,.Lsie_fault) 256EXPORT_SYMBOL(sie64a) 257EXPORT_SYMBOL(sie_exit) 258#endif 259 260/* 261 * SVC interrupt handler routine. System calls are synchronous events and 262 * are executed with interrupts enabled. 263 */ 264 265ENTRY(system_call) 266 stpt __LC_SYNC_ENTER_TIMER 267.Lsysc_stmg: 268 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 269 lg %r12,__LC_CURRENT 270 lghi %r13,__TASK_thread 271 lghi %r14,_PIF_SYSCALL 272.Lsysc_per: 273 lg %r15,__LC_KERNEL_STACK 274 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs 275.Lsysc_vtime: 276 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER 277 stmg %r0,%r7,__PT_R0(%r11) 278 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 279 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW 280 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC 281 stg %r14,__PT_FLAGS(%r11) 282.Lsysc_do_svc: 283 # load address of system call table 284 lg %r10,__THREAD_sysc_table(%r13,%r12) 285 llgh %r8,__PT_INT_CODE+2(%r11) 286 slag %r8,%r8,2 # shift and test for svc 0 287 jnz .Lsysc_nr_ok 288 # svc 0: system call number in %r1 289 llgfr %r1,%r1 # clear high word in r1 290 cghi %r1,NR_syscalls 291 jnl .Lsysc_nr_ok 292 sth %r1,__PT_INT_CODE+2(%r11) 293 slag %r8,%r1,2 294.Lsysc_nr_ok: 295 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 296 stg %r2,__PT_ORIG_GPR2(%r11) 297 stg %r7,STACK_FRAME_OVERHEAD(%r15) 298 lgf %r9,0(%r8,%r10) # get system call add. 299 TSTMSK __TI_flags(%r12),_TIF_TRACE 300 jnz .Lsysc_tracesys 301 basr %r14,%r9 # call sys_xxxx 302 stg %r2,__PT_R2(%r11) # store return value 303 304.Lsysc_return: 305 LOCKDEP_SYS_EXIT 306.Lsysc_tif: 307 TSTMSK __PT_FLAGS(%r11),_PIF_WORK 308 jnz .Lsysc_work 309 TSTMSK __TI_flags(%r12),_TIF_WORK 310 jnz .Lsysc_work # check for work 311 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 312 jnz .Lsysc_work 313.Lsysc_restore: 314 lg %r14,__LC_VDSO_PER_CPU 315 lmg %r0,%r10,__PT_R0(%r11) 316 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 317 stpt __LC_EXIT_TIMER 318 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 319 lmg %r11,%r15,__PT_R11(%r11) 320 lpswe __LC_RETURN_PSW 321.Lsysc_done: 322 323# 324# One of the work bits is on. Find out which one. 325# 326.Lsysc_work: 327 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 328 jo .Lsysc_mcck_pending 329 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 330 jo .Lsysc_reschedule 331#ifdef CONFIG_UPROBES 332 TSTMSK __TI_flags(%r12),_TIF_UPROBE 333 jo .Lsysc_uprobe_notify 334#endif 335 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP 336 jo .Lsysc_singlestep 337 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 338 jo .Lsysc_sigpending 339 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 340 jo .Lsysc_notify_resume 341 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 342 jo .Lsysc_vxrs 343 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 344 jnz .Lsysc_asce 345 j .Lsysc_return # beware of critical section cleanup 346 347# 348# _TIF_NEED_RESCHED is set, call schedule 349# 350.Lsysc_reschedule: 351 larl %r14,.Lsysc_return 352 jg schedule 353 354# 355# _CIF_MCCK_PENDING is set, call handler 356# 357.Lsysc_mcck_pending: 358 larl %r14,.Lsysc_return 359 jg s390_handle_mcck # TIF bit will be cleared by handler 360 361# 362# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 363# 364.Lsysc_asce: 365 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 366 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 367 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY 368 jz .Lsysc_return 369 larl %r14,.Lsysc_return 370 jg set_fs_fixup 371 372# 373# CIF_FPU is set, restore floating-point controls and floating-point registers. 374# 375.Lsysc_vxrs: 376 larl %r14,.Lsysc_return 377 jg load_fpu_regs 378 379# 380# _TIF_SIGPENDING is set, call do_signal 381# 382.Lsysc_sigpending: 383 lgr %r2,%r11 # pass pointer to pt_regs 384 brasl %r14,do_signal 385 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 386 jno .Lsysc_return 387.Lsysc_do_syscall: 388 lghi %r13,__TASK_thread 389 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments 390 lghi %r1,0 # svc 0 returns -ENOSYS 391 j .Lsysc_do_svc 392 393# 394# _TIF_NOTIFY_RESUME is set, call do_notify_resume 395# 396.Lsysc_notify_resume: 397 lgr %r2,%r11 # pass pointer to pt_regs 398 larl %r14,.Lsysc_return 399 jg do_notify_resume 400 401# 402# _TIF_UPROBE is set, call uprobe_notify_resume 403# 404#ifdef CONFIG_UPROBES 405.Lsysc_uprobe_notify: 406 lgr %r2,%r11 # pass pointer to pt_regs 407 larl %r14,.Lsysc_return 408 jg uprobe_notify_resume 409#endif 410 411# 412# _PIF_PER_TRAP is set, call do_per_trap 413# 414.Lsysc_singlestep: 415 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP 416 lgr %r2,%r11 # pass pointer to pt_regs 417 larl %r14,.Lsysc_return 418 jg do_per_trap 419 420# 421# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before 422# and after the system call 423# 424.Lsysc_tracesys: 425 lgr %r2,%r11 # pass pointer to pt_regs 426 la %r3,0 427 llgh %r0,__PT_INT_CODE+2(%r11) 428 stg %r0,__PT_R2(%r11) 429 brasl %r14,do_syscall_trace_enter 430 lghi %r0,NR_syscalls 431 clgr %r0,%r2 432 jnh .Lsysc_tracenogo 433 sllg %r8,%r2,2 434 lgf %r9,0(%r8,%r10) 435.Lsysc_tracego: 436 lmg %r3,%r7,__PT_R3(%r11) 437 stg %r7,STACK_FRAME_OVERHEAD(%r15) 438 lg %r2,__PT_ORIG_GPR2(%r11) 439 basr %r14,%r9 # call sys_xxx 440 stg %r2,__PT_R2(%r11) # store return value 441.Lsysc_tracenogo: 442 TSTMSK __TI_flags(%r12),_TIF_TRACE 443 jz .Lsysc_return 444 lgr %r2,%r11 # pass pointer to pt_regs 445 larl %r14,.Lsysc_return 446 jg do_syscall_trace_exit 447 448# 449# a new process exits the kernel with ret_from_fork 450# 451ENTRY(ret_from_fork) 452 la %r11,STACK_FRAME_OVERHEAD(%r15) 453 lg %r12,__LC_CURRENT 454 brasl %r14,schedule_tail 455 TRACE_IRQS_ON 456 ssm __LC_SVC_NEW_PSW # reenable interrupts 457 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? 458 jne .Lsysc_tracenogo 459 # it's a kernel thread 460 lmg %r9,%r10,__PT_R9(%r11) # load gprs 461ENTRY(kernel_thread_starter) 462 la %r2,0(%r10) 463 basr %r14,%r9 464 j .Lsysc_tracenogo 465 466/* 467 * Program check handler routine 468 */ 469 470ENTRY(pgm_check_handler) 471 stpt __LC_SYNC_ENTER_TIMER 472 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 473 lg %r10,__LC_LAST_BREAK 474 lg %r12,__LC_CURRENT 475 larl %r13,cleanup_critical 476 lmg %r8,%r9,__LC_PGM_OLD_PSW 477 tmhh %r8,0x0001 # test problem state bit 478 jnz 2f # -> fault in user space 479#if IS_ENABLED(CONFIG_KVM) 480 # cleanup critical section for sie64a 481 lgr %r14,%r9 482 slg %r14,BASED(.Lsie_critical_start) 483 clg %r14,BASED(.Lsie_critical_length) 484 jhe 0f 485 brasl %r14,.Lcleanup_sie 486#endif 4870: tmhh %r8,0x4000 # PER bit set in old PSW ? 488 jnz 1f # -> enabled, can't be a double fault 489 tm __LC_PGM_ILC+3,0x80 # check for per exception 490 jnz .Lpgm_svcper # -> single stepped svc 4911: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC 492 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 493 j 3f 4942: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER 495 lg %r15,__LC_KERNEL_STACK 496 lgr %r14,%r12 497 aghi %r14,__TASK_thread # pointer to thread_struct 498 lghi %r13,__LC_PGM_TDB 499 tm __LC_PGM_ILC+2,0x02 # check for transaction abort 500 jz 3f 501 mvc __THREAD_trap_tdb(256,%r14),0(%r13) 5023: la %r11,STACK_FRAME_OVERHEAD(%r15) 503 stg %r10,__THREAD_last_break(%r14) 504 stmg %r0,%r7,__PT_R0(%r11) 505 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 506 stmg %r8,%r9,__PT_PSW(%r11) 507 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC 508 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE 509 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 510 stg %r10,__PT_ARGS(%r11) 511 tm __LC_PGM_ILC+3,0x80 # check for per exception 512 jz 4f 513 tmhh %r8,0x0001 # kernel per event ? 514 jz .Lpgm_kprobe 515 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP 516 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS 517 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE 518 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID 5194: REENABLE_IRQS 520 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 521 larl %r1,pgm_check_table 522 llgh %r10,__PT_INT_CODE+2(%r11) 523 nill %r10,0x007f 524 sll %r10,2 525 je .Lpgm_return 526 lgf %r1,0(%r10,%r1) # load address of handler routine 527 lgr %r2,%r11 # pass pointer to pt_regs 528 basr %r14,%r1 # branch to interrupt-handler 529.Lpgm_return: 530 LOCKDEP_SYS_EXIT 531 tm __PT_PSW+1(%r11),0x01 # returning to user ? 532 jno .Lsysc_restore 533 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 534 jo .Lsysc_do_syscall 535 j .Lsysc_tif 536 537# 538# PER event in supervisor state, must be kprobes 539# 540.Lpgm_kprobe: 541 REENABLE_IRQS 542 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 543 lgr %r2,%r11 # pass pointer to pt_regs 544 brasl %r14,do_per_trap 545 j .Lpgm_return 546 547# 548# single stepped system call 549# 550.Lpgm_svcper: 551 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW 552 lghi %r13,__TASK_thread 553 larl %r14,.Lsysc_per 554 stg %r14,__LC_RETURN_PSW+8 555 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP 556 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs 557 558/* 559 * IO interrupt handler routine 560 */ 561ENTRY(io_int_handler) 562 STCK __LC_INT_CLOCK 563 stpt __LC_ASYNC_ENTER_TIMER 564 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 565 lg %r12,__LC_CURRENT 566 larl %r13,cleanup_critical 567 lmg %r8,%r9,__LC_IO_OLD_PSW 568 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 569 stmg %r0,%r7,__PT_R0(%r11) 570 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 571 stmg %r8,%r9,__PT_PSW(%r11) 572 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 573 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 574 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 575 jo .Lio_restore 576 TRACE_IRQS_OFF 577 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 578.Lio_loop: 579 lgr %r2,%r11 # pass pointer to pt_regs 580 lghi %r3,IO_INTERRUPT 581 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? 582 jz .Lio_call 583 lghi %r3,THIN_INTERRUPT 584.Lio_call: 585 brasl %r14,do_IRQ 586 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR 587 jz .Lio_return 588 tpi 0 589 jz .Lio_return 590 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 591 j .Lio_loop 592.Lio_return: 593 LOCKDEP_SYS_EXIT 594 TRACE_IRQS_ON 595.Lio_tif: 596 TSTMSK __TI_flags(%r12),_TIF_WORK 597 jnz .Lio_work # there is work to do (signals etc.) 598 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 599 jnz .Lio_work 600.Lio_restore: 601 lg %r14,__LC_VDSO_PER_CPU 602 lmg %r0,%r10,__PT_R0(%r11) 603 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 604 stpt __LC_EXIT_TIMER 605 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 606 lmg %r11,%r15,__PT_R11(%r11) 607 lpswe __LC_RETURN_PSW 608.Lio_done: 609 610# 611# There is work todo, find out in which context we have been interrupted: 612# 1) if we return to user space we can do all _TIF_WORK work 613# 2) if we return to kernel code and kvm is enabled check if we need to 614# modify the psw to leave SIE 615# 3) if we return to kernel code and preemptive scheduling is enabled check 616# the preemption counter and if it is zero call preempt_schedule_irq 617# Before any work can be done, a switch to the kernel stack is required. 618# 619.Lio_work: 620 tm __PT_PSW+1(%r11),0x01 # returning to user ? 621 jo .Lio_work_user # yes -> do resched & signal 622#ifdef CONFIG_PREEMPT 623 # check for preemptive scheduling 624 icm %r0,15,__LC_PREEMPT_COUNT 625 jnz .Lio_restore # preemption is disabled 626 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 627 jno .Lio_restore 628 # switch to kernel stack 629 lg %r1,__PT_R15(%r11) 630 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 631 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 632 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 633 la %r11,STACK_FRAME_OVERHEAD(%r1) 634 lgr %r15,%r1 635 # TRACE_IRQS_ON already done at .Lio_return, call 636 # TRACE_IRQS_OFF to keep things symmetrical 637 TRACE_IRQS_OFF 638 brasl %r14,preempt_schedule_irq 639 j .Lio_return 640#else 641 j .Lio_restore 642#endif 643 644# 645# Need to do work before returning to userspace, switch to kernel stack 646# 647.Lio_work_user: 648 lg %r1,__LC_KERNEL_STACK 649 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 650 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 651 la %r11,STACK_FRAME_OVERHEAD(%r1) 652 lgr %r15,%r1 653 654# 655# One of the work bits is on. Find out which one. 656# 657.Lio_work_tif: 658 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 659 jo .Lio_mcck_pending 660 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 661 jo .Lio_reschedule 662 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 663 jo .Lio_sigpending 664 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 665 jo .Lio_notify_resume 666 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 667 jo .Lio_vxrs 668 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 669 jnz .Lio_asce 670 j .Lio_return # beware of critical section cleanup 671 672# 673# _CIF_MCCK_PENDING is set, call handler 674# 675.Lio_mcck_pending: 676 # TRACE_IRQS_ON already done at .Lio_return 677 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler 678 TRACE_IRQS_OFF 679 j .Lio_return 680 681# 682# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 683# 684.Lio_asce: 685 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 686 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 687 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY 688 jz .Lio_return 689 larl %r14,.Lio_return 690 jg set_fs_fixup 691 692# 693# CIF_FPU is set, restore floating-point controls and floating-point registers. 694# 695.Lio_vxrs: 696 larl %r14,.Lio_return 697 jg load_fpu_regs 698 699# 700# _TIF_NEED_RESCHED is set, call schedule 701# 702.Lio_reschedule: 703 # TRACE_IRQS_ON already done at .Lio_return 704 ssm __LC_SVC_NEW_PSW # reenable interrupts 705 brasl %r14,schedule # call scheduler 706 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 707 TRACE_IRQS_OFF 708 j .Lio_return 709 710# 711# _TIF_SIGPENDING or is set, call do_signal 712# 713.Lio_sigpending: 714 # TRACE_IRQS_ON already done at .Lio_return 715 ssm __LC_SVC_NEW_PSW # reenable interrupts 716 lgr %r2,%r11 # pass pointer to pt_regs 717 brasl %r14,do_signal 718 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 719 TRACE_IRQS_OFF 720 j .Lio_return 721 722# 723# _TIF_NOTIFY_RESUME or is set, call do_notify_resume 724# 725.Lio_notify_resume: 726 # TRACE_IRQS_ON already done at .Lio_return 727 ssm __LC_SVC_NEW_PSW # reenable interrupts 728 lgr %r2,%r11 # pass pointer to pt_regs 729 brasl %r14,do_notify_resume 730 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 731 TRACE_IRQS_OFF 732 j .Lio_return 733 734/* 735 * External interrupt handler routine 736 */ 737ENTRY(ext_int_handler) 738 STCK __LC_INT_CLOCK 739 stpt __LC_ASYNC_ENTER_TIMER 740 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 741 lg %r12,__LC_CURRENT 742 larl %r13,cleanup_critical 743 lmg %r8,%r9,__LC_EXT_OLD_PSW 744 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 745 stmg %r0,%r7,__PT_R0(%r11) 746 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 747 stmg %r8,%r9,__PT_PSW(%r11) 748 lghi %r1,__LC_EXT_PARAMS2 749 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR 750 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS 751 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) 752 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 753 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 754 jo .Lio_restore 755 TRACE_IRQS_OFF 756 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 757 lgr %r2,%r11 # pass pointer to pt_regs 758 lghi %r3,EXT_INTERRUPT 759 brasl %r14,do_IRQ 760 j .Lio_return 761 762/* 763 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. 764 */ 765ENTRY(psw_idle) 766 stg %r3,__SF_EMPTY(%r15) 767 larl %r1,.Lpsw_idle_lpsw+4 768 stg %r1,__SF_EMPTY+8(%r15) 769#ifdef CONFIG_SMP 770 larl %r1,smp_cpu_mtid 771 llgf %r1,0(%r1) 772 ltgr %r1,%r1 773 jz .Lpsw_idle_stcctm 774 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) 775.Lpsw_idle_stcctm: 776#endif 777 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT 778 STCK __CLOCK_IDLE_ENTER(%r2) 779 stpt __TIMER_IDLE_ENTER(%r2) 780.Lpsw_idle_lpsw: 781 lpswe __SF_EMPTY(%r15) 782 br %r14 783.Lpsw_idle_end: 784 785/* 786 * Store floating-point controls and floating-point or vector register 787 * depending whether the vector facility is available. A critical section 788 * cleanup assures that the registers are stored even if interrupted for 789 * some other work. The CIF_FPU flag is set to trigger a lazy restore 790 * of the register contents at return from io or a system call. 791 */ 792ENTRY(save_fpu_regs) 793 lg %r2,__LC_CURRENT 794 aghi %r2,__TASK_thread 795 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 796 bor %r14 797 stfpc __THREAD_FPU_fpc(%r2) 798 lg %r3,__THREAD_FPU_regs(%r2) 799 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 800 jz .Lsave_fpu_regs_fp # no -> store FP regs 801 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) 802 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) 803 j .Lsave_fpu_regs_done # -> set CIF_FPU flag 804.Lsave_fpu_regs_fp: 805 std 0,0(%r3) 806 std 1,8(%r3) 807 std 2,16(%r3) 808 std 3,24(%r3) 809 std 4,32(%r3) 810 std 5,40(%r3) 811 std 6,48(%r3) 812 std 7,56(%r3) 813 std 8,64(%r3) 814 std 9,72(%r3) 815 std 10,80(%r3) 816 std 11,88(%r3) 817 std 12,96(%r3) 818 std 13,104(%r3) 819 std 14,112(%r3) 820 std 15,120(%r3) 821.Lsave_fpu_regs_done: 822 oi __LC_CPU_FLAGS+7,_CIF_FPU 823 br %r14 824.Lsave_fpu_regs_end: 825#if IS_ENABLED(CONFIG_KVM) 826EXPORT_SYMBOL(save_fpu_regs) 827#endif 828 829/* 830 * Load floating-point controls and floating-point or vector registers. 831 * A critical section cleanup assures that the register contents are 832 * loaded even if interrupted for some other work. 833 * 834 * There are special calling conventions to fit into sysc and io return work: 835 * %r15: <kernel stack> 836 * The function requires: 837 * %r4 838 */ 839load_fpu_regs: 840 lg %r4,__LC_CURRENT 841 aghi %r4,__TASK_thread 842 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 843 bnor %r14 844 lfpc __THREAD_FPU_fpc(%r4) 845 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 846 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area 847 jz .Lload_fpu_regs_fp # -> no VX, load FP regs 848 VLM %v0,%v15,0,%r4 849 VLM %v16,%v31,256,%r4 850 j .Lload_fpu_regs_done 851.Lload_fpu_regs_fp: 852 ld 0,0(%r4) 853 ld 1,8(%r4) 854 ld 2,16(%r4) 855 ld 3,24(%r4) 856 ld 4,32(%r4) 857 ld 5,40(%r4) 858 ld 6,48(%r4) 859 ld 7,56(%r4) 860 ld 8,64(%r4) 861 ld 9,72(%r4) 862 ld 10,80(%r4) 863 ld 11,88(%r4) 864 ld 12,96(%r4) 865 ld 13,104(%r4) 866 ld 14,112(%r4) 867 ld 15,120(%r4) 868.Lload_fpu_regs_done: 869 ni __LC_CPU_FLAGS+7,255-_CIF_FPU 870 br %r14 871.Lload_fpu_regs_end: 872 873.L__critical_end: 874 875/* 876 * Machine check handler routines 877 */ 878ENTRY(mcck_int_handler) 879 STCK __LC_MCCK_CLOCK 880 la %r1,4095 # revalidate r1 881 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 882 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 883 lg %r12,__LC_CURRENT 884 larl %r13,cleanup_critical 885 lmg %r8,%r9,__LC_MCK_OLD_PSW 886 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE 887 jo .Lmcck_panic # yes -> rest of mcck code invalid 888 lghi %r14,__LC_CPU_TIMER_SAVE_AREA 889 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 890 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID 891 jo 3f 892 la %r14,__LC_SYNC_ENTER_TIMER 893 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 894 jl 0f 895 la %r14,__LC_ASYNC_ENTER_TIMER 8960: clc 0(8,%r14),__LC_EXIT_TIMER 897 jl 1f 898 la %r14,__LC_EXIT_TIMER 8991: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 900 jl 2f 901 la %r14,__LC_LAST_UPDATE_TIMER 9022: spt 0(%r14) 903 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 9043: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) 905 jno .Lmcck_panic # no -> skip cleanup critical 906 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER 907.Lmcck_skip: 908 lghi %r14,__LC_GPREGS_SAVE_AREA+64 909 stmg %r0,%r7,__PT_R0(%r11) 910 mvc __PT_R8(64,%r11),0(%r14) 911 stmg %r8,%r9,__PT_PSW(%r11) 912 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 913 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 914 lgr %r2,%r11 # pass pointer to pt_regs 915 brasl %r14,s390_do_machine_check 916 tm __PT_PSW+1(%r11),0x01 # returning to user ? 917 jno .Lmcck_return 918 lg %r1,__LC_KERNEL_STACK # switch to kernel stack 919 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 920 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 921 la %r11,STACK_FRAME_OVERHEAD(%r1) 922 lgr %r15,%r1 923 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off 924 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 925 jno .Lmcck_return 926 TRACE_IRQS_OFF 927 brasl %r14,s390_handle_mcck 928 TRACE_IRQS_ON 929.Lmcck_return: 930 lg %r14,__LC_VDSO_PER_CPU 931 lmg %r0,%r10,__PT_R0(%r11) 932 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW 933 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 934 jno 0f 935 stpt __LC_EXIT_TIMER 936 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 9370: lmg %r11,%r15,__PT_R11(%r11) 938 lpswe __LC_RETURN_MCCK_PSW 939 940.Lmcck_panic: 941 lg %r15,__LC_PANIC_STACK 942 la %r11,STACK_FRAME_OVERHEAD(%r15) 943 j .Lmcck_skip 944 945# 946# PSW restart interrupt handler 947# 948ENTRY(restart_int_handler) 949 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 950 jz 0f 951 .insn s,0xb2800000,__LC_LPP 9520: stg %r15,__LC_SAVE_AREA_RESTART 953 lg %r15,__LC_RESTART_STACK 954 aghi %r15,-__PT_SIZE # create pt_regs on stack 955 xc 0(__PT_SIZE,%r15),0(%r15) 956 stmg %r0,%r14,__PT_R0(%r15) 957 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART 958 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw 959 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack 960 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) 961 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu 962 lg %r2,__LC_RESTART_DATA 963 lg %r3,__LC_RESTART_SOURCE 964 ltgr %r3,%r3 # test source cpu address 965 jm 1f # negative -> skip source stop 9660: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu 967 brc 10,0b # wait for status stored 9681: basr %r14,%r1 # call function 969 stap __SF_EMPTY(%r15) # store cpu address 970 llgh %r3,__SF_EMPTY(%r15) 9712: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu 972 brc 2,2b 9733: j 3b 974 975 .section .kprobes.text, "ax" 976 977#ifdef CONFIG_CHECK_STACK 978/* 979 * The synchronous or the asynchronous stack overflowed. We are dead. 980 * No need to properly save the registers, we are going to panic anyway. 981 * Setup a pt_regs so that show_trace can provide a good call trace. 982 */ 983stack_overflow: 984 lg %r15,__LC_PANIC_STACK # change to panic stack 985 la %r11,STACK_FRAME_OVERHEAD(%r15) 986 stmg %r0,%r7,__PT_R0(%r11) 987 stmg %r8,%r9,__PT_PSW(%r11) 988 mvc __PT_R8(64,%r11),0(%r14) 989 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 990 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 991 lgr %r2,%r11 # pass pointer to pt_regs 992 jg kernel_stack_overflow 993#endif 994 995cleanup_critical: 996#if IS_ENABLED(CONFIG_KVM) 997 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap 998 jl 0f 999 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done 1000 jl .Lcleanup_sie 1001#endif 1002 clg %r9,BASED(.Lcleanup_table) # system_call 1003 jl 0f 1004 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc 1005 jl .Lcleanup_system_call 1006 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif 1007 jl 0f 1008 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore 1009 jl .Lcleanup_sysc_tif 1010 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done 1011 jl .Lcleanup_sysc_restore 1012 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif 1013 jl 0f 1014 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore 1015 jl .Lcleanup_io_tif 1016 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done 1017 jl .Lcleanup_io_restore 1018 clg %r9,BASED(.Lcleanup_table+64) # psw_idle 1019 jl 0f 1020 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end 1021 jl .Lcleanup_idle 1022 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs 1023 jl 0f 1024 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end 1025 jl .Lcleanup_save_fpu_regs 1026 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs 1027 jl 0f 1028 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end 1029 jl .Lcleanup_load_fpu_regs 10300: br %r14 1031 1032 .align 8 1033.Lcleanup_table: 1034 .quad system_call 1035 .quad .Lsysc_do_svc 1036 .quad .Lsysc_tif 1037 .quad .Lsysc_restore 1038 .quad .Lsysc_done 1039 .quad .Lio_tif 1040 .quad .Lio_restore 1041 .quad .Lio_done 1042 .quad psw_idle 1043 .quad .Lpsw_idle_end 1044 .quad save_fpu_regs 1045 .quad .Lsave_fpu_regs_end 1046 .quad load_fpu_regs 1047 .quad .Lload_fpu_regs_end 1048 1049#if IS_ENABLED(CONFIG_KVM) 1050.Lcleanup_table_sie: 1051 .quad .Lsie_gmap 1052 .quad .Lsie_done 1053 1054.Lcleanup_sie: 1055 lg %r9,__SF_EMPTY(%r15) # get control block pointer 1056 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE 1057 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 1058 larl %r9,sie_exit # skip forward to sie_exit 1059 br %r14 1060#endif 1061 1062.Lcleanup_system_call: 1063 # check if stpt has been executed 1064 clg %r9,BASED(.Lcleanup_system_call_insn) 1065 jh 0f 1066 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 1067 cghi %r11,__LC_SAVE_AREA_ASYNC 1068 je 0f 1069 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER 10700: # check if stmg has been executed 1071 clg %r9,BASED(.Lcleanup_system_call_insn+8) 1072 jh 0f 1073 mvc __LC_SAVE_AREA_SYNC(64),0(%r11) 10740: # check if base register setup + TIF bit load has been done 1075 clg %r9,BASED(.Lcleanup_system_call_insn+16) 1076 jhe 0f 1077 # set up saved register r12 task struct pointer 1078 stg %r12,32(%r11) 1079 # set up saved register r13 __TASK_thread offset 1080 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const) 10810: # check if the user time update has been done 1082 clg %r9,BASED(.Lcleanup_system_call_insn+24) 1083 jh 0f 1084 lg %r15,__LC_EXIT_TIMER 1085 slg %r15,__LC_SYNC_ENTER_TIMER 1086 alg %r15,__LC_USER_TIMER 1087 stg %r15,__LC_USER_TIMER 10880: # check if the system time update has been done 1089 clg %r9,BASED(.Lcleanup_system_call_insn+32) 1090 jh 0f 1091 lg %r15,__LC_LAST_UPDATE_TIMER 1092 slg %r15,__LC_EXIT_TIMER 1093 alg %r15,__LC_SYSTEM_TIMER 1094 stg %r15,__LC_SYSTEM_TIMER 10950: # update accounting time stamp 1096 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 1097 # set up saved register r11 1098 lg %r15,__LC_KERNEL_STACK 1099 la %r9,STACK_FRAME_OVERHEAD(%r15) 1100 stg %r9,24(%r11) # r11 pt_regs pointer 1101 # fill pt_regs 1102 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC 1103 stmg %r0,%r7,__PT_R0(%r9) 1104 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW 1105 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC 1106 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) 1107 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL 1108 # setup saved register r15 1109 stg %r15,56(%r11) # r15 stack pointer 1110 # set new psw address and exit 1111 larl %r9,.Lsysc_do_svc 1112 br %r14 1113.Lcleanup_system_call_insn: 1114 .quad system_call 1115 .quad .Lsysc_stmg 1116 .quad .Lsysc_per 1117 .quad .Lsysc_vtime+36 1118 .quad .Lsysc_vtime+42 1119.Lcleanup_system_call_const: 1120 .quad __TASK_thread 1121 1122.Lcleanup_sysc_tif: 1123 larl %r9,.Lsysc_tif 1124 br %r14 1125 1126.Lcleanup_sysc_restore: 1127 clg %r9,BASED(.Lcleanup_sysc_restore_insn) 1128 je 0f 1129 lg %r9,24(%r11) # get saved pointer to pt_regs 1130 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1131 mvc 0(64,%r11),__PT_R8(%r9) 1132 lmg %r0,%r7,__PT_R0(%r9) 11330: lmg %r8,%r9,__LC_RETURN_PSW 1134 br %r14 1135.Lcleanup_sysc_restore_insn: 1136 .quad .Lsysc_done - 4 1137 1138.Lcleanup_io_tif: 1139 larl %r9,.Lio_tif 1140 br %r14 1141 1142.Lcleanup_io_restore: 1143 clg %r9,BASED(.Lcleanup_io_restore_insn) 1144 je 0f 1145 lg %r9,24(%r11) # get saved r11 pointer to pt_regs 1146 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1147 mvc 0(64,%r11),__PT_R8(%r9) 1148 lmg %r0,%r7,__PT_R0(%r9) 11490: lmg %r8,%r9,__LC_RETURN_PSW 1150 br %r14 1151.Lcleanup_io_restore_insn: 1152 .quad .Lio_done - 4 1153 1154.Lcleanup_idle: 1155 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT 1156 # copy interrupt clock & cpu timer 1157 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK 1158 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER 1159 cghi %r11,__LC_SAVE_AREA_ASYNC 1160 je 0f 1161 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK 1162 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER 11630: # check if stck & stpt have been executed 1164 clg %r9,BASED(.Lcleanup_idle_insn) 1165 jhe 1f 1166 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) 1167 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) 11681: # calculate idle cycles 1169#ifdef CONFIG_SMP 1170 clg %r9,BASED(.Lcleanup_idle_insn) 1171 jl 3f 1172 larl %r1,smp_cpu_mtid 1173 llgf %r1,0(%r1) 1174 ltgr %r1,%r1 1175 jz 3f 1176 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) 1177 larl %r3,mt_cycles 1178 ag %r3,__LC_PERCPU_OFFSET 1179 la %r4,__SF_EMPTY+16(%r15) 11802: lg %r0,0(%r3) 1181 slg %r0,0(%r4) 1182 alg %r0,64(%r4) 1183 stg %r0,0(%r3) 1184 la %r3,8(%r3) 1185 la %r4,8(%r4) 1186 brct %r1,2b 1187#endif 11883: # account system time going idle 1189 lg %r9,__LC_STEAL_TIMER 1190 alg %r9,__CLOCK_IDLE_ENTER(%r2) 1191 slg %r9,__LC_LAST_UPDATE_CLOCK 1192 stg %r9,__LC_STEAL_TIMER 1193 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) 1194 lg %r9,__LC_SYSTEM_TIMER 1195 alg %r9,__LC_LAST_UPDATE_TIMER 1196 slg %r9,__TIMER_IDLE_ENTER(%r2) 1197 stg %r9,__LC_SYSTEM_TIMER 1198 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) 1199 # prepare return psw 1200 nihh %r8,0xfcfd # clear irq & wait state bits 1201 lg %r9,48(%r11) # return from psw_idle 1202 br %r14 1203.Lcleanup_idle_insn: 1204 .quad .Lpsw_idle_lpsw 1205 1206.Lcleanup_save_fpu_regs: 1207 larl %r9,save_fpu_regs 1208 br %r14 1209 1210.Lcleanup_load_fpu_regs: 1211 larl %r9,load_fpu_regs 1212 br %r14 1213 1214/* 1215 * Integer constants 1216 */ 1217 .align 8 1218.Lcritical_start: 1219 .quad .L__critical_start 1220.Lcritical_length: 1221 .quad .L__critical_end - .L__critical_start 1222#if IS_ENABLED(CONFIG_KVM) 1223.Lsie_critical_start: 1224 .quad .Lsie_gmap 1225.Lsie_critical_length: 1226 .quad .Lsie_done - .Lsie_gmap 1227#endif 1228 1229 .section .rodata, "a" 1230#define SYSCALL(esame,emu) .long esame 1231 .globl sys_call_table 1232sys_call_table: 1233#include "syscalls.S" 1234#undef SYSCALL 1235 1236#ifdef CONFIG_COMPAT 1237 1238#define SYSCALL(esame,emu) .long emu 1239 .globl sys_call_table_emu 1240sys_call_table_emu: 1241#include "syscalls.S" 1242#undef SYSCALL 1243#endif 1244