1/* 2 * S390 low-level entry points. 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 6 * Hartmut Penner (hp@de.ibm.com), 7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 8 * Heiko Carstens <heiko.carstens@de.ibm.com> 9 */ 10 11#include <linux/init.h> 12#include <linux/linkage.h> 13#include <asm/processor.h> 14#include <asm/cache.h> 15#include <asm/errno.h> 16#include <asm/ptrace.h> 17#include <asm/thread_info.h> 18#include <asm/asm-offsets.h> 19#include <asm/unistd.h> 20#include <asm/page.h> 21#include <asm/sigp.h> 22#include <asm/irq.h> 23#include <asm/vx-insn.h> 24#include <asm/setup.h> 25#include <asm/nmi.h> 26#include <asm/export.h> 27 28__PT_R0 = __PT_GPRS 29__PT_R1 = __PT_GPRS + 8 30__PT_R2 = __PT_GPRS + 16 31__PT_R3 = __PT_GPRS + 24 32__PT_R4 = __PT_GPRS + 32 33__PT_R5 = __PT_GPRS + 40 34__PT_R6 = __PT_GPRS + 48 35__PT_R7 = __PT_GPRS + 56 36__PT_R8 = __PT_GPRS + 64 37__PT_R9 = __PT_GPRS + 72 38__PT_R10 = __PT_GPRS + 80 39__PT_R11 = __PT_GPRS + 88 40__PT_R12 = __PT_GPRS + 96 41__PT_R13 = __PT_GPRS + 104 42__PT_R14 = __PT_GPRS + 112 43__PT_R15 = __PT_GPRS + 120 44 45STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER 46STACK_SIZE = 1 << STACK_SHIFT 47STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE 48 49_TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 50 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING) 51_TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ 52 _TIF_SYSCALL_TRACEPOINT) 53_CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \ 54 _CIF_ASCE_SECONDARY | _CIF_FPU) 55_PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART) 56 57#define BASED(name) name-cleanup_critical(%r13) 58 59 .macro TRACE_IRQS_ON 60#ifdef CONFIG_TRACE_IRQFLAGS 61 basr %r2,%r0 62 brasl %r14,trace_hardirqs_on_caller 63#endif 64 .endm 65 66 .macro TRACE_IRQS_OFF 67#ifdef CONFIG_TRACE_IRQFLAGS 68 basr %r2,%r0 69 brasl %r14,trace_hardirqs_off_caller 70#endif 71 .endm 72 73 .macro LOCKDEP_SYS_EXIT 74#ifdef CONFIG_LOCKDEP 75 tm __PT_PSW+1(%r11),0x01 # returning to user ? 76 jz .+10 77 brasl %r14,lockdep_sys_exit 78#endif 79 .endm 80 81 .macro CHECK_STACK stacksize,savearea 82#ifdef CONFIG_CHECK_STACK 83 tml %r15,\stacksize - CONFIG_STACK_GUARD 84 lghi %r14,\savearea 85 jz stack_overflow 86#endif 87 .endm 88 89 .macro SWITCH_ASYNC savearea,timer 90 tmhh %r8,0x0001 # interrupting from user ? 91 jnz 1f 92 lgr %r14,%r9 93 slg %r14,BASED(.Lcritical_start) 94 clg %r14,BASED(.Lcritical_length) 95 jhe 0f 96 lghi %r11,\savearea # inside critical section, do cleanup 97 brasl %r14,cleanup_critical 98 tmhh %r8,0x0001 # retest problem state after cleanup 99 jnz 1f 1000: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? 101 slgr %r14,%r15 102 srag %r14,%r14,STACK_SHIFT 103 jnz 2f 104 CHECK_STACK 1<<STACK_SHIFT,\savearea 105 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 106 j 3f 1071: UPDATE_VTIME %r14,%r15,\timer 1082: lg %r15,__LC_ASYNC_STACK # load async stack 1093: la %r11,STACK_FRAME_OVERHEAD(%r15) 110 .endm 111 112 .macro UPDATE_VTIME w1,w2,enter_timer 113 lg \w1,__LC_EXIT_TIMER 114 lg \w2,__LC_LAST_UPDATE_TIMER 115 slg \w1,\enter_timer 116 slg \w2,__LC_EXIT_TIMER 117 alg \w1,__LC_USER_TIMER 118 alg \w2,__LC_SYSTEM_TIMER 119 stg \w1,__LC_USER_TIMER 120 stg \w2,__LC_SYSTEM_TIMER 121 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer 122 .endm 123 124 .macro REENABLE_IRQS 125 stg %r8,__LC_RETURN_PSW 126 ni __LC_RETURN_PSW,0xbf 127 ssm __LC_RETURN_PSW 128 .endm 129 130 .macro STCK savearea 131#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES 132 .insn s,0xb27c0000,\savearea # store clock fast 133#else 134 .insn s,0xb2050000,\savearea # store clock 135#endif 136 .endm 137 138 /* 139 * The TSTMSK macro generates a test-under-mask instruction by 140 * calculating the memory offset for the specified mask value. 141 * Mask value can be any constant. The macro shifts the mask 142 * value to calculate the memory offset for the test-under-mask 143 * instruction. 144 */ 145 .macro TSTMSK addr, mask, size=8, bytepos=0 146 .if (\bytepos < \size) && (\mask >> 8) 147 .if (\mask & 0xff) 148 .error "Mask exceeds byte boundary" 149 .endif 150 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" 151 .exitm 152 .endif 153 .ifeq \mask 154 .error "Mask must not be zero" 155 .endif 156 off = \size - \bytepos - 1 157 tm off+\addr, \mask 158 .endm 159 160 .section .kprobes.text, "ax" 161.Ldummy: 162 /* 163 * This nop exists only in order to avoid that __switch_to starts at 164 * the beginning of the kprobes text section. In that case we would 165 * have several symbols at the same address. E.g. objdump would take 166 * an arbitrary symbol name when disassembling this code. 167 * With the added nop in between the __switch_to symbol is unique 168 * again. 169 */ 170 nop 0 171 172/* 173 * Scheduler resume function, called by switch_to 174 * gpr2 = (task_struct *) prev 175 * gpr3 = (task_struct *) next 176 * Returns: 177 * gpr2 = prev 178 */ 179ENTRY(__switch_to) 180 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task 181 lgr %r1,%r2 182 aghi %r1,__TASK_thread # thread_struct of prev task 183 lg %r5,__TASK_stack(%r3) # start of kernel stack of next 184 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev 185 lgr %r1,%r3 186 aghi %r1,__TASK_thread # thread_struct of next task 187 lgr %r15,%r5 188 aghi %r15,STACK_INIT # end of kernel stack of next 189 stg %r3,__LC_CURRENT # store task struct of next 190 stg %r15,__LC_KERNEL_STACK # store end of kernel stack 191 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next 192 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next 193 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task 194 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 195 bzr %r14 196 .insn s,0xb2800000,__LC_LPP # set program parameter 197 br %r14 198 199.L__critical_start: 200 201#if IS_ENABLED(CONFIG_KVM) 202/* 203 * sie64a calling convention: 204 * %r2 pointer to sie control block 205 * %r3 guest register save area 206 */ 207ENTRY(sie64a) 208 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers 209 stg %r2,__SF_EMPTY(%r15) # save control block pointer 210 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area 211 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 212 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? 213 jno .Lsie_load_guest_gprs 214 brasl %r14,load_fpu_regs # load guest fp/vx regs 215.Lsie_load_guest_gprs: 216 lmg %r0,%r13,0(%r3) # load guest gprs 0-13 217 lg %r14,__LC_GMAP # get gmap pointer 218 ltgr %r14,%r14 219 jz .Lsie_gmap 220 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce 221.Lsie_gmap: 222 lg %r14,__SF_EMPTY(%r15) # get control block pointer 223 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now 224 tm __SIE_PROG20+3(%r14),3 # last exit... 225 jnz .Lsie_skip 226 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 227 jo .Lsie_skip # exit if fp/vx regs changed 228.Lsie_entry: 229 sie 0(%r14) 230.Lsie_skip: 231 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE 232 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 233.Lsie_done: 234# some program checks are suppressing. C code (e.g. do_protection_exception) 235# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There 236# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable. 237# Other instructions between sie64a and .Lsie_done should not cause program 238# interrupts. So lets use 3 nops as a landing pad for all possible rewinds. 239# See also .Lcleanup_sie 240.Lrewind_pad6: 241 nopr 7 242.Lrewind_pad4: 243 nopr 7 244.Lrewind_pad2: 245 nopr 7 246 .globl sie_exit 247sie_exit: 248 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area 249 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 250 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers 251 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code 252 br %r14 253.Lsie_fault: 254 lghi %r14,-EFAULT 255 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code 256 j sie_exit 257 258 EX_TABLE(.Lrewind_pad6,.Lsie_fault) 259 EX_TABLE(.Lrewind_pad4,.Lsie_fault) 260 EX_TABLE(.Lrewind_pad2,.Lsie_fault) 261 EX_TABLE(sie_exit,.Lsie_fault) 262EXPORT_SYMBOL(sie64a) 263EXPORT_SYMBOL(sie_exit) 264#endif 265 266/* 267 * SVC interrupt handler routine. System calls are synchronous events and 268 * are executed with interrupts enabled. 269 */ 270 271ENTRY(system_call) 272 stpt __LC_SYNC_ENTER_TIMER 273.Lsysc_stmg: 274 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 275 lg %r12,__LC_CURRENT 276 lghi %r13,__TASK_thread 277 lghi %r14,_PIF_SYSCALL 278.Lsysc_per: 279 lg %r15,__LC_KERNEL_STACK 280 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs 281.Lsysc_vtime: 282 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER 283 stmg %r0,%r7,__PT_R0(%r11) 284 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 285 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW 286 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC 287 stg %r14,__PT_FLAGS(%r11) 288.Lsysc_do_svc: 289 # load address of system call table 290 lg %r10,__THREAD_sysc_table(%r13,%r12) 291 llgh %r8,__PT_INT_CODE+2(%r11) 292 slag %r8,%r8,2 # shift and test for svc 0 293 jnz .Lsysc_nr_ok 294 # svc 0: system call number in %r1 295 llgfr %r1,%r1 # clear high word in r1 296 cghi %r1,NR_syscalls 297 jnl .Lsysc_nr_ok 298 sth %r1,__PT_INT_CODE+2(%r11) 299 slag %r8,%r1,2 300.Lsysc_nr_ok: 301 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 302 stg %r2,__PT_ORIG_GPR2(%r11) 303 stg %r7,STACK_FRAME_OVERHEAD(%r15) 304 lgf %r9,0(%r8,%r10) # get system call add. 305 TSTMSK __TI_flags(%r12),_TIF_TRACE 306 jnz .Lsysc_tracesys 307 basr %r14,%r9 # call sys_xxxx 308 stg %r2,__PT_R2(%r11) # store return value 309 310.Lsysc_return: 311 LOCKDEP_SYS_EXIT 312.Lsysc_tif: 313 TSTMSK __PT_FLAGS(%r11),_PIF_WORK 314 jnz .Lsysc_work 315 TSTMSK __TI_flags(%r12),_TIF_WORK 316 jnz .Lsysc_work # check for work 317 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 318 jnz .Lsysc_work 319.Lsysc_restore: 320 lg %r14,__LC_VDSO_PER_CPU 321 lmg %r0,%r10,__PT_R0(%r11) 322 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 323.Lsysc_exit_timer: 324 stpt __LC_EXIT_TIMER 325 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 326 lmg %r11,%r15,__PT_R11(%r11) 327 lpswe __LC_RETURN_PSW 328.Lsysc_done: 329 330# 331# One of the work bits is on. Find out which one. 332# 333.Lsysc_work: 334 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 335 jo .Lsysc_mcck_pending 336 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 337 jo .Lsysc_reschedule 338 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART 339 jo .Lsysc_syscall_restart 340#ifdef CONFIG_UPROBES 341 TSTMSK __TI_flags(%r12),_TIF_UPROBE 342 jo .Lsysc_uprobe_notify 343#endif 344 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE 345 jo .Lsysc_guarded_storage 346 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP 347 jo .Lsysc_singlestep 348#ifdef CONFIG_LIVEPATCH 349 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING 350 jo .Lsysc_patch_pending # handle live patching just before 351 # signals and possible syscall restart 352#endif 353 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART 354 jo .Lsysc_syscall_restart 355 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 356 jo .Lsysc_sigpending 357 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 358 jo .Lsysc_notify_resume 359 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 360 jo .Lsysc_vxrs 361 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 362 jnz .Lsysc_asce 363 j .Lsysc_return # beware of critical section cleanup 364 365# 366# _TIF_NEED_RESCHED is set, call schedule 367# 368.Lsysc_reschedule: 369 larl %r14,.Lsysc_return 370 jg schedule 371 372# 373# _CIF_MCCK_PENDING is set, call handler 374# 375.Lsysc_mcck_pending: 376 larl %r14,.Lsysc_return 377 jg s390_handle_mcck # TIF bit will be cleared by handler 378 379# 380# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 381# 382.Lsysc_asce: 383 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 384 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 385 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY 386 jz .Lsysc_return 387 larl %r14,.Lsysc_return 388 jg set_fs_fixup 389 390# 391# CIF_FPU is set, restore floating-point controls and floating-point registers. 392# 393.Lsysc_vxrs: 394 larl %r14,.Lsysc_return 395 jg load_fpu_regs 396 397# 398# _TIF_SIGPENDING is set, call do_signal 399# 400.Lsysc_sigpending: 401 lgr %r2,%r11 # pass pointer to pt_regs 402 brasl %r14,do_signal 403 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 404 jno .Lsysc_return 405.Lsysc_do_syscall: 406 lghi %r13,__TASK_thread 407 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments 408 lghi %r1,0 # svc 0 returns -ENOSYS 409 j .Lsysc_do_svc 410 411# 412# _TIF_NOTIFY_RESUME is set, call do_notify_resume 413# 414.Lsysc_notify_resume: 415 lgr %r2,%r11 # pass pointer to pt_regs 416 larl %r14,.Lsysc_return 417 jg do_notify_resume 418 419# 420# _TIF_UPROBE is set, call uprobe_notify_resume 421# 422#ifdef CONFIG_UPROBES 423.Lsysc_uprobe_notify: 424 lgr %r2,%r11 # pass pointer to pt_regs 425 larl %r14,.Lsysc_return 426 jg uprobe_notify_resume 427#endif 428 429# 430# _TIF_GUARDED_STORAGE is set, call guarded_storage_load 431# 432.Lsysc_guarded_storage: 433 lgr %r2,%r11 # pass pointer to pt_regs 434 larl %r14,.Lsysc_return 435 jg gs_load_bc_cb 436# 437# _TIF_PATCH_PENDING is set, call klp_update_patch_state 438# 439#ifdef CONFIG_LIVEPATCH 440.Lsysc_patch_pending: 441 lg %r2,__LC_CURRENT # pass pointer to task struct 442 larl %r14,.Lsysc_return 443 jg klp_update_patch_state 444#endif 445 446# 447# _PIF_PER_TRAP is set, call do_per_trap 448# 449.Lsysc_singlestep: 450 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP 451 lgr %r2,%r11 # pass pointer to pt_regs 452 larl %r14,.Lsysc_return 453 jg do_per_trap 454 455# 456# _PIF_SYSCALL_RESTART is set, repeat the current system call 457# 458.Lsysc_syscall_restart: 459 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART 460 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments 461 lg %r2,__PT_ORIG_GPR2(%r11) 462 j .Lsysc_do_svc 463 464# 465# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before 466# and after the system call 467# 468.Lsysc_tracesys: 469 lgr %r2,%r11 # pass pointer to pt_regs 470 la %r3,0 471 llgh %r0,__PT_INT_CODE+2(%r11) 472 stg %r0,__PT_R2(%r11) 473 brasl %r14,do_syscall_trace_enter 474 lghi %r0,NR_syscalls 475 clgr %r0,%r2 476 jnh .Lsysc_tracenogo 477 sllg %r8,%r2,2 478 lgf %r9,0(%r8,%r10) 479.Lsysc_tracego: 480 lmg %r3,%r7,__PT_R3(%r11) 481 stg %r7,STACK_FRAME_OVERHEAD(%r15) 482 lg %r2,__PT_ORIG_GPR2(%r11) 483 basr %r14,%r9 # call sys_xxx 484 stg %r2,__PT_R2(%r11) # store return value 485.Lsysc_tracenogo: 486 TSTMSK __TI_flags(%r12),_TIF_TRACE 487 jz .Lsysc_return 488 lgr %r2,%r11 # pass pointer to pt_regs 489 larl %r14,.Lsysc_return 490 jg do_syscall_trace_exit 491 492# 493# a new process exits the kernel with ret_from_fork 494# 495ENTRY(ret_from_fork) 496 la %r11,STACK_FRAME_OVERHEAD(%r15) 497 lg %r12,__LC_CURRENT 498 brasl %r14,schedule_tail 499 TRACE_IRQS_ON 500 ssm __LC_SVC_NEW_PSW # reenable interrupts 501 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? 502 jne .Lsysc_tracenogo 503 # it's a kernel thread 504 lmg %r9,%r10,__PT_R9(%r11) # load gprs 505ENTRY(kernel_thread_starter) 506 la %r2,0(%r10) 507 basr %r14,%r9 508 j .Lsysc_tracenogo 509 510/* 511 * Program check handler routine 512 */ 513 514ENTRY(pgm_check_handler) 515 stpt __LC_SYNC_ENTER_TIMER 516 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 517 lg %r10,__LC_LAST_BREAK 518 lg %r12,__LC_CURRENT 519 larl %r13,cleanup_critical 520 lmg %r8,%r9,__LC_PGM_OLD_PSW 521 tmhh %r8,0x0001 # test problem state bit 522 jnz 2f # -> fault in user space 523#if IS_ENABLED(CONFIG_KVM) 524 # cleanup critical section for sie64a 525 lgr %r14,%r9 526 slg %r14,BASED(.Lsie_critical_start) 527 clg %r14,BASED(.Lsie_critical_length) 528 jhe 0f 529 brasl %r14,.Lcleanup_sie 530#endif 5310: tmhh %r8,0x4000 # PER bit set in old PSW ? 532 jnz 1f # -> enabled, can't be a double fault 533 tm __LC_PGM_ILC+3,0x80 # check for per exception 534 jnz .Lpgm_svcper # -> single stepped svc 5351: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC 536 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 537 j 4f 5382: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER 539 lg %r15,__LC_KERNEL_STACK 540 lgr %r14,%r12 541 aghi %r14,__TASK_thread # pointer to thread_struct 542 lghi %r13,__LC_PGM_TDB 543 tm __LC_PGM_ILC+2,0x02 # check for transaction abort 544 jz 3f 545 mvc __THREAD_trap_tdb(256,%r14),0(%r13) 5463: stg %r10,__THREAD_last_break(%r14) 5474: la %r11,STACK_FRAME_OVERHEAD(%r15) 548 stmg %r0,%r7,__PT_R0(%r11) 549 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 550 stmg %r8,%r9,__PT_PSW(%r11) 551 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC 552 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE 553 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 554 stg %r10,__PT_ARGS(%r11) 555 tm __LC_PGM_ILC+3,0x80 # check for per exception 556 jz 5f 557 tmhh %r8,0x0001 # kernel per event ? 558 jz .Lpgm_kprobe 559 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP 560 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS 561 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE 562 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID 5635: REENABLE_IRQS 564 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 565 larl %r1,pgm_check_table 566 llgh %r10,__PT_INT_CODE+2(%r11) 567 nill %r10,0x007f 568 sll %r10,2 569 je .Lpgm_return 570 lgf %r1,0(%r10,%r1) # load address of handler routine 571 lgr %r2,%r11 # pass pointer to pt_regs 572 basr %r14,%r1 # branch to interrupt-handler 573.Lpgm_return: 574 LOCKDEP_SYS_EXIT 575 tm __PT_PSW+1(%r11),0x01 # returning to user ? 576 jno .Lsysc_restore 577 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 578 jo .Lsysc_do_syscall 579 j .Lsysc_tif 580 581# 582# PER event in supervisor state, must be kprobes 583# 584.Lpgm_kprobe: 585 REENABLE_IRQS 586 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 587 lgr %r2,%r11 # pass pointer to pt_regs 588 brasl %r14,do_per_trap 589 j .Lpgm_return 590 591# 592# single stepped system call 593# 594.Lpgm_svcper: 595 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW 596 lghi %r13,__TASK_thread 597 larl %r14,.Lsysc_per 598 stg %r14,__LC_RETURN_PSW+8 599 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP 600 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs 601 602/* 603 * IO interrupt handler routine 604 */ 605ENTRY(io_int_handler) 606 STCK __LC_INT_CLOCK 607 stpt __LC_ASYNC_ENTER_TIMER 608 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 609 lg %r12,__LC_CURRENT 610 larl %r13,cleanup_critical 611 lmg %r8,%r9,__LC_IO_OLD_PSW 612 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 613 stmg %r0,%r7,__PT_R0(%r11) 614 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 615 stmg %r8,%r9,__PT_PSW(%r11) 616 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 617 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 618 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 619 jo .Lio_restore 620 TRACE_IRQS_OFF 621 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 622.Lio_loop: 623 lgr %r2,%r11 # pass pointer to pt_regs 624 lghi %r3,IO_INTERRUPT 625 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? 626 jz .Lio_call 627 lghi %r3,THIN_INTERRUPT 628.Lio_call: 629 brasl %r14,do_IRQ 630 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR 631 jz .Lio_return 632 tpi 0 633 jz .Lio_return 634 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 635 j .Lio_loop 636.Lio_return: 637 LOCKDEP_SYS_EXIT 638 TRACE_IRQS_ON 639.Lio_tif: 640 TSTMSK __TI_flags(%r12),_TIF_WORK 641 jnz .Lio_work # there is work to do (signals etc.) 642 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 643 jnz .Lio_work 644.Lio_restore: 645 lg %r14,__LC_VDSO_PER_CPU 646 lmg %r0,%r10,__PT_R0(%r11) 647 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 648.Lio_exit_timer: 649 stpt __LC_EXIT_TIMER 650 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 651 lmg %r11,%r15,__PT_R11(%r11) 652 lpswe __LC_RETURN_PSW 653.Lio_done: 654 655# 656# There is work todo, find out in which context we have been interrupted: 657# 1) if we return to user space we can do all _TIF_WORK work 658# 2) if we return to kernel code and kvm is enabled check if we need to 659# modify the psw to leave SIE 660# 3) if we return to kernel code and preemptive scheduling is enabled check 661# the preemption counter and if it is zero call preempt_schedule_irq 662# Before any work can be done, a switch to the kernel stack is required. 663# 664.Lio_work: 665 tm __PT_PSW+1(%r11),0x01 # returning to user ? 666 jo .Lio_work_user # yes -> do resched & signal 667#ifdef CONFIG_PREEMPT 668 # check for preemptive scheduling 669 icm %r0,15,__LC_PREEMPT_COUNT 670 jnz .Lio_restore # preemption is disabled 671 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 672 jno .Lio_restore 673 # switch to kernel stack 674 lg %r1,__PT_R15(%r11) 675 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 676 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 677 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 678 la %r11,STACK_FRAME_OVERHEAD(%r1) 679 lgr %r15,%r1 680 # TRACE_IRQS_ON already done at .Lio_return, call 681 # TRACE_IRQS_OFF to keep things symmetrical 682 TRACE_IRQS_OFF 683 brasl %r14,preempt_schedule_irq 684 j .Lio_return 685#else 686 j .Lio_restore 687#endif 688 689# 690# Need to do work before returning to userspace, switch to kernel stack 691# 692.Lio_work_user: 693 lg %r1,__LC_KERNEL_STACK 694 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 695 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 696 la %r11,STACK_FRAME_OVERHEAD(%r1) 697 lgr %r15,%r1 698 699# 700# One of the work bits is on. Find out which one. 701# 702.Lio_work_tif: 703 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 704 jo .Lio_mcck_pending 705 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 706 jo .Lio_reschedule 707#ifdef CONFIG_LIVEPATCH 708 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING 709 jo .Lio_patch_pending 710#endif 711 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 712 jo .Lio_sigpending 713 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 714 jo .Lio_notify_resume 715 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE 716 jo .Lio_guarded_storage 717 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 718 jo .Lio_vxrs 719 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 720 jnz .Lio_asce 721 j .Lio_return # beware of critical section cleanup 722 723# 724# _CIF_MCCK_PENDING is set, call handler 725# 726.Lio_mcck_pending: 727 # TRACE_IRQS_ON already done at .Lio_return 728 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler 729 TRACE_IRQS_OFF 730 j .Lio_return 731 732# 733# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 734# 735.Lio_asce: 736 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 737 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 738 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY 739 jz .Lio_return 740 larl %r14,.Lio_return 741 jg set_fs_fixup 742 743# 744# CIF_FPU is set, restore floating-point controls and floating-point registers. 745# 746.Lio_vxrs: 747 larl %r14,.Lio_return 748 jg load_fpu_regs 749 750# 751# _TIF_GUARDED_STORAGE is set, call guarded_storage_load 752# 753.Lio_guarded_storage: 754 # TRACE_IRQS_ON already done at .Lio_return 755 ssm __LC_SVC_NEW_PSW # reenable interrupts 756 lgr %r2,%r11 # pass pointer to pt_regs 757 brasl %r14,gs_load_bc_cb 758 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 759 TRACE_IRQS_OFF 760 j .Lio_return 761 762# 763# _TIF_NEED_RESCHED is set, call schedule 764# 765.Lio_reschedule: 766 # TRACE_IRQS_ON already done at .Lio_return 767 ssm __LC_SVC_NEW_PSW # reenable interrupts 768 brasl %r14,schedule # call scheduler 769 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 770 TRACE_IRQS_OFF 771 j .Lio_return 772 773# 774# _TIF_PATCH_PENDING is set, call klp_update_patch_state 775# 776#ifdef CONFIG_LIVEPATCH 777.Lio_patch_pending: 778 lg %r2,__LC_CURRENT # pass pointer to task struct 779 larl %r14,.Lio_return 780 jg klp_update_patch_state 781#endif 782 783# 784# _TIF_SIGPENDING or is set, call do_signal 785# 786.Lio_sigpending: 787 # TRACE_IRQS_ON already done at .Lio_return 788 ssm __LC_SVC_NEW_PSW # reenable interrupts 789 lgr %r2,%r11 # pass pointer to pt_regs 790 brasl %r14,do_signal 791 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 792 TRACE_IRQS_OFF 793 j .Lio_return 794 795# 796# _TIF_NOTIFY_RESUME or is set, call do_notify_resume 797# 798.Lio_notify_resume: 799 # TRACE_IRQS_ON already done at .Lio_return 800 ssm __LC_SVC_NEW_PSW # reenable interrupts 801 lgr %r2,%r11 # pass pointer to pt_regs 802 brasl %r14,do_notify_resume 803 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 804 TRACE_IRQS_OFF 805 j .Lio_return 806 807/* 808 * External interrupt handler routine 809 */ 810ENTRY(ext_int_handler) 811 STCK __LC_INT_CLOCK 812 stpt __LC_ASYNC_ENTER_TIMER 813 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 814 lg %r12,__LC_CURRENT 815 larl %r13,cleanup_critical 816 lmg %r8,%r9,__LC_EXT_OLD_PSW 817 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 818 stmg %r0,%r7,__PT_R0(%r11) 819 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 820 stmg %r8,%r9,__PT_PSW(%r11) 821 lghi %r1,__LC_EXT_PARAMS2 822 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR 823 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS 824 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) 825 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 826 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 827 jo .Lio_restore 828 TRACE_IRQS_OFF 829 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 830 lgr %r2,%r11 # pass pointer to pt_regs 831 lghi %r3,EXT_INTERRUPT 832 brasl %r14,do_IRQ 833 j .Lio_return 834 835/* 836 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. 837 */ 838ENTRY(psw_idle) 839 stg %r3,__SF_EMPTY(%r15) 840 larl %r1,.Lpsw_idle_lpsw+4 841 stg %r1,__SF_EMPTY+8(%r15) 842#ifdef CONFIG_SMP 843 larl %r1,smp_cpu_mtid 844 llgf %r1,0(%r1) 845 ltgr %r1,%r1 846 jz .Lpsw_idle_stcctm 847 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) 848.Lpsw_idle_stcctm: 849#endif 850 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT 851 STCK __CLOCK_IDLE_ENTER(%r2) 852 stpt __TIMER_IDLE_ENTER(%r2) 853.Lpsw_idle_lpsw: 854 lpswe __SF_EMPTY(%r15) 855 br %r14 856.Lpsw_idle_end: 857 858/* 859 * Store floating-point controls and floating-point or vector register 860 * depending whether the vector facility is available. A critical section 861 * cleanup assures that the registers are stored even if interrupted for 862 * some other work. The CIF_FPU flag is set to trigger a lazy restore 863 * of the register contents at return from io or a system call. 864 */ 865ENTRY(save_fpu_regs) 866 lg %r2,__LC_CURRENT 867 aghi %r2,__TASK_thread 868 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 869 bor %r14 870 stfpc __THREAD_FPU_fpc(%r2) 871 lg %r3,__THREAD_FPU_regs(%r2) 872 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 873 jz .Lsave_fpu_regs_fp # no -> store FP regs 874 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) 875 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) 876 j .Lsave_fpu_regs_done # -> set CIF_FPU flag 877.Lsave_fpu_regs_fp: 878 std 0,0(%r3) 879 std 1,8(%r3) 880 std 2,16(%r3) 881 std 3,24(%r3) 882 std 4,32(%r3) 883 std 5,40(%r3) 884 std 6,48(%r3) 885 std 7,56(%r3) 886 std 8,64(%r3) 887 std 9,72(%r3) 888 std 10,80(%r3) 889 std 11,88(%r3) 890 std 12,96(%r3) 891 std 13,104(%r3) 892 std 14,112(%r3) 893 std 15,120(%r3) 894.Lsave_fpu_regs_done: 895 oi __LC_CPU_FLAGS+7,_CIF_FPU 896 br %r14 897.Lsave_fpu_regs_end: 898EXPORT_SYMBOL(save_fpu_regs) 899 900/* 901 * Load floating-point controls and floating-point or vector registers. 902 * A critical section cleanup assures that the register contents are 903 * loaded even if interrupted for some other work. 904 * 905 * There are special calling conventions to fit into sysc and io return work: 906 * %r15: <kernel stack> 907 * The function requires: 908 * %r4 909 */ 910load_fpu_regs: 911 lg %r4,__LC_CURRENT 912 aghi %r4,__TASK_thread 913 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 914 bnor %r14 915 lfpc __THREAD_FPU_fpc(%r4) 916 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 917 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area 918 jz .Lload_fpu_regs_fp # -> no VX, load FP regs 919 VLM %v0,%v15,0,%r4 920 VLM %v16,%v31,256,%r4 921 j .Lload_fpu_regs_done 922.Lload_fpu_regs_fp: 923 ld 0,0(%r4) 924 ld 1,8(%r4) 925 ld 2,16(%r4) 926 ld 3,24(%r4) 927 ld 4,32(%r4) 928 ld 5,40(%r4) 929 ld 6,48(%r4) 930 ld 7,56(%r4) 931 ld 8,64(%r4) 932 ld 9,72(%r4) 933 ld 10,80(%r4) 934 ld 11,88(%r4) 935 ld 12,96(%r4) 936 ld 13,104(%r4) 937 ld 14,112(%r4) 938 ld 15,120(%r4) 939.Lload_fpu_regs_done: 940 ni __LC_CPU_FLAGS+7,255-_CIF_FPU 941 br %r14 942.Lload_fpu_regs_end: 943 944.L__critical_end: 945 946/* 947 * Machine check handler routines 948 */ 949ENTRY(mcck_int_handler) 950 STCK __LC_MCCK_CLOCK 951 la %r1,4095 # revalidate r1 952 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 953 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 954 lg %r12,__LC_CURRENT 955 larl %r13,cleanup_critical 956 lmg %r8,%r9,__LC_MCK_OLD_PSW 957 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE 958 jo .Lmcck_panic # yes -> rest of mcck code invalid 959 lghi %r14,__LC_CPU_TIMER_SAVE_AREA 960 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 961 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID 962 jo 3f 963 la %r14,__LC_SYNC_ENTER_TIMER 964 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 965 jl 0f 966 la %r14,__LC_ASYNC_ENTER_TIMER 9670: clc 0(8,%r14),__LC_EXIT_TIMER 968 jl 1f 969 la %r14,__LC_EXIT_TIMER 9701: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 971 jl 2f 972 la %r14,__LC_LAST_UPDATE_TIMER 9732: spt 0(%r14) 974 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 9753: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) 976 jno .Lmcck_panic # no -> skip cleanup critical 977 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER 978.Lmcck_skip: 979 lghi %r14,__LC_GPREGS_SAVE_AREA+64 980 stmg %r0,%r7,__PT_R0(%r11) 981 mvc __PT_R8(64,%r11),0(%r14) 982 stmg %r8,%r9,__PT_PSW(%r11) 983 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 984 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 985 lgr %r2,%r11 # pass pointer to pt_regs 986 brasl %r14,s390_do_machine_check 987 tm __PT_PSW+1(%r11),0x01 # returning to user ? 988 jno .Lmcck_return 989 lg %r1,__LC_KERNEL_STACK # switch to kernel stack 990 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 991 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 992 la %r11,STACK_FRAME_OVERHEAD(%r1) 993 lgr %r15,%r1 994 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off 995 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 996 jno .Lmcck_return 997 TRACE_IRQS_OFF 998 brasl %r14,s390_handle_mcck 999 TRACE_IRQS_ON 1000.Lmcck_return: 1001 lg %r14,__LC_VDSO_PER_CPU 1002 lmg %r0,%r10,__PT_R0(%r11) 1003 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW 1004 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 1005 jno 0f 1006 stpt __LC_EXIT_TIMER 1007 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 10080: lmg %r11,%r15,__PT_R11(%r11) 1009 lpswe __LC_RETURN_MCCK_PSW 1010 1011.Lmcck_panic: 1012 lg %r15,__LC_PANIC_STACK 1013 la %r11,STACK_FRAME_OVERHEAD(%r15) 1014 j .Lmcck_skip 1015 1016# 1017# PSW restart interrupt handler 1018# 1019ENTRY(restart_int_handler) 1020 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 1021 jz 0f 1022 .insn s,0xb2800000,__LC_LPP 10230: stg %r15,__LC_SAVE_AREA_RESTART 1024 lg %r15,__LC_RESTART_STACK 1025 aghi %r15,-__PT_SIZE # create pt_regs on stack 1026 xc 0(__PT_SIZE,%r15),0(%r15) 1027 stmg %r0,%r14,__PT_R0(%r15) 1028 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART 1029 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw 1030 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack 1031 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) 1032 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu 1033 lg %r2,__LC_RESTART_DATA 1034 lg %r3,__LC_RESTART_SOURCE 1035 ltgr %r3,%r3 # test source cpu address 1036 jm 1f # negative -> skip source stop 10370: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu 1038 brc 10,0b # wait for status stored 10391: basr %r14,%r1 # call function 1040 stap __SF_EMPTY(%r15) # store cpu address 1041 llgh %r3,__SF_EMPTY(%r15) 10422: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu 1043 brc 2,2b 10443: j 3b 1045 1046 .section .kprobes.text, "ax" 1047 1048#ifdef CONFIG_CHECK_STACK 1049/* 1050 * The synchronous or the asynchronous stack overflowed. We are dead. 1051 * No need to properly save the registers, we are going to panic anyway. 1052 * Setup a pt_regs so that show_trace can provide a good call trace. 1053 */ 1054stack_overflow: 1055 lg %r15,__LC_PANIC_STACK # change to panic stack 1056 la %r11,STACK_FRAME_OVERHEAD(%r15) 1057 stmg %r0,%r7,__PT_R0(%r11) 1058 stmg %r8,%r9,__PT_PSW(%r11) 1059 mvc __PT_R8(64,%r11),0(%r14) 1060 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 1061 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 1062 lgr %r2,%r11 # pass pointer to pt_regs 1063 jg kernel_stack_overflow 1064#endif 1065 1066cleanup_critical: 1067#if IS_ENABLED(CONFIG_KVM) 1068 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap 1069 jl 0f 1070 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done 1071 jl .Lcleanup_sie 1072#endif 1073 clg %r9,BASED(.Lcleanup_table) # system_call 1074 jl 0f 1075 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc 1076 jl .Lcleanup_system_call 1077 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif 1078 jl 0f 1079 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore 1080 jl .Lcleanup_sysc_tif 1081 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done 1082 jl .Lcleanup_sysc_restore 1083 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif 1084 jl 0f 1085 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore 1086 jl .Lcleanup_io_tif 1087 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done 1088 jl .Lcleanup_io_restore 1089 clg %r9,BASED(.Lcleanup_table+64) # psw_idle 1090 jl 0f 1091 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end 1092 jl .Lcleanup_idle 1093 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs 1094 jl 0f 1095 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end 1096 jl .Lcleanup_save_fpu_regs 1097 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs 1098 jl 0f 1099 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end 1100 jl .Lcleanup_load_fpu_regs 11010: br %r14 1102 1103 .align 8 1104.Lcleanup_table: 1105 .quad system_call 1106 .quad .Lsysc_do_svc 1107 .quad .Lsysc_tif 1108 .quad .Lsysc_restore 1109 .quad .Lsysc_done 1110 .quad .Lio_tif 1111 .quad .Lio_restore 1112 .quad .Lio_done 1113 .quad psw_idle 1114 .quad .Lpsw_idle_end 1115 .quad save_fpu_regs 1116 .quad .Lsave_fpu_regs_end 1117 .quad load_fpu_regs 1118 .quad .Lload_fpu_regs_end 1119 1120#if IS_ENABLED(CONFIG_KVM) 1121.Lcleanup_table_sie: 1122 .quad .Lsie_gmap 1123 .quad .Lsie_done 1124 1125.Lcleanup_sie: 1126 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt? 1127 je 1f 1128 slg %r9,BASED(.Lsie_crit_mcck_start) 1129 clg %r9,BASED(.Lsie_crit_mcck_length) 1130 jh 1f 1131 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST 11321: lg %r9,__SF_EMPTY(%r15) # get control block pointer 1133 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE 1134 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 1135 larl %r9,sie_exit # skip forward to sie_exit 1136 br %r14 1137#endif 1138 1139.Lcleanup_system_call: 1140 # check if stpt has been executed 1141 clg %r9,BASED(.Lcleanup_system_call_insn) 1142 jh 0f 1143 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 1144 cghi %r11,__LC_SAVE_AREA_ASYNC 1145 je 0f 1146 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER 11470: # check if stmg has been executed 1148 clg %r9,BASED(.Lcleanup_system_call_insn+8) 1149 jh 0f 1150 mvc __LC_SAVE_AREA_SYNC(64),0(%r11) 11510: # check if base register setup + TIF bit load has been done 1152 clg %r9,BASED(.Lcleanup_system_call_insn+16) 1153 jhe 0f 1154 # set up saved register r12 task struct pointer 1155 stg %r12,32(%r11) 1156 # set up saved register r13 __TASK_thread offset 1157 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const) 11580: # check if the user time update has been done 1159 clg %r9,BASED(.Lcleanup_system_call_insn+24) 1160 jh 0f 1161 lg %r15,__LC_EXIT_TIMER 1162 slg %r15,__LC_SYNC_ENTER_TIMER 1163 alg %r15,__LC_USER_TIMER 1164 stg %r15,__LC_USER_TIMER 11650: # check if the system time update has been done 1166 clg %r9,BASED(.Lcleanup_system_call_insn+32) 1167 jh 0f 1168 lg %r15,__LC_LAST_UPDATE_TIMER 1169 slg %r15,__LC_EXIT_TIMER 1170 alg %r15,__LC_SYSTEM_TIMER 1171 stg %r15,__LC_SYSTEM_TIMER 11720: # update accounting time stamp 1173 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 1174 # set up saved register r11 1175 lg %r15,__LC_KERNEL_STACK 1176 la %r9,STACK_FRAME_OVERHEAD(%r15) 1177 stg %r9,24(%r11) # r11 pt_regs pointer 1178 # fill pt_regs 1179 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC 1180 stmg %r0,%r7,__PT_R0(%r9) 1181 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW 1182 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC 1183 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) 1184 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL 1185 # setup saved register r15 1186 stg %r15,56(%r11) # r15 stack pointer 1187 # set new psw address and exit 1188 larl %r9,.Lsysc_do_svc 1189 br %r14 1190.Lcleanup_system_call_insn: 1191 .quad system_call 1192 .quad .Lsysc_stmg 1193 .quad .Lsysc_per 1194 .quad .Lsysc_vtime+36 1195 .quad .Lsysc_vtime+42 1196.Lcleanup_system_call_const: 1197 .quad __TASK_thread 1198 1199.Lcleanup_sysc_tif: 1200 larl %r9,.Lsysc_tif 1201 br %r14 1202 1203.Lcleanup_sysc_restore: 1204 # check if stpt has been executed 1205 clg %r9,BASED(.Lcleanup_sysc_restore_insn) 1206 jh 0f 1207 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1208 cghi %r11,__LC_SAVE_AREA_ASYNC 1209 je 0f 1210 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 12110: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8) 1212 je 1f 1213 lg %r9,24(%r11) # get saved pointer to pt_regs 1214 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1215 mvc 0(64,%r11),__PT_R8(%r9) 1216 lmg %r0,%r7,__PT_R0(%r9) 12171: lmg %r8,%r9,__LC_RETURN_PSW 1218 br %r14 1219.Lcleanup_sysc_restore_insn: 1220 .quad .Lsysc_exit_timer 1221 .quad .Lsysc_done - 4 1222 1223.Lcleanup_io_tif: 1224 larl %r9,.Lio_tif 1225 br %r14 1226 1227.Lcleanup_io_restore: 1228 # check if stpt has been executed 1229 clg %r9,BASED(.Lcleanup_io_restore_insn) 1230 jh 0f 1231 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 12320: clg %r9,BASED(.Lcleanup_io_restore_insn+8) 1233 je 1f 1234 lg %r9,24(%r11) # get saved r11 pointer to pt_regs 1235 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1236 mvc 0(64,%r11),__PT_R8(%r9) 1237 lmg %r0,%r7,__PT_R0(%r9) 12381: lmg %r8,%r9,__LC_RETURN_PSW 1239 br %r14 1240.Lcleanup_io_restore_insn: 1241 .quad .Lio_exit_timer 1242 .quad .Lio_done - 4 1243 1244.Lcleanup_idle: 1245 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT 1246 # copy interrupt clock & cpu timer 1247 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK 1248 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER 1249 cghi %r11,__LC_SAVE_AREA_ASYNC 1250 je 0f 1251 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK 1252 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER 12530: # check if stck & stpt have been executed 1254 clg %r9,BASED(.Lcleanup_idle_insn) 1255 jhe 1f 1256 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) 1257 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) 12581: # calculate idle cycles 1259#ifdef CONFIG_SMP 1260 clg %r9,BASED(.Lcleanup_idle_insn) 1261 jl 3f 1262 larl %r1,smp_cpu_mtid 1263 llgf %r1,0(%r1) 1264 ltgr %r1,%r1 1265 jz 3f 1266 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) 1267 larl %r3,mt_cycles 1268 ag %r3,__LC_PERCPU_OFFSET 1269 la %r4,__SF_EMPTY+16(%r15) 12702: lg %r0,0(%r3) 1271 slg %r0,0(%r4) 1272 alg %r0,64(%r4) 1273 stg %r0,0(%r3) 1274 la %r3,8(%r3) 1275 la %r4,8(%r4) 1276 brct %r1,2b 1277#endif 12783: # account system time going idle 1279 lg %r9,__LC_STEAL_TIMER 1280 alg %r9,__CLOCK_IDLE_ENTER(%r2) 1281 slg %r9,__LC_LAST_UPDATE_CLOCK 1282 stg %r9,__LC_STEAL_TIMER 1283 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) 1284 lg %r9,__LC_SYSTEM_TIMER 1285 alg %r9,__LC_LAST_UPDATE_TIMER 1286 slg %r9,__TIMER_IDLE_ENTER(%r2) 1287 stg %r9,__LC_SYSTEM_TIMER 1288 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) 1289 # prepare return psw 1290 nihh %r8,0xfcfd # clear irq & wait state bits 1291 lg %r9,48(%r11) # return from psw_idle 1292 br %r14 1293.Lcleanup_idle_insn: 1294 .quad .Lpsw_idle_lpsw 1295 1296.Lcleanup_save_fpu_regs: 1297 larl %r9,save_fpu_regs 1298 br %r14 1299 1300.Lcleanup_load_fpu_regs: 1301 larl %r9,load_fpu_regs 1302 br %r14 1303 1304/* 1305 * Integer constants 1306 */ 1307 .align 8 1308.Lcritical_start: 1309 .quad .L__critical_start 1310.Lcritical_length: 1311 .quad .L__critical_end - .L__critical_start 1312#if IS_ENABLED(CONFIG_KVM) 1313.Lsie_critical_start: 1314 .quad .Lsie_gmap 1315.Lsie_critical_length: 1316 .quad .Lsie_done - .Lsie_gmap 1317.Lsie_crit_mcck_start: 1318 .quad .Lsie_entry 1319.Lsie_crit_mcck_length: 1320 .quad .Lsie_skip - .Lsie_entry 1321#endif 1322 1323 .section .rodata, "a" 1324#define SYSCALL(esame,emu) .long esame 1325 .globl sys_call_table 1326sys_call_table: 1327#include "syscalls.S" 1328#undef SYSCALL 1329 1330#ifdef CONFIG_COMPAT 1331 1332#define SYSCALL(esame,emu) .long emu 1333 .globl sys_call_table_emu 1334sys_call_table_emu: 1335#include "syscalls.S" 1336#undef SYSCALL 1337#endif 1338