1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * S390 low-level entry points. 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 7 * Hartmut Penner (hp@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 9 * Heiko Carstens <heiko.carstens@de.ibm.com> 10 */ 11 12#include <linux/init.h> 13#include <linux/linkage.h> 14#include <asm/processor.h> 15#include <asm/cache.h> 16#include <asm/ctl_reg.h> 17#include <asm/errno.h> 18#include <asm/ptrace.h> 19#include <asm/thread_info.h> 20#include <asm/asm-offsets.h> 21#include <asm/unistd.h> 22#include <asm/page.h> 23#include <asm/sigp.h> 24#include <asm/irq.h> 25#include <asm/vx-insn.h> 26#include <asm/setup.h> 27#include <asm/nmi.h> 28#include <asm/export.h> 29 30__PT_R0 = __PT_GPRS 31__PT_R1 = __PT_GPRS + 8 32__PT_R2 = __PT_GPRS + 16 33__PT_R3 = __PT_GPRS + 24 34__PT_R4 = __PT_GPRS + 32 35__PT_R5 = __PT_GPRS + 40 36__PT_R6 = __PT_GPRS + 48 37__PT_R7 = __PT_GPRS + 56 38__PT_R8 = __PT_GPRS + 64 39__PT_R9 = __PT_GPRS + 72 40__PT_R10 = __PT_GPRS + 80 41__PT_R11 = __PT_GPRS + 88 42__PT_R12 = __PT_GPRS + 96 43__PT_R13 = __PT_GPRS + 104 44__PT_R14 = __PT_GPRS + 112 45__PT_R15 = __PT_GPRS + 120 46 47STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER 48STACK_SIZE = 1 << STACK_SHIFT 49STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE 50 51_TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 52 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING) 53_TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ 54 _TIF_SYSCALL_TRACEPOINT) 55_CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \ 56 _CIF_ASCE_SECONDARY | _CIF_FPU) 57_PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART) 58 59#define BASED(name) name-cleanup_critical(%r13) 60 61 .macro TRACE_IRQS_ON 62#ifdef CONFIG_TRACE_IRQFLAGS 63 basr %r2,%r0 64 brasl %r14,trace_hardirqs_on_caller 65#endif 66 .endm 67 68 .macro TRACE_IRQS_OFF 69#ifdef CONFIG_TRACE_IRQFLAGS 70 basr %r2,%r0 71 brasl %r14,trace_hardirqs_off_caller 72#endif 73 .endm 74 75 .macro LOCKDEP_SYS_EXIT 76#ifdef CONFIG_LOCKDEP 77 tm __PT_PSW+1(%r11),0x01 # returning to user ? 78 jz .+10 79 brasl %r14,lockdep_sys_exit 80#endif 81 .endm 82 83 .macro CHECK_STACK stacksize,savearea 84#ifdef CONFIG_CHECK_STACK 85 tml %r15,\stacksize - CONFIG_STACK_GUARD 86 lghi %r14,\savearea 87 jz stack_overflow 88#endif 89 .endm 90 91 .macro SWITCH_ASYNC savearea,timer 92 tmhh %r8,0x0001 # interrupting from user ? 93 jnz 1f 94 lgr %r14,%r9 95 slg %r14,BASED(.Lcritical_start) 96 clg %r14,BASED(.Lcritical_length) 97 jhe 0f 98 lghi %r11,\savearea # inside critical section, do cleanup 99 brasl %r14,cleanup_critical 100 tmhh %r8,0x0001 # retest problem state after cleanup 101 jnz 1f 1020: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? 103 slgr %r14,%r15 104 srag %r14,%r14,STACK_SHIFT 105 jnz 2f 106 CHECK_STACK 1<<STACK_SHIFT,\savearea 107 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 108 j 3f 1091: UPDATE_VTIME %r14,%r15,\timer 1102: lg %r15,__LC_ASYNC_STACK # load async stack 1113: la %r11,STACK_FRAME_OVERHEAD(%r15) 112 .endm 113 114 .macro UPDATE_VTIME w1,w2,enter_timer 115 lg \w1,__LC_EXIT_TIMER 116 lg \w2,__LC_LAST_UPDATE_TIMER 117 slg \w1,\enter_timer 118 slg \w2,__LC_EXIT_TIMER 119 alg \w1,__LC_USER_TIMER 120 alg \w2,__LC_SYSTEM_TIMER 121 stg \w1,__LC_USER_TIMER 122 stg \w2,__LC_SYSTEM_TIMER 123 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer 124 .endm 125 126 .macro REENABLE_IRQS 127 stg %r8,__LC_RETURN_PSW 128 ni __LC_RETURN_PSW,0xbf 129 ssm __LC_RETURN_PSW 130 .endm 131 132 .macro STCK savearea 133#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES 134 .insn s,0xb27c0000,\savearea # store clock fast 135#else 136 .insn s,0xb2050000,\savearea # store clock 137#endif 138 .endm 139 140 /* 141 * The TSTMSK macro generates a test-under-mask instruction by 142 * calculating the memory offset for the specified mask value. 143 * Mask value can be any constant. The macro shifts the mask 144 * value to calculate the memory offset for the test-under-mask 145 * instruction. 146 */ 147 .macro TSTMSK addr, mask, size=8, bytepos=0 148 .if (\bytepos < \size) && (\mask >> 8) 149 .if (\mask & 0xff) 150 .error "Mask exceeds byte boundary" 151 .endif 152 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" 153 .exitm 154 .endif 155 .ifeq \mask 156 .error "Mask must not be zero" 157 .endif 158 off = \size - \bytepos - 1 159 tm off+\addr, \mask 160 .endm 161 162 .section .kprobes.text, "ax" 163.Ldummy: 164 /* 165 * This nop exists only in order to avoid that __switch_to starts at 166 * the beginning of the kprobes text section. In that case we would 167 * have several symbols at the same address. E.g. objdump would take 168 * an arbitrary symbol name when disassembling this code. 169 * With the added nop in between the __switch_to symbol is unique 170 * again. 171 */ 172 nop 0 173 174/* 175 * Scheduler resume function, called by switch_to 176 * gpr2 = (task_struct *) prev 177 * gpr3 = (task_struct *) next 178 * Returns: 179 * gpr2 = prev 180 */ 181ENTRY(__switch_to) 182 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task 183 lghi %r4,__TASK_stack 184 lghi %r1,__TASK_thread 185 lg %r5,0(%r4,%r3) # start of kernel stack of next 186 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev 187 lgr %r15,%r5 188 aghi %r15,STACK_INIT # end of kernel stack of next 189 stg %r3,__LC_CURRENT # store task struct of next 190 stg %r15,__LC_KERNEL_STACK # store end of kernel stack 191 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next 192 aghi %r3,__TASK_pid 193 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next 194 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task 195 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 196 bzr %r14 197 .insn s,0xb2800000,__LC_LPP # set program parameter 198 br %r14 199 200.L__critical_start: 201 202#if IS_ENABLED(CONFIG_KVM) 203/* 204 * sie64a calling convention: 205 * %r2 pointer to sie control block 206 * %r3 guest register save area 207 */ 208ENTRY(sie64a) 209 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers 210 stg %r2,__SF_EMPTY(%r15) # save control block pointer 211 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area 212 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 213 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? 214 jno .Lsie_load_guest_gprs 215 brasl %r14,load_fpu_regs # load guest fp/vx regs 216.Lsie_load_guest_gprs: 217 lmg %r0,%r13,0(%r3) # load guest gprs 0-13 218 lg %r14,__LC_GMAP # get gmap pointer 219 ltgr %r14,%r14 220 jz .Lsie_gmap 221 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce 222.Lsie_gmap: 223 lg %r14,__SF_EMPTY(%r15) # get control block pointer 224 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now 225 tm __SIE_PROG20+3(%r14),3 # last exit... 226 jnz .Lsie_skip 227 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 228 jo .Lsie_skip # exit if fp/vx regs changed 229.Lsie_entry: 230 sie 0(%r14) 231.Lsie_skip: 232 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE 233 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 234.Lsie_done: 235# some program checks are suppressing. C code (e.g. do_protection_exception) 236# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There 237# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable. 238# Other instructions between sie64a and .Lsie_done should not cause program 239# interrupts. So lets use 3 nops as a landing pad for all possible rewinds. 240# See also .Lcleanup_sie 241.Lrewind_pad6: 242 nopr 7 243.Lrewind_pad4: 244 nopr 7 245.Lrewind_pad2: 246 nopr 7 247 .globl sie_exit 248sie_exit: 249 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area 250 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 251 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers 252 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code 253 br %r14 254.Lsie_fault: 255 lghi %r14,-EFAULT 256 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code 257 j sie_exit 258 259 EX_TABLE(.Lrewind_pad6,.Lsie_fault) 260 EX_TABLE(.Lrewind_pad4,.Lsie_fault) 261 EX_TABLE(.Lrewind_pad2,.Lsie_fault) 262 EX_TABLE(sie_exit,.Lsie_fault) 263EXPORT_SYMBOL(sie64a) 264EXPORT_SYMBOL(sie_exit) 265#endif 266 267/* 268 * SVC interrupt handler routine. System calls are synchronous events and 269 * are executed with interrupts enabled. 270 */ 271 272ENTRY(system_call) 273 stpt __LC_SYNC_ENTER_TIMER 274.Lsysc_stmg: 275 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 276 lg %r12,__LC_CURRENT 277 lghi %r13,__TASK_thread 278 lghi %r14,_PIF_SYSCALL 279.Lsysc_per: 280 lg %r15,__LC_KERNEL_STACK 281 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs 282.Lsysc_vtime: 283 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER 284 stmg %r0,%r7,__PT_R0(%r11) 285 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 286 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW 287 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC 288 stg %r14,__PT_FLAGS(%r11) 289.Lsysc_do_svc: 290 # load address of system call table 291 lg %r10,__THREAD_sysc_table(%r13,%r12) 292 llgh %r8,__PT_INT_CODE+2(%r11) 293 slag %r8,%r8,2 # shift and test for svc 0 294 jnz .Lsysc_nr_ok 295 # svc 0: system call number in %r1 296 llgfr %r1,%r1 # clear high word in r1 297 cghi %r1,NR_syscalls 298 jnl .Lsysc_nr_ok 299 sth %r1,__PT_INT_CODE+2(%r11) 300 slag %r8,%r1,2 301.Lsysc_nr_ok: 302 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 303 stg %r2,__PT_ORIG_GPR2(%r11) 304 stg %r7,STACK_FRAME_OVERHEAD(%r15) 305 lgf %r9,0(%r8,%r10) # get system call add. 306 TSTMSK __TI_flags(%r12),_TIF_TRACE 307 jnz .Lsysc_tracesys 308 basr %r14,%r9 # call sys_xxxx 309 stg %r2,__PT_R2(%r11) # store return value 310 311.Lsysc_return: 312 LOCKDEP_SYS_EXIT 313.Lsysc_tif: 314 TSTMSK __PT_FLAGS(%r11),_PIF_WORK 315 jnz .Lsysc_work 316 TSTMSK __TI_flags(%r12),_TIF_WORK 317 jnz .Lsysc_work # check for work 318 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 319 jnz .Lsysc_work 320.Lsysc_restore: 321 lg %r14,__LC_VDSO_PER_CPU 322 lmg %r0,%r10,__PT_R0(%r11) 323 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 324.Lsysc_exit_timer: 325 stpt __LC_EXIT_TIMER 326 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 327 lmg %r11,%r15,__PT_R11(%r11) 328 lpswe __LC_RETURN_PSW 329.Lsysc_done: 330 331# 332# One of the work bits is on. Find out which one. 333# 334.Lsysc_work: 335 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 336 jo .Lsysc_mcck_pending 337 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 338 jo .Lsysc_reschedule 339 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART 340 jo .Lsysc_syscall_restart 341#ifdef CONFIG_UPROBES 342 TSTMSK __TI_flags(%r12),_TIF_UPROBE 343 jo .Lsysc_uprobe_notify 344#endif 345 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE 346 jo .Lsysc_guarded_storage 347 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP 348 jo .Lsysc_singlestep 349#ifdef CONFIG_LIVEPATCH 350 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING 351 jo .Lsysc_patch_pending # handle live patching just before 352 # signals and possible syscall restart 353#endif 354 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART 355 jo .Lsysc_syscall_restart 356 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 357 jo .Lsysc_sigpending 358 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 359 jo .Lsysc_notify_resume 360 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 361 jo .Lsysc_vxrs 362 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 363 jnz .Lsysc_asce 364 j .Lsysc_return # beware of critical section cleanup 365 366# 367# _TIF_NEED_RESCHED is set, call schedule 368# 369.Lsysc_reschedule: 370 larl %r14,.Lsysc_return 371 jg schedule 372 373# 374# _CIF_MCCK_PENDING is set, call handler 375# 376.Lsysc_mcck_pending: 377 larl %r14,.Lsysc_return 378 jg s390_handle_mcck # TIF bit will be cleared by handler 379 380# 381# _CIF_ASCE_PRIMARY and/or _CIF_ASCE_SECONDARY set, load user space asce 382# 383.Lsysc_asce: 384 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY 385 lctlg %c7,%c7,__LC_VDSO_ASCE # load secondary asce 386 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_PRIMARY 387 jz .Lsysc_return 388#ifndef CONFIG_HAVE_MARCH_Z10_FEATURES 389 tm __LC_STFLE_FAC_LIST+3,0x10 # has MVCOS ? 390 jnz .Lsysc_set_fs_fixup 391 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 392 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 393 j .Lsysc_return 394.Lsysc_set_fs_fixup: 395#endif 396 larl %r14,.Lsysc_return 397 jg set_fs_fixup 398 399# 400# CIF_FPU is set, restore floating-point controls and floating-point registers. 401# 402.Lsysc_vxrs: 403 larl %r14,.Lsysc_return 404 jg load_fpu_regs 405 406# 407# _TIF_SIGPENDING is set, call do_signal 408# 409.Lsysc_sigpending: 410 lgr %r2,%r11 # pass pointer to pt_regs 411 brasl %r14,do_signal 412 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 413 jno .Lsysc_return 414.Lsysc_do_syscall: 415 lghi %r13,__TASK_thread 416 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments 417 lghi %r1,0 # svc 0 returns -ENOSYS 418 j .Lsysc_do_svc 419 420# 421# _TIF_NOTIFY_RESUME is set, call do_notify_resume 422# 423.Lsysc_notify_resume: 424 lgr %r2,%r11 # pass pointer to pt_regs 425 larl %r14,.Lsysc_return 426 jg do_notify_resume 427 428# 429# _TIF_UPROBE is set, call uprobe_notify_resume 430# 431#ifdef CONFIG_UPROBES 432.Lsysc_uprobe_notify: 433 lgr %r2,%r11 # pass pointer to pt_regs 434 larl %r14,.Lsysc_return 435 jg uprobe_notify_resume 436#endif 437 438# 439# _TIF_GUARDED_STORAGE is set, call guarded_storage_load 440# 441.Lsysc_guarded_storage: 442 lgr %r2,%r11 # pass pointer to pt_regs 443 larl %r14,.Lsysc_return 444 jg gs_load_bc_cb 445# 446# _TIF_PATCH_PENDING is set, call klp_update_patch_state 447# 448#ifdef CONFIG_LIVEPATCH 449.Lsysc_patch_pending: 450 lg %r2,__LC_CURRENT # pass pointer to task struct 451 larl %r14,.Lsysc_return 452 jg klp_update_patch_state 453#endif 454 455# 456# _PIF_PER_TRAP is set, call do_per_trap 457# 458.Lsysc_singlestep: 459 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP 460 lgr %r2,%r11 # pass pointer to pt_regs 461 larl %r14,.Lsysc_return 462 jg do_per_trap 463 464# 465# _PIF_SYSCALL_RESTART is set, repeat the current system call 466# 467.Lsysc_syscall_restart: 468 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART 469 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments 470 lg %r2,__PT_ORIG_GPR2(%r11) 471 j .Lsysc_do_svc 472 473# 474# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before 475# and after the system call 476# 477.Lsysc_tracesys: 478 lgr %r2,%r11 # pass pointer to pt_regs 479 la %r3,0 480 llgh %r0,__PT_INT_CODE+2(%r11) 481 stg %r0,__PT_R2(%r11) 482 brasl %r14,do_syscall_trace_enter 483 lghi %r0,NR_syscalls 484 clgr %r0,%r2 485 jnh .Lsysc_tracenogo 486 sllg %r8,%r2,2 487 lgf %r9,0(%r8,%r10) 488.Lsysc_tracego: 489 lmg %r3,%r7,__PT_R3(%r11) 490 stg %r7,STACK_FRAME_OVERHEAD(%r15) 491 lg %r2,__PT_ORIG_GPR2(%r11) 492 basr %r14,%r9 # call sys_xxx 493 stg %r2,__PT_R2(%r11) # store return value 494.Lsysc_tracenogo: 495 TSTMSK __TI_flags(%r12),_TIF_TRACE 496 jz .Lsysc_return 497 lgr %r2,%r11 # pass pointer to pt_regs 498 larl %r14,.Lsysc_return 499 jg do_syscall_trace_exit 500 501# 502# a new process exits the kernel with ret_from_fork 503# 504ENTRY(ret_from_fork) 505 la %r11,STACK_FRAME_OVERHEAD(%r15) 506 lg %r12,__LC_CURRENT 507 brasl %r14,schedule_tail 508 TRACE_IRQS_ON 509 ssm __LC_SVC_NEW_PSW # reenable interrupts 510 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? 511 jne .Lsysc_tracenogo 512 # it's a kernel thread 513 lmg %r9,%r10,__PT_R9(%r11) # load gprs 514ENTRY(kernel_thread_starter) 515 la %r2,0(%r10) 516 basr %r14,%r9 517 j .Lsysc_tracenogo 518 519/* 520 * Program check handler routine 521 */ 522 523ENTRY(pgm_check_handler) 524 stpt __LC_SYNC_ENTER_TIMER 525 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 526 lg %r10,__LC_LAST_BREAK 527 lg %r12,__LC_CURRENT 528 lghi %r11,0 529 larl %r13,cleanup_critical 530 lmg %r8,%r9,__LC_PGM_OLD_PSW 531 tmhh %r8,0x0001 # test problem state bit 532 jnz 2f # -> fault in user space 533#if IS_ENABLED(CONFIG_KVM) 534 # cleanup critical section for program checks in sie64a 535 lgr %r14,%r9 536 slg %r14,BASED(.Lsie_critical_start) 537 clg %r14,BASED(.Lsie_critical_length) 538 jhe 0f 539 lg %r14,__SF_EMPTY(%r15) # get control block pointer 540 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE 541 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 542 larl %r9,sie_exit # skip forward to sie_exit 543 lghi %r11,_PIF_GUEST_FAULT 544#endif 5450: tmhh %r8,0x4000 # PER bit set in old PSW ? 546 jnz 1f # -> enabled, can't be a double fault 547 tm __LC_PGM_ILC+3,0x80 # check for per exception 548 jnz .Lpgm_svcper # -> single stepped svc 5491: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC 550 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 551 j 4f 5522: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER 553 lg %r15,__LC_KERNEL_STACK 554 lgr %r14,%r12 555 aghi %r14,__TASK_thread # pointer to thread_struct 556 lghi %r13,__LC_PGM_TDB 557 tm __LC_PGM_ILC+2,0x02 # check for transaction abort 558 jz 3f 559 mvc __THREAD_trap_tdb(256,%r14),0(%r13) 5603: stg %r10,__THREAD_last_break(%r14) 5614: lgr %r13,%r11 562 la %r11,STACK_FRAME_OVERHEAD(%r15) 563 stmg %r0,%r7,__PT_R0(%r11) 564 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 565 stmg %r8,%r9,__PT_PSW(%r11) 566 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC 567 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE 568 stg %r13,__PT_FLAGS(%r11) 569 stg %r10,__PT_ARGS(%r11) 570 tm __LC_PGM_ILC+3,0x80 # check for per exception 571 jz 5f 572 tmhh %r8,0x0001 # kernel per event ? 573 jz .Lpgm_kprobe 574 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP 575 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS 576 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE 577 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID 5785: REENABLE_IRQS 579 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 580 larl %r1,pgm_check_table 581 llgh %r10,__PT_INT_CODE+2(%r11) 582 nill %r10,0x007f 583 sll %r10,2 584 je .Lpgm_return 585 lgf %r1,0(%r10,%r1) # load address of handler routine 586 lgr %r2,%r11 # pass pointer to pt_regs 587 basr %r14,%r1 # branch to interrupt-handler 588.Lpgm_return: 589 LOCKDEP_SYS_EXIT 590 tm __PT_PSW+1(%r11),0x01 # returning to user ? 591 jno .Lsysc_restore 592 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 593 jo .Lsysc_do_syscall 594 j .Lsysc_tif 595 596# 597# PER event in supervisor state, must be kprobes 598# 599.Lpgm_kprobe: 600 REENABLE_IRQS 601 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 602 lgr %r2,%r11 # pass pointer to pt_regs 603 brasl %r14,do_per_trap 604 j .Lpgm_return 605 606# 607# single stepped system call 608# 609.Lpgm_svcper: 610 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW 611 lghi %r13,__TASK_thread 612 larl %r14,.Lsysc_per 613 stg %r14,__LC_RETURN_PSW+8 614 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP 615 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs 616 617/* 618 * IO interrupt handler routine 619 */ 620ENTRY(io_int_handler) 621 STCK __LC_INT_CLOCK 622 stpt __LC_ASYNC_ENTER_TIMER 623 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 624 lg %r12,__LC_CURRENT 625 larl %r13,cleanup_critical 626 lmg %r8,%r9,__LC_IO_OLD_PSW 627 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 628 stmg %r0,%r7,__PT_R0(%r11) 629 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 630 stmg %r8,%r9,__PT_PSW(%r11) 631 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 632 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 633 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 634 jo .Lio_restore 635 TRACE_IRQS_OFF 636 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 637.Lio_loop: 638 lgr %r2,%r11 # pass pointer to pt_regs 639 lghi %r3,IO_INTERRUPT 640 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? 641 jz .Lio_call 642 lghi %r3,THIN_INTERRUPT 643.Lio_call: 644 brasl %r14,do_IRQ 645 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR 646 jz .Lio_return 647 tpi 0 648 jz .Lio_return 649 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 650 j .Lio_loop 651.Lio_return: 652 LOCKDEP_SYS_EXIT 653 TRACE_IRQS_ON 654.Lio_tif: 655 TSTMSK __TI_flags(%r12),_TIF_WORK 656 jnz .Lio_work # there is work to do (signals etc.) 657 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 658 jnz .Lio_work 659.Lio_restore: 660 lg %r14,__LC_VDSO_PER_CPU 661 lmg %r0,%r10,__PT_R0(%r11) 662 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 663.Lio_exit_timer: 664 stpt __LC_EXIT_TIMER 665 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 666 lmg %r11,%r15,__PT_R11(%r11) 667 lpswe __LC_RETURN_PSW 668.Lio_done: 669 670# 671# There is work todo, find out in which context we have been interrupted: 672# 1) if we return to user space we can do all _TIF_WORK work 673# 2) if we return to kernel code and kvm is enabled check if we need to 674# modify the psw to leave SIE 675# 3) if we return to kernel code and preemptive scheduling is enabled check 676# the preemption counter and if it is zero call preempt_schedule_irq 677# Before any work can be done, a switch to the kernel stack is required. 678# 679.Lio_work: 680 tm __PT_PSW+1(%r11),0x01 # returning to user ? 681 jo .Lio_work_user # yes -> do resched & signal 682#ifdef CONFIG_PREEMPT 683 # check for preemptive scheduling 684 icm %r0,15,__LC_PREEMPT_COUNT 685 jnz .Lio_restore # preemption is disabled 686 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 687 jno .Lio_restore 688 # switch to kernel stack 689 lg %r1,__PT_R15(%r11) 690 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 691 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 692 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 693 la %r11,STACK_FRAME_OVERHEAD(%r1) 694 lgr %r15,%r1 695 # TRACE_IRQS_ON already done at .Lio_return, call 696 # TRACE_IRQS_OFF to keep things symmetrical 697 TRACE_IRQS_OFF 698 brasl %r14,preempt_schedule_irq 699 j .Lio_return 700#else 701 j .Lio_restore 702#endif 703 704# 705# Need to do work before returning to userspace, switch to kernel stack 706# 707.Lio_work_user: 708 lg %r1,__LC_KERNEL_STACK 709 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 710 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 711 la %r11,STACK_FRAME_OVERHEAD(%r1) 712 lgr %r15,%r1 713 714# 715# One of the work bits is on. Find out which one. 716# 717.Lio_work_tif: 718 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 719 jo .Lio_mcck_pending 720 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 721 jo .Lio_reschedule 722#ifdef CONFIG_LIVEPATCH 723 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING 724 jo .Lio_patch_pending 725#endif 726 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 727 jo .Lio_sigpending 728 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 729 jo .Lio_notify_resume 730 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE 731 jo .Lio_guarded_storage 732 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 733 jo .Lio_vxrs 734 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 735 jnz .Lio_asce 736 j .Lio_return # beware of critical section cleanup 737 738# 739# _CIF_MCCK_PENDING is set, call handler 740# 741.Lio_mcck_pending: 742 # TRACE_IRQS_ON already done at .Lio_return 743 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler 744 TRACE_IRQS_OFF 745 j .Lio_return 746 747# 748# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 749# 750.Lio_asce: 751 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY 752 lctlg %c7,%c7,__LC_VDSO_ASCE # load secondary asce 753 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_PRIMARY 754 jz .Lio_return 755#ifndef CONFIG_HAVE_MARCH_Z10_FEATURES 756 tm __LC_STFLE_FAC_LIST+3,0x10 # has MVCOS ? 757 jnz .Lio_set_fs_fixup 758 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 759 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 760 j .Lio_return 761.Lio_set_fs_fixup: 762#endif 763 larl %r14,.Lio_return 764 jg set_fs_fixup 765 766# 767# CIF_FPU is set, restore floating-point controls and floating-point registers. 768# 769.Lio_vxrs: 770 larl %r14,.Lio_return 771 jg load_fpu_regs 772 773# 774# _TIF_GUARDED_STORAGE is set, call guarded_storage_load 775# 776.Lio_guarded_storage: 777 # TRACE_IRQS_ON already done at .Lio_return 778 ssm __LC_SVC_NEW_PSW # reenable interrupts 779 lgr %r2,%r11 # pass pointer to pt_regs 780 brasl %r14,gs_load_bc_cb 781 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 782 TRACE_IRQS_OFF 783 j .Lio_return 784 785# 786# _TIF_NEED_RESCHED is set, call schedule 787# 788.Lio_reschedule: 789 # TRACE_IRQS_ON already done at .Lio_return 790 ssm __LC_SVC_NEW_PSW # reenable interrupts 791 brasl %r14,schedule # call scheduler 792 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 793 TRACE_IRQS_OFF 794 j .Lio_return 795 796# 797# _TIF_PATCH_PENDING is set, call klp_update_patch_state 798# 799#ifdef CONFIG_LIVEPATCH 800.Lio_patch_pending: 801 lg %r2,__LC_CURRENT # pass pointer to task struct 802 larl %r14,.Lio_return 803 jg klp_update_patch_state 804#endif 805 806# 807# _TIF_SIGPENDING or is set, call do_signal 808# 809.Lio_sigpending: 810 # TRACE_IRQS_ON already done at .Lio_return 811 ssm __LC_SVC_NEW_PSW # reenable interrupts 812 lgr %r2,%r11 # pass pointer to pt_regs 813 brasl %r14,do_signal 814 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 815 TRACE_IRQS_OFF 816 j .Lio_return 817 818# 819# _TIF_NOTIFY_RESUME or is set, call do_notify_resume 820# 821.Lio_notify_resume: 822 # TRACE_IRQS_ON already done at .Lio_return 823 ssm __LC_SVC_NEW_PSW # reenable interrupts 824 lgr %r2,%r11 # pass pointer to pt_regs 825 brasl %r14,do_notify_resume 826 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 827 TRACE_IRQS_OFF 828 j .Lio_return 829 830/* 831 * External interrupt handler routine 832 */ 833ENTRY(ext_int_handler) 834 STCK __LC_INT_CLOCK 835 stpt __LC_ASYNC_ENTER_TIMER 836 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 837 lg %r12,__LC_CURRENT 838 larl %r13,cleanup_critical 839 lmg %r8,%r9,__LC_EXT_OLD_PSW 840 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 841 stmg %r0,%r7,__PT_R0(%r11) 842 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 843 stmg %r8,%r9,__PT_PSW(%r11) 844 lghi %r1,__LC_EXT_PARAMS2 845 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR 846 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS 847 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) 848 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 849 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 850 jo .Lio_restore 851 TRACE_IRQS_OFF 852 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 853 lgr %r2,%r11 # pass pointer to pt_regs 854 lghi %r3,EXT_INTERRUPT 855 brasl %r14,do_IRQ 856 j .Lio_return 857 858/* 859 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. 860 */ 861ENTRY(psw_idle) 862 stg %r3,__SF_EMPTY(%r15) 863 larl %r1,.Lpsw_idle_lpsw+4 864 stg %r1,__SF_EMPTY+8(%r15) 865#ifdef CONFIG_SMP 866 larl %r1,smp_cpu_mtid 867 llgf %r1,0(%r1) 868 ltgr %r1,%r1 869 jz .Lpsw_idle_stcctm 870 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) 871.Lpsw_idle_stcctm: 872#endif 873 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT 874 STCK __CLOCK_IDLE_ENTER(%r2) 875 stpt __TIMER_IDLE_ENTER(%r2) 876.Lpsw_idle_lpsw: 877 lpswe __SF_EMPTY(%r15) 878 br %r14 879.Lpsw_idle_end: 880 881/* 882 * Store floating-point controls and floating-point or vector register 883 * depending whether the vector facility is available. A critical section 884 * cleanup assures that the registers are stored even if interrupted for 885 * some other work. The CIF_FPU flag is set to trigger a lazy restore 886 * of the register contents at return from io or a system call. 887 */ 888ENTRY(save_fpu_regs) 889 lg %r2,__LC_CURRENT 890 aghi %r2,__TASK_thread 891 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 892 bor %r14 893 stfpc __THREAD_FPU_fpc(%r2) 894 lg %r3,__THREAD_FPU_regs(%r2) 895 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 896 jz .Lsave_fpu_regs_fp # no -> store FP regs 897 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) 898 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) 899 j .Lsave_fpu_regs_done # -> set CIF_FPU flag 900.Lsave_fpu_regs_fp: 901 std 0,0(%r3) 902 std 1,8(%r3) 903 std 2,16(%r3) 904 std 3,24(%r3) 905 std 4,32(%r3) 906 std 5,40(%r3) 907 std 6,48(%r3) 908 std 7,56(%r3) 909 std 8,64(%r3) 910 std 9,72(%r3) 911 std 10,80(%r3) 912 std 11,88(%r3) 913 std 12,96(%r3) 914 std 13,104(%r3) 915 std 14,112(%r3) 916 std 15,120(%r3) 917.Lsave_fpu_regs_done: 918 oi __LC_CPU_FLAGS+7,_CIF_FPU 919 br %r14 920.Lsave_fpu_regs_end: 921EXPORT_SYMBOL(save_fpu_regs) 922 923/* 924 * Load floating-point controls and floating-point or vector registers. 925 * A critical section cleanup assures that the register contents are 926 * loaded even if interrupted for some other work. 927 * 928 * There are special calling conventions to fit into sysc and io return work: 929 * %r15: <kernel stack> 930 * The function requires: 931 * %r4 932 */ 933load_fpu_regs: 934 lg %r4,__LC_CURRENT 935 aghi %r4,__TASK_thread 936 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 937 bnor %r14 938 lfpc __THREAD_FPU_fpc(%r4) 939 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 940 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area 941 jz .Lload_fpu_regs_fp # -> no VX, load FP regs 942 VLM %v0,%v15,0,%r4 943 VLM %v16,%v31,256,%r4 944 j .Lload_fpu_regs_done 945.Lload_fpu_regs_fp: 946 ld 0,0(%r4) 947 ld 1,8(%r4) 948 ld 2,16(%r4) 949 ld 3,24(%r4) 950 ld 4,32(%r4) 951 ld 5,40(%r4) 952 ld 6,48(%r4) 953 ld 7,56(%r4) 954 ld 8,64(%r4) 955 ld 9,72(%r4) 956 ld 10,80(%r4) 957 ld 11,88(%r4) 958 ld 12,96(%r4) 959 ld 13,104(%r4) 960 ld 14,112(%r4) 961 ld 15,120(%r4) 962.Lload_fpu_regs_done: 963 ni __LC_CPU_FLAGS+7,255-_CIF_FPU 964 br %r14 965.Lload_fpu_regs_end: 966 967.L__critical_end: 968 969/* 970 * Machine check handler routines 971 */ 972ENTRY(mcck_int_handler) 973 STCK __LC_MCCK_CLOCK 974 la %r1,4095 # validate r1 975 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer 976 sckc __LC_CLOCK_COMPARATOR # validate comparator 977 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs 978 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs 979 lg %r12,__LC_CURRENT 980 larl %r13,cleanup_critical 981 lmg %r8,%r9,__LC_MCK_OLD_PSW 982 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE 983 jo .Lmcck_panic # yes -> rest of mcck code invalid 984 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID 985 jno .Lmcck_panic # control registers invalid -> panic 986 la %r14,4095 987 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs 988 ptlb 989 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area 990 nill %r11,0xfc00 # MCESA_ORIGIN_MASK 991 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE 992 jno 0f 993 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID 994 jno 0f 995 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC 9960: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14) 997 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID 998 jo 0f 999 sr %r14,%r14 10000: sfpc %r14 1001 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 1002 jo 0f 1003 lghi %r14,__LC_FPREGS_SAVE_AREA 1004 ld %f0,0(%r14) 1005 ld %f1,8(%r14) 1006 ld %f2,16(%r14) 1007 ld %f3,24(%r14) 1008 ld %f4,32(%r14) 1009 ld %f5,40(%r14) 1010 ld %f6,48(%r14) 1011 ld %f7,56(%r14) 1012 ld %f8,64(%r14) 1013 ld %f9,72(%r14) 1014 ld %f10,80(%r14) 1015 ld %f11,88(%r14) 1016 ld %f12,96(%r14) 1017 ld %f13,104(%r14) 1018 ld %f14,112(%r14) 1019 ld %f15,120(%r14) 1020 j 1f 10210: VLM %v0,%v15,0,%r11 1022 VLM %v16,%v31,256,%r11 10231: lghi %r14,__LC_CPU_TIMER_SAVE_AREA 1024 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 1025 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID 1026 jo 3f 1027 la %r14,__LC_SYNC_ENTER_TIMER 1028 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 1029 jl 0f 1030 la %r14,__LC_ASYNC_ENTER_TIMER 10310: clc 0(8,%r14),__LC_EXIT_TIMER 1032 jl 1f 1033 la %r14,__LC_EXIT_TIMER 10341: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 1035 jl 2f 1036 la %r14,__LC_LAST_UPDATE_TIMER 10372: spt 0(%r14) 1038 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 10393: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID 1040 jno .Lmcck_panic 1041 tmhh %r8,0x0001 # interrupting from user ? 1042 jnz 4f 1043 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID 1044 jno .Lmcck_panic 10454: SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER 1046.Lmcck_skip: 1047 lghi %r14,__LC_GPREGS_SAVE_AREA+64 1048 stmg %r0,%r7,__PT_R0(%r11) 1049 mvc __PT_R8(64,%r11),0(%r14) 1050 stmg %r8,%r9,__PT_PSW(%r11) 1051 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 1052 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 1053 lgr %r2,%r11 # pass pointer to pt_regs 1054 brasl %r14,s390_do_machine_check 1055 tm __PT_PSW+1(%r11),0x01 # returning to user ? 1056 jno .Lmcck_return 1057 lg %r1,__LC_KERNEL_STACK # switch to kernel stack 1058 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 1059 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 1060 la %r11,STACK_FRAME_OVERHEAD(%r1) 1061 lgr %r15,%r1 1062 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off 1063 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 1064 jno .Lmcck_return 1065 TRACE_IRQS_OFF 1066 brasl %r14,s390_handle_mcck 1067 TRACE_IRQS_ON 1068.Lmcck_return: 1069 lg %r14,__LC_VDSO_PER_CPU 1070 lmg %r0,%r10,__PT_R0(%r11) 1071 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW 1072 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 1073 jno 0f 1074 stpt __LC_EXIT_TIMER 1075 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 10760: lmg %r11,%r15,__PT_R11(%r11) 1077 lpswe __LC_RETURN_MCCK_PSW 1078 1079.Lmcck_panic: 1080 lg %r15,__LC_PANIC_STACK 1081 la %r11,STACK_FRAME_OVERHEAD(%r15) 1082 j .Lmcck_skip 1083 1084# 1085# PSW restart interrupt handler 1086# 1087ENTRY(restart_int_handler) 1088 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 1089 jz 0f 1090 .insn s,0xb2800000,__LC_LPP 10910: stg %r15,__LC_SAVE_AREA_RESTART 1092 lg %r15,__LC_RESTART_STACK 1093 aghi %r15,-__PT_SIZE # create pt_regs on stack 1094 xc 0(__PT_SIZE,%r15),0(%r15) 1095 stmg %r0,%r14,__PT_R0(%r15) 1096 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART 1097 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw 1098 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack 1099 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) 1100 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu 1101 lg %r2,__LC_RESTART_DATA 1102 lg %r3,__LC_RESTART_SOURCE 1103 ltgr %r3,%r3 # test source cpu address 1104 jm 1f # negative -> skip source stop 11050: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu 1106 brc 10,0b # wait for status stored 11071: basr %r14,%r1 # call function 1108 stap __SF_EMPTY(%r15) # store cpu address 1109 llgh %r3,__SF_EMPTY(%r15) 11102: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu 1111 brc 2,2b 11123: j 3b 1113 1114 .section .kprobes.text, "ax" 1115 1116#ifdef CONFIG_CHECK_STACK 1117/* 1118 * The synchronous or the asynchronous stack overflowed. We are dead. 1119 * No need to properly save the registers, we are going to panic anyway. 1120 * Setup a pt_regs so that show_trace can provide a good call trace. 1121 */ 1122stack_overflow: 1123 lg %r15,__LC_PANIC_STACK # change to panic stack 1124 la %r11,STACK_FRAME_OVERHEAD(%r15) 1125 stmg %r0,%r7,__PT_R0(%r11) 1126 stmg %r8,%r9,__PT_PSW(%r11) 1127 mvc __PT_R8(64,%r11),0(%r14) 1128 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 1129 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 1130 lgr %r2,%r11 # pass pointer to pt_regs 1131 jg kernel_stack_overflow 1132#endif 1133 1134cleanup_critical: 1135#if IS_ENABLED(CONFIG_KVM) 1136 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap 1137 jl 0f 1138 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done 1139 jl .Lcleanup_sie 1140#endif 1141 clg %r9,BASED(.Lcleanup_table) # system_call 1142 jl 0f 1143 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc 1144 jl .Lcleanup_system_call 1145 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif 1146 jl 0f 1147 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore 1148 jl .Lcleanup_sysc_tif 1149 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done 1150 jl .Lcleanup_sysc_restore 1151 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif 1152 jl 0f 1153 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore 1154 jl .Lcleanup_io_tif 1155 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done 1156 jl .Lcleanup_io_restore 1157 clg %r9,BASED(.Lcleanup_table+64) # psw_idle 1158 jl 0f 1159 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end 1160 jl .Lcleanup_idle 1161 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs 1162 jl 0f 1163 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end 1164 jl .Lcleanup_save_fpu_regs 1165 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs 1166 jl 0f 1167 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end 1168 jl .Lcleanup_load_fpu_regs 11690: br %r14 1170 1171 .align 8 1172.Lcleanup_table: 1173 .quad system_call 1174 .quad .Lsysc_do_svc 1175 .quad .Lsysc_tif 1176 .quad .Lsysc_restore 1177 .quad .Lsysc_done 1178 .quad .Lio_tif 1179 .quad .Lio_restore 1180 .quad .Lio_done 1181 .quad psw_idle 1182 .quad .Lpsw_idle_end 1183 .quad save_fpu_regs 1184 .quad .Lsave_fpu_regs_end 1185 .quad load_fpu_regs 1186 .quad .Lload_fpu_regs_end 1187 1188#if IS_ENABLED(CONFIG_KVM) 1189.Lcleanup_table_sie: 1190 .quad .Lsie_gmap 1191 .quad .Lsie_done 1192 1193.Lcleanup_sie: 1194 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt? 1195 je 1f 1196 slg %r9,BASED(.Lsie_crit_mcck_start) 1197 clg %r9,BASED(.Lsie_crit_mcck_length) 1198 jh 1f 1199 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST 12001: lg %r9,__SF_EMPTY(%r15) # get control block pointer 1201 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE 1202 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 1203 larl %r9,sie_exit # skip forward to sie_exit 1204 br %r14 1205#endif 1206 1207.Lcleanup_system_call: 1208 # check if stpt has been executed 1209 clg %r9,BASED(.Lcleanup_system_call_insn) 1210 jh 0f 1211 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 1212 cghi %r11,__LC_SAVE_AREA_ASYNC 1213 je 0f 1214 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER 12150: # check if stmg has been executed 1216 clg %r9,BASED(.Lcleanup_system_call_insn+8) 1217 jh 0f 1218 mvc __LC_SAVE_AREA_SYNC(64),0(%r11) 12190: # check if base register setup + TIF bit load has been done 1220 clg %r9,BASED(.Lcleanup_system_call_insn+16) 1221 jhe 0f 1222 # set up saved register r12 task struct pointer 1223 stg %r12,32(%r11) 1224 # set up saved register r13 __TASK_thread offset 1225 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const) 12260: # check if the user time update has been done 1227 clg %r9,BASED(.Lcleanup_system_call_insn+24) 1228 jh 0f 1229 lg %r15,__LC_EXIT_TIMER 1230 slg %r15,__LC_SYNC_ENTER_TIMER 1231 alg %r15,__LC_USER_TIMER 1232 stg %r15,__LC_USER_TIMER 12330: # check if the system time update has been done 1234 clg %r9,BASED(.Lcleanup_system_call_insn+32) 1235 jh 0f 1236 lg %r15,__LC_LAST_UPDATE_TIMER 1237 slg %r15,__LC_EXIT_TIMER 1238 alg %r15,__LC_SYSTEM_TIMER 1239 stg %r15,__LC_SYSTEM_TIMER 12400: # update accounting time stamp 1241 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 1242 # set up saved register r11 1243 lg %r15,__LC_KERNEL_STACK 1244 la %r9,STACK_FRAME_OVERHEAD(%r15) 1245 stg %r9,24(%r11) # r11 pt_regs pointer 1246 # fill pt_regs 1247 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC 1248 stmg %r0,%r7,__PT_R0(%r9) 1249 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW 1250 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC 1251 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) 1252 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL 1253 # setup saved register r15 1254 stg %r15,56(%r11) # r15 stack pointer 1255 # set new psw address and exit 1256 larl %r9,.Lsysc_do_svc 1257 br %r14 1258.Lcleanup_system_call_insn: 1259 .quad system_call 1260 .quad .Lsysc_stmg 1261 .quad .Lsysc_per 1262 .quad .Lsysc_vtime+36 1263 .quad .Lsysc_vtime+42 1264.Lcleanup_system_call_const: 1265 .quad __TASK_thread 1266 1267.Lcleanup_sysc_tif: 1268 larl %r9,.Lsysc_tif 1269 br %r14 1270 1271.Lcleanup_sysc_restore: 1272 # check if stpt has been executed 1273 clg %r9,BASED(.Lcleanup_sysc_restore_insn) 1274 jh 0f 1275 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1276 cghi %r11,__LC_SAVE_AREA_ASYNC 1277 je 0f 1278 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 12790: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8) 1280 je 1f 1281 lg %r9,24(%r11) # get saved pointer to pt_regs 1282 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1283 mvc 0(64,%r11),__PT_R8(%r9) 1284 lmg %r0,%r7,__PT_R0(%r9) 12851: lmg %r8,%r9,__LC_RETURN_PSW 1286 br %r14 1287.Lcleanup_sysc_restore_insn: 1288 .quad .Lsysc_exit_timer 1289 .quad .Lsysc_done - 4 1290 1291.Lcleanup_io_tif: 1292 larl %r9,.Lio_tif 1293 br %r14 1294 1295.Lcleanup_io_restore: 1296 # check if stpt has been executed 1297 clg %r9,BASED(.Lcleanup_io_restore_insn) 1298 jh 0f 1299 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 13000: clg %r9,BASED(.Lcleanup_io_restore_insn+8) 1301 je 1f 1302 lg %r9,24(%r11) # get saved r11 pointer to pt_regs 1303 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1304 mvc 0(64,%r11),__PT_R8(%r9) 1305 lmg %r0,%r7,__PT_R0(%r9) 13061: lmg %r8,%r9,__LC_RETURN_PSW 1307 br %r14 1308.Lcleanup_io_restore_insn: 1309 .quad .Lio_exit_timer 1310 .quad .Lio_done - 4 1311 1312.Lcleanup_idle: 1313 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT 1314 # copy interrupt clock & cpu timer 1315 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK 1316 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER 1317 cghi %r11,__LC_SAVE_AREA_ASYNC 1318 je 0f 1319 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK 1320 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER 13210: # check if stck & stpt have been executed 1322 clg %r9,BASED(.Lcleanup_idle_insn) 1323 jhe 1f 1324 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) 1325 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) 13261: # calculate idle cycles 1327#ifdef CONFIG_SMP 1328 clg %r9,BASED(.Lcleanup_idle_insn) 1329 jl 3f 1330 larl %r1,smp_cpu_mtid 1331 llgf %r1,0(%r1) 1332 ltgr %r1,%r1 1333 jz 3f 1334 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) 1335 larl %r3,mt_cycles 1336 ag %r3,__LC_PERCPU_OFFSET 1337 la %r4,__SF_EMPTY+16(%r15) 13382: lg %r0,0(%r3) 1339 slg %r0,0(%r4) 1340 alg %r0,64(%r4) 1341 stg %r0,0(%r3) 1342 la %r3,8(%r3) 1343 la %r4,8(%r4) 1344 brct %r1,2b 1345#endif 13463: # account system time going idle 1347 lg %r9,__LC_STEAL_TIMER 1348 alg %r9,__CLOCK_IDLE_ENTER(%r2) 1349 slg %r9,__LC_LAST_UPDATE_CLOCK 1350 stg %r9,__LC_STEAL_TIMER 1351 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) 1352 lg %r9,__LC_SYSTEM_TIMER 1353 alg %r9,__LC_LAST_UPDATE_TIMER 1354 slg %r9,__TIMER_IDLE_ENTER(%r2) 1355 stg %r9,__LC_SYSTEM_TIMER 1356 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) 1357 # prepare return psw 1358 nihh %r8,0xfcfd # clear irq & wait state bits 1359 lg %r9,48(%r11) # return from psw_idle 1360 br %r14 1361.Lcleanup_idle_insn: 1362 .quad .Lpsw_idle_lpsw 1363 1364.Lcleanup_save_fpu_regs: 1365 larl %r9,save_fpu_regs 1366 br %r14 1367 1368.Lcleanup_load_fpu_regs: 1369 larl %r9,load_fpu_regs 1370 br %r14 1371 1372/* 1373 * Integer constants 1374 */ 1375 .align 8 1376.Lcritical_start: 1377 .quad .L__critical_start 1378.Lcritical_length: 1379 .quad .L__critical_end - .L__critical_start 1380#if IS_ENABLED(CONFIG_KVM) 1381.Lsie_critical_start: 1382 .quad .Lsie_gmap 1383.Lsie_critical_length: 1384 .quad .Lsie_done - .Lsie_gmap 1385.Lsie_crit_mcck_start: 1386 .quad .Lsie_entry 1387.Lsie_crit_mcck_length: 1388 .quad .Lsie_skip - .Lsie_entry 1389#endif 1390 1391 .section .rodata, "a" 1392#define SYSCALL(esame,emu) .long esame 1393 .globl sys_call_table 1394sys_call_table: 1395#include "syscalls.S" 1396#undef SYSCALL 1397 1398#ifdef CONFIG_COMPAT 1399 1400#define SYSCALL(esame,emu) .long emu 1401 .globl sys_call_table_emu 1402sys_call_table_emu: 1403#include "syscalls.S" 1404#undef SYSCALL 1405#endif 1406