xref: /openbmc/linux/arch/s390/kernel/entry.S (revision 4e1a33b1)
1/*
2 *    S390 low-level entry points.
3 *
4 *    Copyright IBM Corp. 1999, 2012
5 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 *		 Hartmut Penner (hp@de.ibm.com),
7 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
9 */
10
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/processor.h>
14#include <asm/cache.h>
15#include <asm/errno.h>
16#include <asm/ptrace.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/unistd.h>
20#include <asm/page.h>
21#include <asm/sigp.h>
22#include <asm/irq.h>
23#include <asm/vx-insn.h>
24#include <asm/setup.h>
25#include <asm/nmi.h>
26#include <asm/export.h>
27
28__PT_R0      =	__PT_GPRS
29__PT_R1      =	__PT_GPRS + 8
30__PT_R2      =	__PT_GPRS + 16
31__PT_R3      =	__PT_GPRS + 24
32__PT_R4      =	__PT_GPRS + 32
33__PT_R5      =	__PT_GPRS + 40
34__PT_R6      =	__PT_GPRS + 48
35__PT_R7      =	__PT_GPRS + 56
36__PT_R8      =	__PT_GPRS + 64
37__PT_R9      =	__PT_GPRS + 72
38__PT_R10     =	__PT_GPRS + 80
39__PT_R11     =	__PT_GPRS + 88
40__PT_R12     =	__PT_GPRS + 96
41__PT_R13     =	__PT_GPRS + 104
42__PT_R14     =	__PT_GPRS + 112
43__PT_R15     =	__PT_GPRS + 120
44
45STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
46STACK_SIZE  = 1 << STACK_SHIFT
47STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
48
49_TIF_WORK	= (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
50		   _TIF_UPROBE)
51_TIF_TRACE	= (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
52		   _TIF_SYSCALL_TRACEPOINT)
53_CIF_WORK	= (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU)
54_PIF_WORK	= (_PIF_PER_TRAP)
55
56#define BASED(name) name-cleanup_critical(%r13)
57
58	.macro	TRACE_IRQS_ON
59#ifdef CONFIG_TRACE_IRQFLAGS
60	basr	%r2,%r0
61	brasl	%r14,trace_hardirqs_on_caller
62#endif
63	.endm
64
65	.macro	TRACE_IRQS_OFF
66#ifdef CONFIG_TRACE_IRQFLAGS
67	basr	%r2,%r0
68	brasl	%r14,trace_hardirqs_off_caller
69#endif
70	.endm
71
72	.macro	LOCKDEP_SYS_EXIT
73#ifdef CONFIG_LOCKDEP
74	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
75	jz	.+10
76	brasl	%r14,lockdep_sys_exit
77#endif
78	.endm
79
80	.macro	CHECK_STACK stacksize,savearea
81#ifdef CONFIG_CHECK_STACK
82	tml	%r15,\stacksize - CONFIG_STACK_GUARD
83	lghi	%r14,\savearea
84	jz	stack_overflow
85#endif
86	.endm
87
88	.macro	SWITCH_ASYNC savearea,timer
89	tmhh	%r8,0x0001		# interrupting from user ?
90	jnz	1f
91	lgr	%r14,%r9
92	slg	%r14,BASED(.Lcritical_start)
93	clg	%r14,BASED(.Lcritical_length)
94	jhe	0f
95	lghi	%r11,\savearea		# inside critical section, do cleanup
96	brasl	%r14,cleanup_critical
97	tmhh	%r8,0x0001		# retest problem state after cleanup
98	jnz	1f
990:	lg	%r14,__LC_ASYNC_STACK	# are we already on the async stack?
100	slgr	%r14,%r15
101	srag	%r14,%r14,STACK_SHIFT
102	jnz	2f
103	CHECK_STACK 1<<STACK_SHIFT,\savearea
104	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
105	j	3f
1061:	UPDATE_VTIME %r14,%r15,\timer
1072:	lg	%r15,__LC_ASYNC_STACK	# load async stack
1083:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
109	.endm
110
111	.macro UPDATE_VTIME w1,w2,enter_timer
112	lg	\w1,__LC_EXIT_TIMER
113	lg	\w2,__LC_LAST_UPDATE_TIMER
114	slg	\w1,\enter_timer
115	slg	\w2,__LC_EXIT_TIMER
116	alg	\w1,__LC_USER_TIMER
117	alg	\w2,__LC_SYSTEM_TIMER
118	stg	\w1,__LC_USER_TIMER
119	stg	\w2,__LC_SYSTEM_TIMER
120	mvc	__LC_LAST_UPDATE_TIMER(8),\enter_timer
121	.endm
122
123	.macro REENABLE_IRQS
124	stg	%r8,__LC_RETURN_PSW
125	ni	__LC_RETURN_PSW,0xbf
126	ssm	__LC_RETURN_PSW
127	.endm
128
129	.macro STCK savearea
130#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
131	.insn	s,0xb27c0000,\savearea		# store clock fast
132#else
133	.insn	s,0xb2050000,\savearea		# store clock
134#endif
135	.endm
136
137	/*
138	 * The TSTMSK macro generates a test-under-mask instruction by
139	 * calculating the memory offset for the specified mask value.
140	 * Mask value can be any constant.  The macro shifts the mask
141	 * value to calculate the memory offset for the test-under-mask
142	 * instruction.
143	 */
144	.macro TSTMSK addr, mask, size=8, bytepos=0
145		.if (\bytepos < \size) && (\mask >> 8)
146			.if (\mask & 0xff)
147				.error "Mask exceeds byte boundary"
148			.endif
149			TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
150			.exitm
151		.endif
152		.ifeq \mask
153			.error "Mask must not be zero"
154		.endif
155		off = \size - \bytepos - 1
156		tm	off+\addr, \mask
157	.endm
158
159	.section .kprobes.text, "ax"
160.Ldummy:
161	/*
162	 * This nop exists only in order to avoid that __switch_to starts at
163	 * the beginning of the kprobes text section. In that case we would
164	 * have several symbols at the same address. E.g. objdump would take
165	 * an arbitrary symbol name when disassembling this code.
166	 * With the added nop in between the __switch_to symbol is unique
167	 * again.
168	 */
169	nop	0
170
171/*
172 * Scheduler resume function, called by switch_to
173 *  gpr2 = (task_struct *) prev
174 *  gpr3 = (task_struct *) next
175 * Returns:
176 *  gpr2 = prev
177 */
178ENTRY(__switch_to)
179	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task
180	lgr	%r1,%r2
181	aghi	%r1,__TASK_thread		# thread_struct of prev task
182	lg	%r5,__TASK_stack(%r3)		# start of kernel stack of next
183	stg	%r15,__THREAD_ksp(%r1)		# store kernel stack of prev
184	lgr	%r1,%r3
185	aghi	%r1,__TASK_thread		# thread_struct of next task
186	lgr	%r15,%r5
187	aghi	%r15,STACK_INIT			# end of kernel stack of next
188	stg	%r3,__LC_CURRENT		# store task struct of next
189	stg	%r15,__LC_KERNEL_STACK		# store end of kernel stack
190	lg	%r15,__THREAD_ksp(%r1)		# load kernel stack of next
191	/* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */
192	lctl	%c4,%c4,__TASK_pid(%r3)		# load pid to control reg. 4
193	mvc	__LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
194	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task
195	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
196	bzr	%r14
197	.insn	s,0xb2800000,__LC_LPP		# set program parameter
198	br	%r14
199
200.L__critical_start:
201
202#if IS_ENABLED(CONFIG_KVM)
203/*
204 * sie64a calling convention:
205 * %r2 pointer to sie control block
206 * %r3 guest register save area
207 */
208ENTRY(sie64a)
209	stmg	%r6,%r14,__SF_GPRS(%r15)	# save kernel registers
210	stg	%r2,__SF_EMPTY(%r15)		# save control block pointer
211	stg	%r3,__SF_EMPTY+8(%r15)		# save guest register save area
212	xc	__SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
213	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU		# load guest fp/vx registers ?
214	jno	.Lsie_load_guest_gprs
215	brasl	%r14,load_fpu_regs		# load guest fp/vx regs
216.Lsie_load_guest_gprs:
217	lmg	%r0,%r13,0(%r3)			# load guest gprs 0-13
218	lg	%r14,__LC_GMAP			# get gmap pointer
219	ltgr	%r14,%r14
220	jz	.Lsie_gmap
221	lctlg	%c1,%c1,__GMAP_ASCE(%r14)	# load primary asce
222.Lsie_gmap:
223	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
224	oi	__SIE_PROG0C+3(%r14),1		# we are going into SIE now
225	tm	__SIE_PROG20+3(%r14),3		# last exit...
226	jnz	.Lsie_skip
227	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
228	jo	.Lsie_skip			# exit if fp/vx regs changed
229	sie	0(%r14)
230.Lsie_skip:
231	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
232	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
233.Lsie_done:
234# some program checks are suppressing. C code (e.g. do_protection_exception)
235# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
236# instructions between sie64a and .Lsie_done should not cause program
237# interrupts. So lets use a nop (47 00 00 00) as a landing pad.
238# See also .Lcleanup_sie
239.Lrewind_pad:
240	nop	0
241	.globl sie_exit
242sie_exit:
243	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area
244	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13
245	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers
246	lg	%r2,__SF_EMPTY+16(%r15)		# return exit reason code
247	br	%r14
248.Lsie_fault:
249	lghi	%r14,-EFAULT
250	stg	%r14,__SF_EMPTY+16(%r15)	# set exit reason code
251	j	sie_exit
252
253	EX_TABLE(.Lrewind_pad,.Lsie_fault)
254	EX_TABLE(sie_exit,.Lsie_fault)
255EXPORT_SYMBOL(sie64a)
256EXPORT_SYMBOL(sie_exit)
257#endif
258
259/*
260 * SVC interrupt handler routine. System calls are synchronous events and
261 * are executed with interrupts enabled.
262 */
263
264ENTRY(system_call)
265	stpt	__LC_SYNC_ENTER_TIMER
266.Lsysc_stmg:
267	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
268	lg	%r12,__LC_CURRENT
269	lghi	%r13,__TASK_thread
270	lghi	%r14,_PIF_SYSCALL
271.Lsysc_per:
272	lg	%r15,__LC_KERNEL_STACK
273	la	%r11,STACK_FRAME_OVERHEAD(%r15)	# pointer to pt_regs
274.Lsysc_vtime:
275	UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
276	stmg	%r0,%r7,__PT_R0(%r11)
277	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
278	mvc	__PT_PSW(16,%r11),__LC_SVC_OLD_PSW
279	mvc	__PT_INT_CODE(4,%r11),__LC_SVC_ILC
280	stg	%r14,__PT_FLAGS(%r11)
281.Lsysc_do_svc:
282	# load address of system call table
283	lg	%r10,__THREAD_sysc_table(%r13,%r12)
284	llgh	%r8,__PT_INT_CODE+2(%r11)
285	slag	%r8,%r8,2			# shift and test for svc 0
286	jnz	.Lsysc_nr_ok
287	# svc 0: system call number in %r1
288	llgfr	%r1,%r1				# clear high word in r1
289	cghi	%r1,NR_syscalls
290	jnl	.Lsysc_nr_ok
291	sth	%r1,__PT_INT_CODE+2(%r11)
292	slag	%r8,%r1,2
293.Lsysc_nr_ok:
294	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
295	stg	%r2,__PT_ORIG_GPR2(%r11)
296	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
297	lgf	%r9,0(%r8,%r10)			# get system call add.
298	TSTMSK	__TI_flags(%r12),_TIF_TRACE
299	jnz	.Lsysc_tracesys
300	basr	%r14,%r9			# call sys_xxxx
301	stg	%r2,__PT_R2(%r11)		# store return value
302
303.Lsysc_return:
304	LOCKDEP_SYS_EXIT
305.Lsysc_tif:
306	TSTMSK	__PT_FLAGS(%r11),_PIF_WORK
307	jnz	.Lsysc_work
308	TSTMSK	__TI_flags(%r12),_TIF_WORK
309	jnz	.Lsysc_work			# check for work
310	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
311	jnz	.Lsysc_work
312.Lsysc_restore:
313	lg	%r14,__LC_VDSO_PER_CPU
314	lmg	%r0,%r10,__PT_R0(%r11)
315	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
316	stpt	__LC_EXIT_TIMER
317	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
318	lmg	%r11,%r15,__PT_R11(%r11)
319	lpswe	__LC_RETURN_PSW
320.Lsysc_done:
321
322#
323# One of the work bits is on. Find out which one.
324#
325.Lsysc_work:
326	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
327	jo	.Lsysc_mcck_pending
328	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
329	jo	.Lsysc_reschedule
330#ifdef CONFIG_UPROBES
331	TSTMSK	__TI_flags(%r12),_TIF_UPROBE
332	jo	.Lsysc_uprobe_notify
333#endif
334	TSTMSK	__PT_FLAGS(%r11),_PIF_PER_TRAP
335	jo	.Lsysc_singlestep
336	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
337	jo	.Lsysc_sigpending
338	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
339	jo	.Lsysc_notify_resume
340	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
341	jo	.Lsysc_vxrs
342	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE
343	jo	.Lsysc_uaccess
344	j	.Lsysc_return		# beware of critical section cleanup
345
346#
347# _TIF_NEED_RESCHED is set, call schedule
348#
349.Lsysc_reschedule:
350	larl	%r14,.Lsysc_return
351	jg	schedule
352
353#
354# _CIF_MCCK_PENDING is set, call handler
355#
356.Lsysc_mcck_pending:
357	larl	%r14,.Lsysc_return
358	jg	s390_handle_mcck	# TIF bit will be cleared by handler
359
360#
361# _CIF_ASCE is set, load user space asce
362#
363.Lsysc_uaccess:
364	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE
365	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
366	j	.Lsysc_return
367
368#
369# CIF_FPU is set, restore floating-point controls and floating-point registers.
370#
371.Lsysc_vxrs:
372	larl	%r14,.Lsysc_return
373	jg	load_fpu_regs
374
375#
376# _TIF_SIGPENDING is set, call do_signal
377#
378.Lsysc_sigpending:
379	lgr	%r2,%r11		# pass pointer to pt_regs
380	brasl	%r14,do_signal
381	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
382	jno	.Lsysc_return
383.Lsysc_do_syscall:
384	lghi	%r13,__TASK_thread
385	lmg	%r2,%r7,__PT_R2(%r11)	# load svc arguments
386	lghi	%r1,0			# svc 0 returns -ENOSYS
387	j	.Lsysc_do_svc
388
389#
390# _TIF_NOTIFY_RESUME is set, call do_notify_resume
391#
392.Lsysc_notify_resume:
393	lgr	%r2,%r11		# pass pointer to pt_regs
394	larl	%r14,.Lsysc_return
395	jg	do_notify_resume
396
397#
398# _TIF_UPROBE is set, call uprobe_notify_resume
399#
400#ifdef CONFIG_UPROBES
401.Lsysc_uprobe_notify:
402	lgr	%r2,%r11		# pass pointer to pt_regs
403	larl	%r14,.Lsysc_return
404	jg	uprobe_notify_resume
405#endif
406
407#
408# _PIF_PER_TRAP is set, call do_per_trap
409#
410.Lsysc_singlestep:
411	ni	__PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
412	lgr	%r2,%r11		# pass pointer to pt_regs
413	larl	%r14,.Lsysc_return
414	jg	do_per_trap
415
416#
417# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
418# and after the system call
419#
420.Lsysc_tracesys:
421	lgr	%r2,%r11		# pass pointer to pt_regs
422	la	%r3,0
423	llgh	%r0,__PT_INT_CODE+2(%r11)
424	stg	%r0,__PT_R2(%r11)
425	brasl	%r14,do_syscall_trace_enter
426	lghi	%r0,NR_syscalls
427	clgr	%r0,%r2
428	jnh	.Lsysc_tracenogo
429	sllg	%r8,%r2,2
430	lgf	%r9,0(%r8,%r10)
431.Lsysc_tracego:
432	lmg	%r3,%r7,__PT_R3(%r11)
433	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
434	lg	%r2,__PT_ORIG_GPR2(%r11)
435	basr	%r14,%r9		# call sys_xxx
436	stg	%r2,__PT_R2(%r11)	# store return value
437.Lsysc_tracenogo:
438	TSTMSK	__TI_flags(%r12),_TIF_TRACE
439	jz	.Lsysc_return
440	lgr	%r2,%r11		# pass pointer to pt_regs
441	larl	%r14,.Lsysc_return
442	jg	do_syscall_trace_exit
443
444#
445# a new process exits the kernel with ret_from_fork
446#
447ENTRY(ret_from_fork)
448	la	%r11,STACK_FRAME_OVERHEAD(%r15)
449	lg	%r12,__LC_CURRENT
450	brasl	%r14,schedule_tail
451	TRACE_IRQS_ON
452	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
453	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
454	jne	.Lsysc_tracenogo
455	# it's a kernel thread
456	lmg	%r9,%r10,__PT_R9(%r11)	# load gprs
457ENTRY(kernel_thread_starter)
458	la	%r2,0(%r10)
459	basr	%r14,%r9
460	j	.Lsysc_tracenogo
461
462/*
463 * Program check handler routine
464 */
465
466ENTRY(pgm_check_handler)
467	stpt	__LC_SYNC_ENTER_TIMER
468	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
469	lg	%r10,__LC_LAST_BREAK
470	lg	%r12,__LC_CURRENT
471	larl	%r13,cleanup_critical
472	lmg	%r8,%r9,__LC_PGM_OLD_PSW
473	tmhh	%r8,0x0001		# test problem state bit
474	jnz	2f			# -> fault in user space
475#if IS_ENABLED(CONFIG_KVM)
476	# cleanup critical section for sie64a
477	lgr	%r14,%r9
478	slg	%r14,BASED(.Lsie_critical_start)
479	clg	%r14,BASED(.Lsie_critical_length)
480	jhe	0f
481	brasl	%r14,.Lcleanup_sie
482#endif
4830:	tmhh	%r8,0x4000		# PER bit set in old PSW ?
484	jnz	1f			# -> enabled, can't be a double fault
485	tm	__LC_PGM_ILC+3,0x80	# check for per exception
486	jnz	.Lpgm_svcper		# -> single stepped svc
4871:	CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
488	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
489	j	3f
4902:	UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
491	lg	%r15,__LC_KERNEL_STACK
492	lgr	%r14,%r12
493	aghi	%r14,__TASK_thread	# pointer to thread_struct
494	lghi	%r13,__LC_PGM_TDB
495	tm	__LC_PGM_ILC+2,0x02	# check for transaction abort
496	jz	3f
497	mvc	__THREAD_trap_tdb(256,%r14),0(%r13)
4983:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
499	stg	%r10,__THREAD_last_break(%r14)
500	stmg	%r0,%r7,__PT_R0(%r11)
501	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
502	stmg	%r8,%r9,__PT_PSW(%r11)
503	mvc	__PT_INT_CODE(4,%r11),__LC_PGM_ILC
504	mvc	__PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
505	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
506	stg	%r10,__PT_ARGS(%r11)
507	tm	__LC_PGM_ILC+3,0x80	# check for per exception
508	jz	4f
509	tmhh	%r8,0x0001		# kernel per event ?
510	jz	.Lpgm_kprobe
511	oi	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
512	mvc	__THREAD_per_address(8,%r14),__LC_PER_ADDRESS
513	mvc	__THREAD_per_cause(2,%r14),__LC_PER_CODE
514	mvc	__THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
5154:	REENABLE_IRQS
516	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
517	larl	%r1,pgm_check_table
518	llgh	%r10,__PT_INT_CODE+2(%r11)
519	nill	%r10,0x007f
520	sll	%r10,2
521	je	.Lpgm_return
522	lgf	%r1,0(%r10,%r1)		# load address of handler routine
523	lgr	%r2,%r11		# pass pointer to pt_regs
524	basr	%r14,%r1		# branch to interrupt-handler
525.Lpgm_return:
526	LOCKDEP_SYS_EXIT
527	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
528	jno	.Lsysc_restore
529	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
530	jo	.Lsysc_do_syscall
531	j	.Lsysc_tif
532
533#
534# PER event in supervisor state, must be kprobes
535#
536.Lpgm_kprobe:
537	REENABLE_IRQS
538	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
539	lgr	%r2,%r11		# pass pointer to pt_regs
540	brasl	%r14,do_per_trap
541	j	.Lpgm_return
542
543#
544# single stepped system call
545#
546.Lpgm_svcper:
547	mvc	__LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
548	lghi	%r13,__TASK_thread
549	larl	%r14,.Lsysc_per
550	stg	%r14,__LC_RETURN_PSW+8
551	lghi	%r14,_PIF_SYSCALL | _PIF_PER_TRAP
552	lpswe	__LC_RETURN_PSW		# branch to .Lsysc_per and enable irqs
553
554/*
555 * IO interrupt handler routine
556 */
557ENTRY(io_int_handler)
558	STCK	__LC_INT_CLOCK
559	stpt	__LC_ASYNC_ENTER_TIMER
560	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
561	lg	%r12,__LC_CURRENT
562	larl	%r13,cleanup_critical
563	lmg	%r8,%r9,__LC_IO_OLD_PSW
564	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
565	stmg	%r0,%r7,__PT_R0(%r11)
566	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
567	stmg	%r8,%r9,__PT_PSW(%r11)
568	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
569	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
570	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
571	jo	.Lio_restore
572	TRACE_IRQS_OFF
573	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
574.Lio_loop:
575	lgr	%r2,%r11		# pass pointer to pt_regs
576	lghi	%r3,IO_INTERRUPT
577	tm	__PT_INT_CODE+8(%r11),0x80	# adapter interrupt ?
578	jz	.Lio_call
579	lghi	%r3,THIN_INTERRUPT
580.Lio_call:
581	brasl	%r14,do_IRQ
582	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
583	jz	.Lio_return
584	tpi	0
585	jz	.Lio_return
586	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
587	j	.Lio_loop
588.Lio_return:
589	LOCKDEP_SYS_EXIT
590	TRACE_IRQS_ON
591.Lio_tif:
592	TSTMSK	__TI_flags(%r12),_TIF_WORK
593	jnz	.Lio_work		# there is work to do (signals etc.)
594	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
595	jnz	.Lio_work
596.Lio_restore:
597	lg	%r14,__LC_VDSO_PER_CPU
598	lmg	%r0,%r10,__PT_R0(%r11)
599	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
600	stpt	__LC_EXIT_TIMER
601	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
602	lmg	%r11,%r15,__PT_R11(%r11)
603	lpswe	__LC_RETURN_PSW
604.Lio_done:
605
606#
607# There is work todo, find out in which context we have been interrupted:
608# 1) if we return to user space we can do all _TIF_WORK work
609# 2) if we return to kernel code and kvm is enabled check if we need to
610#    modify the psw to leave SIE
611# 3) if we return to kernel code and preemptive scheduling is enabled check
612#    the preemption counter and if it is zero call preempt_schedule_irq
613# Before any work can be done, a switch to the kernel stack is required.
614#
615.Lio_work:
616	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
617	jo	.Lio_work_user		# yes -> do resched & signal
618#ifdef CONFIG_PREEMPT
619	# check for preemptive scheduling
620	icm	%r0,15,__LC_PREEMPT_COUNT
621	jnz	.Lio_restore		# preemption is disabled
622	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
623	jno	.Lio_restore
624	# switch to kernel stack
625	lg	%r1,__PT_R15(%r11)
626	aghi	%r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
627	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
628	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
629	la	%r11,STACK_FRAME_OVERHEAD(%r1)
630	lgr	%r15,%r1
631	# TRACE_IRQS_ON already done at .Lio_return, call
632	# TRACE_IRQS_OFF to keep things symmetrical
633	TRACE_IRQS_OFF
634	brasl	%r14,preempt_schedule_irq
635	j	.Lio_return
636#else
637	j	.Lio_restore
638#endif
639
640#
641# Need to do work before returning to userspace, switch to kernel stack
642#
643.Lio_work_user:
644	lg	%r1,__LC_KERNEL_STACK
645	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
646	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
647	la	%r11,STACK_FRAME_OVERHEAD(%r1)
648	lgr	%r15,%r1
649
650#
651# One of the work bits is on. Find out which one.
652#
653.Lio_work_tif:
654	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
655	jo	.Lio_mcck_pending
656	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
657	jo	.Lio_reschedule
658	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
659	jo	.Lio_sigpending
660	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
661	jo	.Lio_notify_resume
662	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
663	jo	.Lio_vxrs
664	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE
665	jo	.Lio_uaccess
666	j	.Lio_return		# beware of critical section cleanup
667
668#
669# _CIF_MCCK_PENDING is set, call handler
670#
671.Lio_mcck_pending:
672	# TRACE_IRQS_ON already done at .Lio_return
673	brasl	%r14,s390_handle_mcck	# TIF bit will be cleared by handler
674	TRACE_IRQS_OFF
675	j	.Lio_return
676
677#
678# _CIF_ASCE is set, load user space asce
679#
680.Lio_uaccess:
681	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE
682	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
683	j	.Lio_return
684
685#
686# CIF_FPU is set, restore floating-point controls and floating-point registers.
687#
688.Lio_vxrs:
689	larl	%r14,.Lio_return
690	jg	load_fpu_regs
691
692#
693# _TIF_NEED_RESCHED is set, call schedule
694#
695.Lio_reschedule:
696	# TRACE_IRQS_ON already done at .Lio_return
697	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
698	brasl	%r14,schedule		# call scheduler
699	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
700	TRACE_IRQS_OFF
701	j	.Lio_return
702
703#
704# _TIF_SIGPENDING or is set, call do_signal
705#
706.Lio_sigpending:
707	# TRACE_IRQS_ON already done at .Lio_return
708	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
709	lgr	%r2,%r11		# pass pointer to pt_regs
710	brasl	%r14,do_signal
711	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
712	TRACE_IRQS_OFF
713	j	.Lio_return
714
715#
716# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
717#
718.Lio_notify_resume:
719	# TRACE_IRQS_ON already done at .Lio_return
720	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
721	lgr	%r2,%r11		# pass pointer to pt_regs
722	brasl	%r14,do_notify_resume
723	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
724	TRACE_IRQS_OFF
725	j	.Lio_return
726
727/*
728 * External interrupt handler routine
729 */
730ENTRY(ext_int_handler)
731	STCK	__LC_INT_CLOCK
732	stpt	__LC_ASYNC_ENTER_TIMER
733	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
734	lg	%r12,__LC_CURRENT
735	larl	%r13,cleanup_critical
736	lmg	%r8,%r9,__LC_EXT_OLD_PSW
737	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
738	stmg	%r0,%r7,__PT_R0(%r11)
739	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
740	stmg	%r8,%r9,__PT_PSW(%r11)
741	lghi	%r1,__LC_EXT_PARAMS2
742	mvc	__PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
743	mvc	__PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
744	mvc	__PT_INT_PARM_LONG(8,%r11),0(%r1)
745	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
746	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
747	jo	.Lio_restore
748	TRACE_IRQS_OFF
749	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
750	lgr	%r2,%r11		# pass pointer to pt_regs
751	lghi	%r3,EXT_INTERRUPT
752	brasl	%r14,do_IRQ
753	j	.Lio_return
754
755/*
756 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
757 */
758ENTRY(psw_idle)
759	stg	%r3,__SF_EMPTY(%r15)
760	larl	%r1,.Lpsw_idle_lpsw+4
761	stg	%r1,__SF_EMPTY+8(%r15)
762#ifdef CONFIG_SMP
763	larl	%r1,smp_cpu_mtid
764	llgf	%r1,0(%r1)
765	ltgr	%r1,%r1
766	jz	.Lpsw_idle_stcctm
767	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
768.Lpsw_idle_stcctm:
769#endif
770	oi	__LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
771	STCK	__CLOCK_IDLE_ENTER(%r2)
772	stpt	__TIMER_IDLE_ENTER(%r2)
773.Lpsw_idle_lpsw:
774	lpswe	__SF_EMPTY(%r15)
775	br	%r14
776.Lpsw_idle_end:
777
778/*
779 * Store floating-point controls and floating-point or vector register
780 * depending whether the vector facility is available.	A critical section
781 * cleanup assures that the registers are stored even if interrupted for
782 * some other work.  The CIF_FPU flag is set to trigger a lazy restore
783 * of the register contents at return from io or a system call.
784 */
785ENTRY(save_fpu_regs)
786	lg	%r2,__LC_CURRENT
787	aghi	%r2,__TASK_thread
788	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
789	bor	%r14
790	stfpc	__THREAD_FPU_fpc(%r2)
791	lg	%r3,__THREAD_FPU_regs(%r2)
792	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
793	jz	.Lsave_fpu_regs_fp	  # no -> store FP regs
794	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
795	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
796	j	.Lsave_fpu_regs_done	  # -> set CIF_FPU flag
797.Lsave_fpu_regs_fp:
798	std	0,0(%r3)
799	std	1,8(%r3)
800	std	2,16(%r3)
801	std	3,24(%r3)
802	std	4,32(%r3)
803	std	5,40(%r3)
804	std	6,48(%r3)
805	std	7,56(%r3)
806	std	8,64(%r3)
807	std	9,72(%r3)
808	std	10,80(%r3)
809	std	11,88(%r3)
810	std	12,96(%r3)
811	std	13,104(%r3)
812	std	14,112(%r3)
813	std	15,120(%r3)
814.Lsave_fpu_regs_done:
815	oi	__LC_CPU_FLAGS+7,_CIF_FPU
816	br	%r14
817.Lsave_fpu_regs_end:
818#if IS_ENABLED(CONFIG_KVM)
819EXPORT_SYMBOL(save_fpu_regs)
820#endif
821
822/*
823 * Load floating-point controls and floating-point or vector registers.
824 * A critical section cleanup assures that the register contents are
825 * loaded even if interrupted for some other work.
826 *
827 * There are special calling conventions to fit into sysc and io return work:
828 *	%r15:	<kernel stack>
829 * The function requires:
830 *	%r4
831 */
832load_fpu_regs:
833	lg	%r4,__LC_CURRENT
834	aghi	%r4,__TASK_thread
835	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
836	bnor	%r14
837	lfpc	__THREAD_FPU_fpc(%r4)
838	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
839	lg	%r4,__THREAD_FPU_regs(%r4)	# %r4 <- reg save area
840	jz	.Lload_fpu_regs_fp		# -> no VX, load FP regs
841	VLM	%v0,%v15,0,%r4
842	VLM	%v16,%v31,256,%r4
843	j	.Lload_fpu_regs_done
844.Lload_fpu_regs_fp:
845	ld	0,0(%r4)
846	ld	1,8(%r4)
847	ld	2,16(%r4)
848	ld	3,24(%r4)
849	ld	4,32(%r4)
850	ld	5,40(%r4)
851	ld	6,48(%r4)
852	ld	7,56(%r4)
853	ld	8,64(%r4)
854	ld	9,72(%r4)
855	ld	10,80(%r4)
856	ld	11,88(%r4)
857	ld	12,96(%r4)
858	ld	13,104(%r4)
859	ld	14,112(%r4)
860	ld	15,120(%r4)
861.Lload_fpu_regs_done:
862	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
863	br	%r14
864.Lload_fpu_regs_end:
865
866.L__critical_end:
867
868/*
869 * Machine check handler routines
870 */
871ENTRY(mcck_int_handler)
872	STCK	__LC_MCCK_CLOCK
873	la	%r1,4095		# revalidate r1
874	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# revalidate cpu timer
875	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
876	lg	%r12,__LC_CURRENT
877	larl	%r13,cleanup_critical
878	lmg	%r8,%r9,__LC_MCK_OLD_PSW
879	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
880	jo	.Lmcck_panic		# yes -> rest of mcck code invalid
881	lghi	%r14,__LC_CPU_TIMER_SAVE_AREA
882	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
883	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
884	jo	3f
885	la	%r14,__LC_SYNC_ENTER_TIMER
886	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
887	jl	0f
888	la	%r14,__LC_ASYNC_ENTER_TIMER
8890:	clc	0(8,%r14),__LC_EXIT_TIMER
890	jl	1f
891	la	%r14,__LC_EXIT_TIMER
8921:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
893	jl	2f
894	la	%r14,__LC_LAST_UPDATE_TIMER
8952:	spt	0(%r14)
896	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
8973:	TSTMSK	__LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
898	jno	.Lmcck_panic		# no -> skip cleanup critical
899	SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
900.Lmcck_skip:
901	lghi	%r14,__LC_GPREGS_SAVE_AREA+64
902	stmg	%r0,%r7,__PT_R0(%r11)
903	mvc	__PT_R8(64,%r11),0(%r14)
904	stmg	%r8,%r9,__PT_PSW(%r11)
905	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
906	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
907	lgr	%r2,%r11		# pass pointer to pt_regs
908	brasl	%r14,s390_do_machine_check
909	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
910	jno	.Lmcck_return
911	lg	%r1,__LC_KERNEL_STACK	# switch to kernel stack
912	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
913	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
914	la	%r11,STACK_FRAME_OVERHEAD(%r1)
915	lgr	%r15,%r1
916	ssm	__LC_PGM_NEW_PSW	# turn dat on, keep irqs off
917	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
918	jno	.Lmcck_return
919	TRACE_IRQS_OFF
920	brasl	%r14,s390_handle_mcck
921	TRACE_IRQS_ON
922.Lmcck_return:
923	lg	%r14,__LC_VDSO_PER_CPU
924	lmg	%r0,%r10,__PT_R0(%r11)
925	mvc	__LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
926	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
927	jno	0f
928	stpt	__LC_EXIT_TIMER
929	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
9300:	lmg	%r11,%r15,__PT_R11(%r11)
931	lpswe	__LC_RETURN_MCCK_PSW
932
933.Lmcck_panic:
934	lg	%r15,__LC_PANIC_STACK
935	la	%r11,STACK_FRAME_OVERHEAD(%r15)
936	j	.Lmcck_skip
937
938#
939# PSW restart interrupt handler
940#
941ENTRY(restart_int_handler)
942	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
943	jz	0f
944	.insn	s,0xb2800000,__LC_LPP
9450:	stg	%r15,__LC_SAVE_AREA_RESTART
946	lg	%r15,__LC_RESTART_STACK
947	aghi	%r15,-__PT_SIZE			# create pt_regs on stack
948	xc	0(__PT_SIZE,%r15),0(%r15)
949	stmg	%r0,%r14,__PT_R0(%r15)
950	mvc	__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
951	mvc	__PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
952	aghi	%r15,-STACK_FRAME_OVERHEAD	# create stack frame on stack
953	xc	0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
954	lg	%r1,__LC_RESTART_FN		# load fn, parm & source cpu
955	lg	%r2,__LC_RESTART_DATA
956	lg	%r3,__LC_RESTART_SOURCE
957	ltgr	%r3,%r3				# test source cpu address
958	jm	1f				# negative -> skip source stop
9590:	sigp	%r4,%r3,SIGP_SENSE		# sigp sense to source cpu
960	brc	10,0b				# wait for status stored
9611:	basr	%r14,%r1			# call function
962	stap	__SF_EMPTY(%r15)		# store cpu address
963	llgh	%r3,__SF_EMPTY(%r15)
9642:	sigp	%r4,%r3,SIGP_STOP		# sigp stop to current cpu
965	brc	2,2b
9663:	j	3b
967
968	.section .kprobes.text, "ax"
969
970#ifdef CONFIG_CHECK_STACK
971/*
972 * The synchronous or the asynchronous stack overflowed. We are dead.
973 * No need to properly save the registers, we are going to panic anyway.
974 * Setup a pt_regs so that show_trace can provide a good call trace.
975 */
976stack_overflow:
977	lg	%r15,__LC_PANIC_STACK	# change to panic stack
978	la	%r11,STACK_FRAME_OVERHEAD(%r15)
979	stmg	%r0,%r7,__PT_R0(%r11)
980	stmg	%r8,%r9,__PT_PSW(%r11)
981	mvc	__PT_R8(64,%r11),0(%r14)
982	stg	%r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
983	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
984	lgr	%r2,%r11		# pass pointer to pt_regs
985	jg	kernel_stack_overflow
986#endif
987
988cleanup_critical:
989#if IS_ENABLED(CONFIG_KVM)
990	clg	%r9,BASED(.Lcleanup_table_sie)	# .Lsie_gmap
991	jl	0f
992	clg	%r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
993	jl	.Lcleanup_sie
994#endif
995	clg	%r9,BASED(.Lcleanup_table)	# system_call
996	jl	0f
997	clg	%r9,BASED(.Lcleanup_table+8)	# .Lsysc_do_svc
998	jl	.Lcleanup_system_call
999	clg	%r9,BASED(.Lcleanup_table+16)	# .Lsysc_tif
1000	jl	0f
1001	clg	%r9,BASED(.Lcleanup_table+24)	# .Lsysc_restore
1002	jl	.Lcleanup_sysc_tif
1003	clg	%r9,BASED(.Lcleanup_table+32)	# .Lsysc_done
1004	jl	.Lcleanup_sysc_restore
1005	clg	%r9,BASED(.Lcleanup_table+40)	# .Lio_tif
1006	jl	0f
1007	clg	%r9,BASED(.Lcleanup_table+48)	# .Lio_restore
1008	jl	.Lcleanup_io_tif
1009	clg	%r9,BASED(.Lcleanup_table+56)	# .Lio_done
1010	jl	.Lcleanup_io_restore
1011	clg	%r9,BASED(.Lcleanup_table+64)	# psw_idle
1012	jl	0f
1013	clg	%r9,BASED(.Lcleanup_table+72)	# .Lpsw_idle_end
1014	jl	.Lcleanup_idle
1015	clg	%r9,BASED(.Lcleanup_table+80)	# save_fpu_regs
1016	jl	0f
1017	clg	%r9,BASED(.Lcleanup_table+88)	# .Lsave_fpu_regs_end
1018	jl	.Lcleanup_save_fpu_regs
1019	clg	%r9,BASED(.Lcleanup_table+96)	# load_fpu_regs
1020	jl	0f
1021	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
1022	jl	.Lcleanup_load_fpu_regs
10230:	br	%r14
1024
1025	.align	8
1026.Lcleanup_table:
1027	.quad	system_call
1028	.quad	.Lsysc_do_svc
1029	.quad	.Lsysc_tif
1030	.quad	.Lsysc_restore
1031	.quad	.Lsysc_done
1032	.quad	.Lio_tif
1033	.quad	.Lio_restore
1034	.quad	.Lio_done
1035	.quad	psw_idle
1036	.quad	.Lpsw_idle_end
1037	.quad	save_fpu_regs
1038	.quad	.Lsave_fpu_regs_end
1039	.quad	load_fpu_regs
1040	.quad	.Lload_fpu_regs_end
1041
1042#if IS_ENABLED(CONFIG_KVM)
1043.Lcleanup_table_sie:
1044	.quad	.Lsie_gmap
1045	.quad	.Lsie_done
1046
1047.Lcleanup_sie:
1048	lg	%r9,__SF_EMPTY(%r15)		# get control block pointer
1049	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
1050	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
1051	larl	%r9,sie_exit			# skip forward to sie_exit
1052	br	%r14
1053#endif
1054
1055.Lcleanup_system_call:
1056	# check if stpt has been executed
1057	clg	%r9,BASED(.Lcleanup_system_call_insn)
1058	jh	0f
1059	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1060	cghi	%r11,__LC_SAVE_AREA_ASYNC
1061	je	0f
1062	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
10630:	# check if stmg has been executed
1064	clg	%r9,BASED(.Lcleanup_system_call_insn+8)
1065	jh	0f
1066	mvc	__LC_SAVE_AREA_SYNC(64),0(%r11)
10670:	# check if base register setup + TIF bit load has been done
1068	clg	%r9,BASED(.Lcleanup_system_call_insn+16)
1069	jhe	0f
1070	# set up saved register r12 task struct pointer
1071	stg	%r12,32(%r11)
1072	# set up saved register r13 __TASK_thread offset
1073	mvc	40(8,%r11),BASED(.Lcleanup_system_call_const)
10740:	# check if the user time update has been done
1075	clg	%r9,BASED(.Lcleanup_system_call_insn+24)
1076	jh	0f
1077	lg	%r15,__LC_EXIT_TIMER
1078	slg	%r15,__LC_SYNC_ENTER_TIMER
1079	alg	%r15,__LC_USER_TIMER
1080	stg	%r15,__LC_USER_TIMER
10810:	# check if the system time update has been done
1082	clg	%r9,BASED(.Lcleanup_system_call_insn+32)
1083	jh	0f
1084	lg	%r15,__LC_LAST_UPDATE_TIMER
1085	slg	%r15,__LC_EXIT_TIMER
1086	alg	%r15,__LC_SYSTEM_TIMER
1087	stg	%r15,__LC_SYSTEM_TIMER
10880:	# update accounting time stamp
1089	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1090	# set up saved register r11
1091	lg	%r15,__LC_KERNEL_STACK
1092	la	%r9,STACK_FRAME_OVERHEAD(%r15)
1093	stg	%r9,24(%r11)		# r11 pt_regs pointer
1094	# fill pt_regs
1095	mvc	__PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1096	stmg	%r0,%r7,__PT_R0(%r9)
1097	mvc	__PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1098	mvc	__PT_INT_CODE(4,%r9),__LC_SVC_ILC
1099	xc	__PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1100	mvi	__PT_FLAGS+7(%r9),_PIF_SYSCALL
1101	# setup saved register r15
1102	stg	%r15,56(%r11)		# r15 stack pointer
1103	# set new psw address and exit
1104	larl	%r9,.Lsysc_do_svc
1105	br	%r14
1106.Lcleanup_system_call_insn:
1107	.quad	system_call
1108	.quad	.Lsysc_stmg
1109	.quad	.Lsysc_per
1110	.quad	.Lsysc_vtime+36
1111	.quad	.Lsysc_vtime+42
1112.Lcleanup_system_call_const:
1113	.quad	__TASK_thread
1114
1115.Lcleanup_sysc_tif:
1116	larl	%r9,.Lsysc_tif
1117	br	%r14
1118
1119.Lcleanup_sysc_restore:
1120	clg	%r9,BASED(.Lcleanup_sysc_restore_insn)
1121	je	0f
1122	lg	%r9,24(%r11)		# get saved pointer to pt_regs
1123	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1124	mvc	0(64,%r11),__PT_R8(%r9)
1125	lmg	%r0,%r7,__PT_R0(%r9)
11260:	lmg	%r8,%r9,__LC_RETURN_PSW
1127	br	%r14
1128.Lcleanup_sysc_restore_insn:
1129	.quad	.Lsysc_done - 4
1130
1131.Lcleanup_io_tif:
1132	larl	%r9,.Lio_tif
1133	br	%r14
1134
1135.Lcleanup_io_restore:
1136	clg	%r9,BASED(.Lcleanup_io_restore_insn)
1137	je	0f
1138	lg	%r9,24(%r11)		# get saved r11 pointer to pt_regs
1139	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1140	mvc	0(64,%r11),__PT_R8(%r9)
1141	lmg	%r0,%r7,__PT_R0(%r9)
11420:	lmg	%r8,%r9,__LC_RETURN_PSW
1143	br	%r14
1144.Lcleanup_io_restore_insn:
1145	.quad	.Lio_done - 4
1146
1147.Lcleanup_idle:
1148	ni	__LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1149	# copy interrupt clock & cpu timer
1150	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1151	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1152	cghi	%r11,__LC_SAVE_AREA_ASYNC
1153	je	0f
1154	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1155	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
11560:	# check if stck & stpt have been executed
1157	clg	%r9,BASED(.Lcleanup_idle_insn)
1158	jhe	1f
1159	mvc	__CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1160	mvc	__TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
11611:	# calculate idle cycles
1162#ifdef CONFIG_SMP
1163	clg	%r9,BASED(.Lcleanup_idle_insn)
1164	jl	3f
1165	larl	%r1,smp_cpu_mtid
1166	llgf	%r1,0(%r1)
1167	ltgr	%r1,%r1
1168	jz	3f
1169	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1170	larl	%r3,mt_cycles
1171	ag	%r3,__LC_PERCPU_OFFSET
1172	la	%r4,__SF_EMPTY+16(%r15)
11732:	lg	%r0,0(%r3)
1174	slg	%r0,0(%r4)
1175	alg	%r0,64(%r4)
1176	stg	%r0,0(%r3)
1177	la	%r3,8(%r3)
1178	la	%r4,8(%r4)
1179	brct	%r1,2b
1180#endif
11813:	# account system time going idle
1182	lg	%r9,__LC_STEAL_TIMER
1183	alg	%r9,__CLOCK_IDLE_ENTER(%r2)
1184	slg	%r9,__LC_LAST_UPDATE_CLOCK
1185	stg	%r9,__LC_STEAL_TIMER
1186	mvc	__LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1187	lg	%r9,__LC_SYSTEM_TIMER
1188	alg	%r9,__LC_LAST_UPDATE_TIMER
1189	slg	%r9,__TIMER_IDLE_ENTER(%r2)
1190	stg	%r9,__LC_SYSTEM_TIMER
1191	mvc	__LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1192	# prepare return psw
1193	nihh	%r8,0xfcfd		# clear irq & wait state bits
1194	lg	%r9,48(%r11)		# return from psw_idle
1195	br	%r14
1196.Lcleanup_idle_insn:
1197	.quad	.Lpsw_idle_lpsw
1198
1199.Lcleanup_save_fpu_regs:
1200	larl	%r9,save_fpu_regs
1201	br	%r14
1202
1203.Lcleanup_load_fpu_regs:
1204	larl	%r9,load_fpu_regs
1205	br	%r14
1206
1207/*
1208 * Integer constants
1209 */
1210	.align	8
1211.Lcritical_start:
1212	.quad	.L__critical_start
1213.Lcritical_length:
1214	.quad	.L__critical_end - .L__critical_start
1215#if IS_ENABLED(CONFIG_KVM)
1216.Lsie_critical_start:
1217	.quad	.Lsie_gmap
1218.Lsie_critical_length:
1219	.quad	.Lsie_done - .Lsie_gmap
1220#endif
1221
1222	.section .rodata, "a"
1223#define SYSCALL(esame,emu)	.long esame
1224	.globl	sys_call_table
1225sys_call_table:
1226#include "syscalls.S"
1227#undef SYSCALL
1228
1229#ifdef CONFIG_COMPAT
1230
1231#define SYSCALL(esame,emu)	.long emu
1232	.globl	sys_call_table_emu
1233sys_call_table_emu:
1234#include "syscalls.S"
1235#undef SYSCALL
1236#endif
1237