xref: /openbmc/linux/arch/s390/kernel/entry.S (revision 2eb3ed33e55d003d721d4d1a5e72fe323c12b4c0) 
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *    S390 low-level entry points.
4 *
5 *    Copyright IBM Corp. 1999, 2012
6 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 *		 Hartmut Penner (hp@de.ibm.com),
8 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/processor.h>
15#include <asm/cache.h>
16#include <asm/errno.h>
17#include <asm/ptrace.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/unistd.h>
21#include <asm/page.h>
22#include <asm/sigp.h>
23#include <asm/irq.h>
24#include <asm/vx-insn.h>
25#include <asm/setup.h>
26#include <asm/nmi.h>
27#include <asm/export.h>
28
29__PT_R0      =	__PT_GPRS
30__PT_R1      =	__PT_GPRS + 8
31__PT_R2      =	__PT_GPRS + 16
32__PT_R3      =	__PT_GPRS + 24
33__PT_R4      =	__PT_GPRS + 32
34__PT_R5      =	__PT_GPRS + 40
35__PT_R6      =	__PT_GPRS + 48
36__PT_R7      =	__PT_GPRS + 56
37__PT_R8      =	__PT_GPRS + 64
38__PT_R9      =	__PT_GPRS + 72
39__PT_R10     =	__PT_GPRS + 80
40__PT_R11     =	__PT_GPRS + 88
41__PT_R12     =	__PT_GPRS + 96
42__PT_R13     =	__PT_GPRS + 104
43__PT_R14     =	__PT_GPRS + 112
44__PT_R15     =	__PT_GPRS + 120
45
46STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
47STACK_SIZE  = 1 << STACK_SHIFT
48STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
49
50_TIF_WORK	= (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
51		   _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
52_TIF_TRACE	= (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
53		   _TIF_SYSCALL_TRACEPOINT)
54_CIF_WORK	= (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
55		   _CIF_ASCE_SECONDARY | _CIF_FPU)
56_PIF_WORK	= (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
57
58#define BASED(name) name-cleanup_critical(%r13)
59
60	.macro	TRACE_IRQS_ON
61#ifdef CONFIG_TRACE_IRQFLAGS
62	basr	%r2,%r0
63	brasl	%r14,trace_hardirqs_on_caller
64#endif
65	.endm
66
67	.macro	TRACE_IRQS_OFF
68#ifdef CONFIG_TRACE_IRQFLAGS
69	basr	%r2,%r0
70	brasl	%r14,trace_hardirqs_off_caller
71#endif
72	.endm
73
74	.macro	LOCKDEP_SYS_EXIT
75#ifdef CONFIG_LOCKDEP
76	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
77	jz	.+10
78	brasl	%r14,lockdep_sys_exit
79#endif
80	.endm
81
82	.macro	CHECK_STACK stacksize,savearea
83#ifdef CONFIG_CHECK_STACK
84	tml	%r15,\stacksize - CONFIG_STACK_GUARD
85	lghi	%r14,\savearea
86	jz	stack_overflow
87#endif
88	.endm
89
90	.macro	SWITCH_ASYNC savearea,timer
91	tmhh	%r8,0x0001		# interrupting from user ?
92	jnz	1f
93	lgr	%r14,%r9
94	slg	%r14,BASED(.Lcritical_start)
95	clg	%r14,BASED(.Lcritical_length)
96	jhe	0f
97	lghi	%r11,\savearea		# inside critical section, do cleanup
98	brasl	%r14,cleanup_critical
99	tmhh	%r8,0x0001		# retest problem state after cleanup
100	jnz	1f
1010:	lg	%r14,__LC_ASYNC_STACK	# are we already on the async stack?
102	slgr	%r14,%r15
103	srag	%r14,%r14,STACK_SHIFT
104	jnz	2f
105	CHECK_STACK 1<<STACK_SHIFT,\savearea
106	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
107	j	3f
1081:	UPDATE_VTIME %r14,%r15,\timer
1092:	lg	%r15,__LC_ASYNC_STACK	# load async stack
1103:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
111	.endm
112
113	.macro UPDATE_VTIME w1,w2,enter_timer
114	lg	\w1,__LC_EXIT_TIMER
115	lg	\w2,__LC_LAST_UPDATE_TIMER
116	slg	\w1,\enter_timer
117	slg	\w2,__LC_EXIT_TIMER
118	alg	\w1,__LC_USER_TIMER
119	alg	\w2,__LC_SYSTEM_TIMER
120	stg	\w1,__LC_USER_TIMER
121	stg	\w2,__LC_SYSTEM_TIMER
122	mvc	__LC_LAST_UPDATE_TIMER(8),\enter_timer
123	.endm
124
125	.macro REENABLE_IRQS
126	stg	%r8,__LC_RETURN_PSW
127	ni	__LC_RETURN_PSW,0xbf
128	ssm	__LC_RETURN_PSW
129	.endm
130
131	.macro STCK savearea
132#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
133	.insn	s,0xb27c0000,\savearea		# store clock fast
134#else
135	.insn	s,0xb2050000,\savearea		# store clock
136#endif
137	.endm
138
139	/*
140	 * The TSTMSK macro generates a test-under-mask instruction by
141	 * calculating the memory offset for the specified mask value.
142	 * Mask value can be any constant.  The macro shifts the mask
143	 * value to calculate the memory offset for the test-under-mask
144	 * instruction.
145	 */
146	.macro TSTMSK addr, mask, size=8, bytepos=0
147		.if (\bytepos < \size) && (\mask >> 8)
148			.if (\mask & 0xff)
149				.error "Mask exceeds byte boundary"
150			.endif
151			TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
152			.exitm
153		.endif
154		.ifeq \mask
155			.error "Mask must not be zero"
156		.endif
157		off = \size - \bytepos - 1
158		tm	off+\addr, \mask
159	.endm
160
161	.section .kprobes.text, "ax"
162.Ldummy:
163	/*
164	 * This nop exists only in order to avoid that __switch_to starts at
165	 * the beginning of the kprobes text section. In that case we would
166	 * have several symbols at the same address. E.g. objdump would take
167	 * an arbitrary symbol name when disassembling this code.
168	 * With the added nop in between the __switch_to symbol is unique
169	 * again.
170	 */
171	nop	0
172
173/*
174 * Scheduler resume function, called by switch_to
175 *  gpr2 = (task_struct *) prev
176 *  gpr3 = (task_struct *) next
177 * Returns:
178 *  gpr2 = prev
179 */
180ENTRY(__switch_to)
181	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task
182	lgr	%r1,%r2
183	aghi	%r1,__TASK_thread		# thread_struct of prev task
184	lg	%r5,__TASK_stack(%r3)		# start of kernel stack of next
185	stg	%r15,__THREAD_ksp(%r1)		# store kernel stack of prev
186	lgr	%r1,%r3
187	aghi	%r1,__TASK_thread		# thread_struct of next task
188	lgr	%r15,%r5
189	aghi	%r15,STACK_INIT			# end of kernel stack of next
190	stg	%r3,__LC_CURRENT		# store task struct of next
191	stg	%r15,__LC_KERNEL_STACK		# store end of kernel stack
192	lg	%r15,__THREAD_ksp(%r1)		# load kernel stack of next
193	mvc	__LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
194	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task
195	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
196	bzr	%r14
197	.insn	s,0xb2800000,__LC_LPP		# set program parameter
198	br	%r14
199
200.L__critical_start:
201
202#if IS_ENABLED(CONFIG_KVM)
203/*
204 * sie64a calling convention:
205 * %r2 pointer to sie control block
206 * %r3 guest register save area
207 */
208ENTRY(sie64a)
209	stmg	%r6,%r14,__SF_GPRS(%r15)	# save kernel registers
210	stg	%r2,__SF_EMPTY(%r15)		# save control block pointer
211	stg	%r3,__SF_EMPTY+8(%r15)		# save guest register save area
212	xc	__SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
213	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU		# load guest fp/vx registers ?
214	jno	.Lsie_load_guest_gprs
215	brasl	%r14,load_fpu_regs		# load guest fp/vx regs
216.Lsie_load_guest_gprs:
217	lmg	%r0,%r13,0(%r3)			# load guest gprs 0-13
218	lg	%r14,__LC_GMAP			# get gmap pointer
219	ltgr	%r14,%r14
220	jz	.Lsie_gmap
221	lctlg	%c1,%c1,__GMAP_ASCE(%r14)	# load primary asce
222.Lsie_gmap:
223	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
224	oi	__SIE_PROG0C+3(%r14),1		# we are going into SIE now
225	tm	__SIE_PROG20+3(%r14),3		# last exit...
226	jnz	.Lsie_skip
227	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
228	jo	.Lsie_skip			# exit if fp/vx regs changed
229.Lsie_entry:
230	sie	0(%r14)
231.Lsie_skip:
232	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
233	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
234.Lsie_done:
235# some program checks are suppressing. C code (e.g. do_protection_exception)
236# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
237# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
238# Other instructions between sie64a and .Lsie_done should not cause program
239# interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
240# See also .Lcleanup_sie
241.Lrewind_pad6:
242	nopr	7
243.Lrewind_pad4:
244	nopr	7
245.Lrewind_pad2:
246	nopr	7
247	.globl sie_exit
248sie_exit:
249	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area
250	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13
251	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers
252	lg	%r2,__SF_EMPTY+16(%r15)		# return exit reason code
253	br	%r14
254.Lsie_fault:
255	lghi	%r14,-EFAULT
256	stg	%r14,__SF_EMPTY+16(%r15)	# set exit reason code
257	j	sie_exit
258
259	EX_TABLE(.Lrewind_pad6,.Lsie_fault)
260	EX_TABLE(.Lrewind_pad4,.Lsie_fault)
261	EX_TABLE(.Lrewind_pad2,.Lsie_fault)
262	EX_TABLE(sie_exit,.Lsie_fault)
263EXPORT_SYMBOL(sie64a)
264EXPORT_SYMBOL(sie_exit)
265#endif
266
267/*
268 * SVC interrupt handler routine. System calls are synchronous events and
269 * are executed with interrupts enabled.
270 */
271
272ENTRY(system_call)
273	stpt	__LC_SYNC_ENTER_TIMER
274.Lsysc_stmg:
275	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
276	lg	%r12,__LC_CURRENT
277	lghi	%r13,__TASK_thread
278	lghi	%r14,_PIF_SYSCALL
279.Lsysc_per:
280	lg	%r15,__LC_KERNEL_STACK
281	la	%r11,STACK_FRAME_OVERHEAD(%r15)	# pointer to pt_regs
282.Lsysc_vtime:
283	UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
284	stmg	%r0,%r7,__PT_R0(%r11)
285	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
286	mvc	__PT_PSW(16,%r11),__LC_SVC_OLD_PSW
287	mvc	__PT_INT_CODE(4,%r11),__LC_SVC_ILC
288	stg	%r14,__PT_FLAGS(%r11)
289.Lsysc_do_svc:
290	# load address of system call table
291	lg	%r10,__THREAD_sysc_table(%r13,%r12)
292	llgh	%r8,__PT_INT_CODE+2(%r11)
293	slag	%r8,%r8,2			# shift and test for svc 0
294	jnz	.Lsysc_nr_ok
295	# svc 0: system call number in %r1
296	llgfr	%r1,%r1				# clear high word in r1
297	cghi	%r1,NR_syscalls
298	jnl	.Lsysc_nr_ok
299	sth	%r1,__PT_INT_CODE+2(%r11)
300	slag	%r8,%r1,2
301.Lsysc_nr_ok:
302	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
303	stg	%r2,__PT_ORIG_GPR2(%r11)
304	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
305	lgf	%r9,0(%r8,%r10)			# get system call add.
306	TSTMSK	__TI_flags(%r12),_TIF_TRACE
307	jnz	.Lsysc_tracesys
308	basr	%r14,%r9			# call sys_xxxx
309	stg	%r2,__PT_R2(%r11)		# store return value
310
311.Lsysc_return:
312	LOCKDEP_SYS_EXIT
313.Lsysc_tif:
314	TSTMSK	__PT_FLAGS(%r11),_PIF_WORK
315	jnz	.Lsysc_work
316	TSTMSK	__TI_flags(%r12),_TIF_WORK
317	jnz	.Lsysc_work			# check for work
318	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
319	jnz	.Lsysc_work
320.Lsysc_restore:
321	lg	%r14,__LC_VDSO_PER_CPU
322	lmg	%r0,%r10,__PT_R0(%r11)
323	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
324.Lsysc_exit_timer:
325	stpt	__LC_EXIT_TIMER
326	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
327	lmg	%r11,%r15,__PT_R11(%r11)
328	lpswe	__LC_RETURN_PSW
329.Lsysc_done:
330
331#
332# One of the work bits is on. Find out which one.
333#
334.Lsysc_work:
335	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
336	jo	.Lsysc_mcck_pending
337	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
338	jo	.Lsysc_reschedule
339	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
340	jo	.Lsysc_syscall_restart
341#ifdef CONFIG_UPROBES
342	TSTMSK	__TI_flags(%r12),_TIF_UPROBE
343	jo	.Lsysc_uprobe_notify
344#endif
345	TSTMSK	__TI_flags(%r12),_TIF_GUARDED_STORAGE
346	jo	.Lsysc_guarded_storage
347	TSTMSK	__PT_FLAGS(%r11),_PIF_PER_TRAP
348	jo	.Lsysc_singlestep
349#ifdef CONFIG_LIVEPATCH
350	TSTMSK	__TI_flags(%r12),_TIF_PATCH_PENDING
351	jo	.Lsysc_patch_pending	# handle live patching just before
352					# signals and possible syscall restart
353#endif
354	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
355	jo	.Lsysc_syscall_restart
356	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
357	jo	.Lsysc_sigpending
358	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
359	jo	.Lsysc_notify_resume
360	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
361	jo	.Lsysc_vxrs
362	TSTMSK	__LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
363	jnz	.Lsysc_asce
364	j	.Lsysc_return		# beware of critical section cleanup
365
366#
367# _TIF_NEED_RESCHED is set, call schedule
368#
369.Lsysc_reschedule:
370	larl	%r14,.Lsysc_return
371	jg	schedule
372
373#
374# _CIF_MCCK_PENDING is set, call handler
375#
376.Lsysc_mcck_pending:
377	larl	%r14,.Lsysc_return
378	jg	s390_handle_mcck	# TIF bit will be cleared by handler
379
380#
381# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
382#
383.Lsysc_asce:
384	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
385	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
386	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
387	jz	.Lsysc_return
388	larl	%r14,.Lsysc_return
389	jg	set_fs_fixup
390
391#
392# CIF_FPU is set, restore floating-point controls and floating-point registers.
393#
394.Lsysc_vxrs:
395	larl	%r14,.Lsysc_return
396	jg	load_fpu_regs
397
398#
399# _TIF_SIGPENDING is set, call do_signal
400#
401.Lsysc_sigpending:
402	lgr	%r2,%r11		# pass pointer to pt_regs
403	brasl	%r14,do_signal
404	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
405	jno	.Lsysc_return
406.Lsysc_do_syscall:
407	lghi	%r13,__TASK_thread
408	lmg	%r2,%r7,__PT_R2(%r11)	# load svc arguments
409	lghi	%r1,0			# svc 0 returns -ENOSYS
410	j	.Lsysc_do_svc
411
412#
413# _TIF_NOTIFY_RESUME is set, call do_notify_resume
414#
415.Lsysc_notify_resume:
416	lgr	%r2,%r11		# pass pointer to pt_regs
417	larl	%r14,.Lsysc_return
418	jg	do_notify_resume
419
420#
421# _TIF_UPROBE is set, call uprobe_notify_resume
422#
423#ifdef CONFIG_UPROBES
424.Lsysc_uprobe_notify:
425	lgr	%r2,%r11		# pass pointer to pt_regs
426	larl	%r14,.Lsysc_return
427	jg	uprobe_notify_resume
428#endif
429
430#
431# _TIF_GUARDED_STORAGE is set, call guarded_storage_load
432#
433.Lsysc_guarded_storage:
434	lgr	%r2,%r11		# pass pointer to pt_regs
435	larl	%r14,.Lsysc_return
436	jg	gs_load_bc_cb
437#
438# _TIF_PATCH_PENDING is set, call klp_update_patch_state
439#
440#ifdef CONFIG_LIVEPATCH
441.Lsysc_patch_pending:
442	lg	%r2,__LC_CURRENT	# pass pointer to task struct
443	larl	%r14,.Lsysc_return
444	jg	klp_update_patch_state
445#endif
446
447#
448# _PIF_PER_TRAP is set, call do_per_trap
449#
450.Lsysc_singlestep:
451	ni	__PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
452	lgr	%r2,%r11		# pass pointer to pt_regs
453	larl	%r14,.Lsysc_return
454	jg	do_per_trap
455
456#
457# _PIF_SYSCALL_RESTART is set, repeat the current system call
458#
459.Lsysc_syscall_restart:
460	ni	__PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
461	lmg	%r1,%r7,__PT_R1(%r11)	# load svc arguments
462	lg	%r2,__PT_ORIG_GPR2(%r11)
463	j	.Lsysc_do_svc
464
465#
466# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
467# and after the system call
468#
469.Lsysc_tracesys:
470	lgr	%r2,%r11		# pass pointer to pt_regs
471	la	%r3,0
472	llgh	%r0,__PT_INT_CODE+2(%r11)
473	stg	%r0,__PT_R2(%r11)
474	brasl	%r14,do_syscall_trace_enter
475	lghi	%r0,NR_syscalls
476	clgr	%r0,%r2
477	jnh	.Lsysc_tracenogo
478	sllg	%r8,%r2,2
479	lgf	%r9,0(%r8,%r10)
480.Lsysc_tracego:
481	lmg	%r3,%r7,__PT_R3(%r11)
482	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
483	lg	%r2,__PT_ORIG_GPR2(%r11)
484	basr	%r14,%r9		# call sys_xxx
485	stg	%r2,__PT_R2(%r11)	# store return value
486.Lsysc_tracenogo:
487	TSTMSK	__TI_flags(%r12),_TIF_TRACE
488	jz	.Lsysc_return
489	lgr	%r2,%r11		# pass pointer to pt_regs
490	larl	%r14,.Lsysc_return
491	jg	do_syscall_trace_exit
492
493#
494# a new process exits the kernel with ret_from_fork
495#
496ENTRY(ret_from_fork)
497	la	%r11,STACK_FRAME_OVERHEAD(%r15)
498	lg	%r12,__LC_CURRENT
499	brasl	%r14,schedule_tail
500	TRACE_IRQS_ON
501	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
502	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
503	jne	.Lsysc_tracenogo
504	# it's a kernel thread
505	lmg	%r9,%r10,__PT_R9(%r11)	# load gprs
506ENTRY(kernel_thread_starter)
507	la	%r2,0(%r10)
508	basr	%r14,%r9
509	j	.Lsysc_tracenogo
510
511/*
512 * Program check handler routine
513 */
514
515ENTRY(pgm_check_handler)
516	stpt	__LC_SYNC_ENTER_TIMER
517	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
518	lg	%r10,__LC_LAST_BREAK
519	lg	%r12,__LC_CURRENT
520	larl	%r13,cleanup_critical
521	lmg	%r8,%r9,__LC_PGM_OLD_PSW
522	tmhh	%r8,0x0001		# test problem state bit
523	jnz	2f			# -> fault in user space
524#if IS_ENABLED(CONFIG_KVM)
525	# cleanup critical section for program checks in sie64a
526	lgr	%r14,%r9
527	slg	%r14,BASED(.Lsie_critical_start)
528	clg	%r14,BASED(.Lsie_critical_length)
529	jhe	0f
530	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
531	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
532	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
533	larl	%r9,sie_exit			# skip forward to sie_exit
534#endif
5350:	tmhh	%r8,0x4000		# PER bit set in old PSW ?
536	jnz	1f			# -> enabled, can't be a double fault
537	tm	__LC_PGM_ILC+3,0x80	# check for per exception
538	jnz	.Lpgm_svcper		# -> single stepped svc
5391:	CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
540	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
541	j	4f
5422:	UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
543	lg	%r15,__LC_KERNEL_STACK
544	lgr	%r14,%r12
545	aghi	%r14,__TASK_thread	# pointer to thread_struct
546	lghi	%r13,__LC_PGM_TDB
547	tm	__LC_PGM_ILC+2,0x02	# check for transaction abort
548	jz	3f
549	mvc	__THREAD_trap_tdb(256,%r14),0(%r13)
5503:	stg	%r10,__THREAD_last_break(%r14)
5514:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
552	stmg	%r0,%r7,__PT_R0(%r11)
553	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
554	stmg	%r8,%r9,__PT_PSW(%r11)
555	mvc	__PT_INT_CODE(4,%r11),__LC_PGM_ILC
556	mvc	__PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
557	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
558	stg	%r10,__PT_ARGS(%r11)
559	tm	__LC_PGM_ILC+3,0x80	# check for per exception
560	jz	5f
561	tmhh	%r8,0x0001		# kernel per event ?
562	jz	.Lpgm_kprobe
563	oi	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
564	mvc	__THREAD_per_address(8,%r14),__LC_PER_ADDRESS
565	mvc	__THREAD_per_cause(2,%r14),__LC_PER_CODE
566	mvc	__THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
5675:	REENABLE_IRQS
568	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
569	larl	%r1,pgm_check_table
570	llgh	%r10,__PT_INT_CODE+2(%r11)
571	nill	%r10,0x007f
572	sll	%r10,2
573	je	.Lpgm_return
574	lgf	%r1,0(%r10,%r1)		# load address of handler routine
575	lgr	%r2,%r11		# pass pointer to pt_regs
576	basr	%r14,%r1		# branch to interrupt-handler
577.Lpgm_return:
578	LOCKDEP_SYS_EXIT
579	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
580	jno	.Lsysc_restore
581	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
582	jo	.Lsysc_do_syscall
583	j	.Lsysc_tif
584
585#
586# PER event in supervisor state, must be kprobes
587#
588.Lpgm_kprobe:
589	REENABLE_IRQS
590	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
591	lgr	%r2,%r11		# pass pointer to pt_regs
592	brasl	%r14,do_per_trap
593	j	.Lpgm_return
594
595#
596# single stepped system call
597#
598.Lpgm_svcper:
599	mvc	__LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
600	lghi	%r13,__TASK_thread
601	larl	%r14,.Lsysc_per
602	stg	%r14,__LC_RETURN_PSW+8
603	lghi	%r14,_PIF_SYSCALL | _PIF_PER_TRAP
604	lpswe	__LC_RETURN_PSW		# branch to .Lsysc_per and enable irqs
605
606/*
607 * IO interrupt handler routine
608 */
609ENTRY(io_int_handler)
610	STCK	__LC_INT_CLOCK
611	stpt	__LC_ASYNC_ENTER_TIMER
612	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
613	lg	%r12,__LC_CURRENT
614	larl	%r13,cleanup_critical
615	lmg	%r8,%r9,__LC_IO_OLD_PSW
616	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
617	stmg	%r0,%r7,__PT_R0(%r11)
618	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
619	stmg	%r8,%r9,__PT_PSW(%r11)
620	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
621	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
622	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
623	jo	.Lio_restore
624	TRACE_IRQS_OFF
625	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
626.Lio_loop:
627	lgr	%r2,%r11		# pass pointer to pt_regs
628	lghi	%r3,IO_INTERRUPT
629	tm	__PT_INT_CODE+8(%r11),0x80	# adapter interrupt ?
630	jz	.Lio_call
631	lghi	%r3,THIN_INTERRUPT
632.Lio_call:
633	brasl	%r14,do_IRQ
634	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
635	jz	.Lio_return
636	tpi	0
637	jz	.Lio_return
638	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
639	j	.Lio_loop
640.Lio_return:
641	LOCKDEP_SYS_EXIT
642	TRACE_IRQS_ON
643.Lio_tif:
644	TSTMSK	__TI_flags(%r12),_TIF_WORK
645	jnz	.Lio_work		# there is work to do (signals etc.)
646	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
647	jnz	.Lio_work
648.Lio_restore:
649	lg	%r14,__LC_VDSO_PER_CPU
650	lmg	%r0,%r10,__PT_R0(%r11)
651	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
652.Lio_exit_timer:
653	stpt	__LC_EXIT_TIMER
654	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
655	lmg	%r11,%r15,__PT_R11(%r11)
656	lpswe	__LC_RETURN_PSW
657.Lio_done:
658
659#
660# There is work todo, find out in which context we have been interrupted:
661# 1) if we return to user space we can do all _TIF_WORK work
662# 2) if we return to kernel code and kvm is enabled check if we need to
663#    modify the psw to leave SIE
664# 3) if we return to kernel code and preemptive scheduling is enabled check
665#    the preemption counter and if it is zero call preempt_schedule_irq
666# Before any work can be done, a switch to the kernel stack is required.
667#
668.Lio_work:
669	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
670	jo	.Lio_work_user		# yes -> do resched & signal
671#ifdef CONFIG_PREEMPT
672	# check for preemptive scheduling
673	icm	%r0,15,__LC_PREEMPT_COUNT
674	jnz	.Lio_restore		# preemption is disabled
675	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
676	jno	.Lio_restore
677	# switch to kernel stack
678	lg	%r1,__PT_R15(%r11)
679	aghi	%r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
680	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
681	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
682	la	%r11,STACK_FRAME_OVERHEAD(%r1)
683	lgr	%r15,%r1
684	# TRACE_IRQS_ON already done at .Lio_return, call
685	# TRACE_IRQS_OFF to keep things symmetrical
686	TRACE_IRQS_OFF
687	brasl	%r14,preempt_schedule_irq
688	j	.Lio_return
689#else
690	j	.Lio_restore
691#endif
692
693#
694# Need to do work before returning to userspace, switch to kernel stack
695#
696.Lio_work_user:
697	lg	%r1,__LC_KERNEL_STACK
698	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
699	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
700	la	%r11,STACK_FRAME_OVERHEAD(%r1)
701	lgr	%r15,%r1
702
703#
704# One of the work bits is on. Find out which one.
705#
706.Lio_work_tif:
707	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
708	jo	.Lio_mcck_pending
709	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
710	jo	.Lio_reschedule
711#ifdef CONFIG_LIVEPATCH
712	TSTMSK	__TI_flags(%r12),_TIF_PATCH_PENDING
713	jo	.Lio_patch_pending
714#endif
715	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
716	jo	.Lio_sigpending
717	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
718	jo	.Lio_notify_resume
719	TSTMSK	__TI_flags(%r12),_TIF_GUARDED_STORAGE
720	jo	.Lio_guarded_storage
721	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
722	jo	.Lio_vxrs
723	TSTMSK	__LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
724	jnz	.Lio_asce
725	j	.Lio_return		# beware of critical section cleanup
726
727#
728# _CIF_MCCK_PENDING is set, call handler
729#
730.Lio_mcck_pending:
731	# TRACE_IRQS_ON already done at .Lio_return
732	brasl	%r14,s390_handle_mcck	# TIF bit will be cleared by handler
733	TRACE_IRQS_OFF
734	j	.Lio_return
735
736#
737# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
738#
739.Lio_asce:
740	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
741	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
742	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
743	jz	.Lio_return
744	larl	%r14,.Lio_return
745	jg	set_fs_fixup
746
747#
748# CIF_FPU is set, restore floating-point controls and floating-point registers.
749#
750.Lio_vxrs:
751	larl	%r14,.Lio_return
752	jg	load_fpu_regs
753
754#
755# _TIF_GUARDED_STORAGE is set, call guarded_storage_load
756#
757.Lio_guarded_storage:
758	# TRACE_IRQS_ON already done at .Lio_return
759	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
760	lgr	%r2,%r11		# pass pointer to pt_regs
761	brasl	%r14,gs_load_bc_cb
762	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
763	TRACE_IRQS_OFF
764	j	.Lio_return
765
766#
767# _TIF_NEED_RESCHED is set, call schedule
768#
769.Lio_reschedule:
770	# TRACE_IRQS_ON already done at .Lio_return
771	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
772	brasl	%r14,schedule		# call scheduler
773	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
774	TRACE_IRQS_OFF
775	j	.Lio_return
776
777#
778# _TIF_PATCH_PENDING is set, call klp_update_patch_state
779#
780#ifdef CONFIG_LIVEPATCH
781.Lio_patch_pending:
782	lg	%r2,__LC_CURRENT	# pass pointer to task struct
783	larl	%r14,.Lio_return
784	jg	klp_update_patch_state
785#endif
786
787#
788# _TIF_SIGPENDING or is set, call do_signal
789#
790.Lio_sigpending:
791	# TRACE_IRQS_ON already done at .Lio_return
792	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
793	lgr	%r2,%r11		# pass pointer to pt_regs
794	brasl	%r14,do_signal
795	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
796	TRACE_IRQS_OFF
797	j	.Lio_return
798
799#
800# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
801#
802.Lio_notify_resume:
803	# TRACE_IRQS_ON already done at .Lio_return
804	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
805	lgr	%r2,%r11		# pass pointer to pt_regs
806	brasl	%r14,do_notify_resume
807	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
808	TRACE_IRQS_OFF
809	j	.Lio_return
810
811/*
812 * External interrupt handler routine
813 */
814ENTRY(ext_int_handler)
815	STCK	__LC_INT_CLOCK
816	stpt	__LC_ASYNC_ENTER_TIMER
817	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
818	lg	%r12,__LC_CURRENT
819	larl	%r13,cleanup_critical
820	lmg	%r8,%r9,__LC_EXT_OLD_PSW
821	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
822	stmg	%r0,%r7,__PT_R0(%r11)
823	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
824	stmg	%r8,%r9,__PT_PSW(%r11)
825	lghi	%r1,__LC_EXT_PARAMS2
826	mvc	__PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
827	mvc	__PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
828	mvc	__PT_INT_PARM_LONG(8,%r11),0(%r1)
829	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
830	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
831	jo	.Lio_restore
832	TRACE_IRQS_OFF
833	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
834	lgr	%r2,%r11		# pass pointer to pt_regs
835	lghi	%r3,EXT_INTERRUPT
836	brasl	%r14,do_IRQ
837	j	.Lio_return
838
839/*
840 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
841 */
842ENTRY(psw_idle)
843	stg	%r3,__SF_EMPTY(%r15)
844	larl	%r1,.Lpsw_idle_lpsw+4
845	stg	%r1,__SF_EMPTY+8(%r15)
846#ifdef CONFIG_SMP
847	larl	%r1,smp_cpu_mtid
848	llgf	%r1,0(%r1)
849	ltgr	%r1,%r1
850	jz	.Lpsw_idle_stcctm
851	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
852.Lpsw_idle_stcctm:
853#endif
854	oi	__LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
855	STCK	__CLOCK_IDLE_ENTER(%r2)
856	stpt	__TIMER_IDLE_ENTER(%r2)
857.Lpsw_idle_lpsw:
858	lpswe	__SF_EMPTY(%r15)
859	br	%r14
860.Lpsw_idle_end:
861
862/*
863 * Store floating-point controls and floating-point or vector register
864 * depending whether the vector facility is available.	A critical section
865 * cleanup assures that the registers are stored even if interrupted for
866 * some other work.  The CIF_FPU flag is set to trigger a lazy restore
867 * of the register contents at return from io or a system call.
868 */
869ENTRY(save_fpu_regs)
870	lg	%r2,__LC_CURRENT
871	aghi	%r2,__TASK_thread
872	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
873	bor	%r14
874	stfpc	__THREAD_FPU_fpc(%r2)
875	lg	%r3,__THREAD_FPU_regs(%r2)
876	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
877	jz	.Lsave_fpu_regs_fp	  # no -> store FP regs
878	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
879	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
880	j	.Lsave_fpu_regs_done	  # -> set CIF_FPU flag
881.Lsave_fpu_regs_fp:
882	std	0,0(%r3)
883	std	1,8(%r3)
884	std	2,16(%r3)
885	std	3,24(%r3)
886	std	4,32(%r3)
887	std	5,40(%r3)
888	std	6,48(%r3)
889	std	7,56(%r3)
890	std	8,64(%r3)
891	std	9,72(%r3)
892	std	10,80(%r3)
893	std	11,88(%r3)
894	std	12,96(%r3)
895	std	13,104(%r3)
896	std	14,112(%r3)
897	std	15,120(%r3)
898.Lsave_fpu_regs_done:
899	oi	__LC_CPU_FLAGS+7,_CIF_FPU
900	br	%r14
901.Lsave_fpu_regs_end:
902EXPORT_SYMBOL(save_fpu_regs)
903
904/*
905 * Load floating-point controls and floating-point or vector registers.
906 * A critical section cleanup assures that the register contents are
907 * loaded even if interrupted for some other work.
908 *
909 * There are special calling conventions to fit into sysc and io return work:
910 *	%r15:	<kernel stack>
911 * The function requires:
912 *	%r4
913 */
914load_fpu_regs:
915	lg	%r4,__LC_CURRENT
916	aghi	%r4,__TASK_thread
917	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
918	bnor	%r14
919	lfpc	__THREAD_FPU_fpc(%r4)
920	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
921	lg	%r4,__THREAD_FPU_regs(%r4)	# %r4 <- reg save area
922	jz	.Lload_fpu_regs_fp		# -> no VX, load FP regs
923	VLM	%v0,%v15,0,%r4
924	VLM	%v16,%v31,256,%r4
925	j	.Lload_fpu_regs_done
926.Lload_fpu_regs_fp:
927	ld	0,0(%r4)
928	ld	1,8(%r4)
929	ld	2,16(%r4)
930	ld	3,24(%r4)
931	ld	4,32(%r4)
932	ld	5,40(%r4)
933	ld	6,48(%r4)
934	ld	7,56(%r4)
935	ld	8,64(%r4)
936	ld	9,72(%r4)
937	ld	10,80(%r4)
938	ld	11,88(%r4)
939	ld	12,96(%r4)
940	ld	13,104(%r4)
941	ld	14,112(%r4)
942	ld	15,120(%r4)
943.Lload_fpu_regs_done:
944	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
945	br	%r14
946.Lload_fpu_regs_end:
947
948.L__critical_end:
949
950/*
951 * Machine check handler routines
952 */
953ENTRY(mcck_int_handler)
954	STCK	__LC_MCCK_CLOCK
955	la	%r1,4095		# revalidate r1
956	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# revalidate cpu timer
957	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
958	lg	%r12,__LC_CURRENT
959	larl	%r13,cleanup_critical
960	lmg	%r8,%r9,__LC_MCK_OLD_PSW
961	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
962	jo	.Lmcck_panic		# yes -> rest of mcck code invalid
963	lghi	%r14,__LC_CPU_TIMER_SAVE_AREA
964	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
965	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
966	jo	3f
967	la	%r14,__LC_SYNC_ENTER_TIMER
968	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
969	jl	0f
970	la	%r14,__LC_ASYNC_ENTER_TIMER
9710:	clc	0(8,%r14),__LC_EXIT_TIMER
972	jl	1f
973	la	%r14,__LC_EXIT_TIMER
9741:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
975	jl	2f
976	la	%r14,__LC_LAST_UPDATE_TIMER
9772:	spt	0(%r14)
978	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
9793:	TSTMSK	__LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
980	jno	.Lmcck_panic		# no -> skip cleanup critical
981	SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
982.Lmcck_skip:
983	lghi	%r14,__LC_GPREGS_SAVE_AREA+64
984	stmg	%r0,%r7,__PT_R0(%r11)
985	mvc	__PT_R8(64,%r11),0(%r14)
986	stmg	%r8,%r9,__PT_PSW(%r11)
987	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
988	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
989	lgr	%r2,%r11		# pass pointer to pt_regs
990	brasl	%r14,s390_do_machine_check
991	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
992	jno	.Lmcck_return
993	lg	%r1,__LC_KERNEL_STACK	# switch to kernel stack
994	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
995	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
996	la	%r11,STACK_FRAME_OVERHEAD(%r1)
997	lgr	%r15,%r1
998	ssm	__LC_PGM_NEW_PSW	# turn dat on, keep irqs off
999	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
1000	jno	.Lmcck_return
1001	TRACE_IRQS_OFF
1002	brasl	%r14,s390_handle_mcck
1003	TRACE_IRQS_ON
1004.Lmcck_return:
1005	lg	%r14,__LC_VDSO_PER_CPU
1006	lmg	%r0,%r10,__PT_R0(%r11)
1007	mvc	__LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1008	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1009	jno	0f
1010	stpt	__LC_EXIT_TIMER
1011	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
10120:	lmg	%r11,%r15,__PT_R11(%r11)
1013	lpswe	__LC_RETURN_MCCK_PSW
1014
1015.Lmcck_panic:
1016	lg	%r15,__LC_PANIC_STACK
1017	la	%r11,STACK_FRAME_OVERHEAD(%r15)
1018	j	.Lmcck_skip
1019
1020#
1021# PSW restart interrupt handler
1022#
1023ENTRY(restart_int_handler)
1024	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1025	jz	0f
1026	.insn	s,0xb2800000,__LC_LPP
10270:	stg	%r15,__LC_SAVE_AREA_RESTART
1028	lg	%r15,__LC_RESTART_STACK
1029	aghi	%r15,-__PT_SIZE			# create pt_regs on stack
1030	xc	0(__PT_SIZE,%r15),0(%r15)
1031	stmg	%r0,%r14,__PT_R0(%r15)
1032	mvc	__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1033	mvc	__PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1034	aghi	%r15,-STACK_FRAME_OVERHEAD	# create stack frame on stack
1035	xc	0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1036	lg	%r1,__LC_RESTART_FN		# load fn, parm & source cpu
1037	lg	%r2,__LC_RESTART_DATA
1038	lg	%r3,__LC_RESTART_SOURCE
1039	ltgr	%r3,%r3				# test source cpu address
1040	jm	1f				# negative -> skip source stop
10410:	sigp	%r4,%r3,SIGP_SENSE		# sigp sense to source cpu
1042	brc	10,0b				# wait for status stored
10431:	basr	%r14,%r1			# call function
1044	stap	__SF_EMPTY(%r15)		# store cpu address
1045	llgh	%r3,__SF_EMPTY(%r15)
10462:	sigp	%r4,%r3,SIGP_STOP		# sigp stop to current cpu
1047	brc	2,2b
10483:	j	3b
1049
1050	.section .kprobes.text, "ax"
1051
1052#ifdef CONFIG_CHECK_STACK
1053/*
1054 * The synchronous or the asynchronous stack overflowed. We are dead.
1055 * No need to properly save the registers, we are going to panic anyway.
1056 * Setup a pt_regs so that show_trace can provide a good call trace.
1057 */
1058stack_overflow:
1059	lg	%r15,__LC_PANIC_STACK	# change to panic stack
1060	la	%r11,STACK_FRAME_OVERHEAD(%r15)
1061	stmg	%r0,%r7,__PT_R0(%r11)
1062	stmg	%r8,%r9,__PT_PSW(%r11)
1063	mvc	__PT_R8(64,%r11),0(%r14)
1064	stg	%r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1065	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1066	lgr	%r2,%r11		# pass pointer to pt_regs
1067	jg	kernel_stack_overflow
1068#endif
1069
1070cleanup_critical:
1071#if IS_ENABLED(CONFIG_KVM)
1072	clg	%r9,BASED(.Lcleanup_table_sie)	# .Lsie_gmap
1073	jl	0f
1074	clg	%r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1075	jl	.Lcleanup_sie
1076#endif
1077	clg	%r9,BASED(.Lcleanup_table)	# system_call
1078	jl	0f
1079	clg	%r9,BASED(.Lcleanup_table+8)	# .Lsysc_do_svc
1080	jl	.Lcleanup_system_call
1081	clg	%r9,BASED(.Lcleanup_table+16)	# .Lsysc_tif
1082	jl	0f
1083	clg	%r9,BASED(.Lcleanup_table+24)	# .Lsysc_restore
1084	jl	.Lcleanup_sysc_tif
1085	clg	%r9,BASED(.Lcleanup_table+32)	# .Lsysc_done
1086	jl	.Lcleanup_sysc_restore
1087	clg	%r9,BASED(.Lcleanup_table+40)	# .Lio_tif
1088	jl	0f
1089	clg	%r9,BASED(.Lcleanup_table+48)	# .Lio_restore
1090	jl	.Lcleanup_io_tif
1091	clg	%r9,BASED(.Lcleanup_table+56)	# .Lio_done
1092	jl	.Lcleanup_io_restore
1093	clg	%r9,BASED(.Lcleanup_table+64)	# psw_idle
1094	jl	0f
1095	clg	%r9,BASED(.Lcleanup_table+72)	# .Lpsw_idle_end
1096	jl	.Lcleanup_idle
1097	clg	%r9,BASED(.Lcleanup_table+80)	# save_fpu_regs
1098	jl	0f
1099	clg	%r9,BASED(.Lcleanup_table+88)	# .Lsave_fpu_regs_end
1100	jl	.Lcleanup_save_fpu_regs
1101	clg	%r9,BASED(.Lcleanup_table+96)	# load_fpu_regs
1102	jl	0f
1103	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
1104	jl	.Lcleanup_load_fpu_regs
11050:	br	%r14
1106
1107	.align	8
1108.Lcleanup_table:
1109	.quad	system_call
1110	.quad	.Lsysc_do_svc
1111	.quad	.Lsysc_tif
1112	.quad	.Lsysc_restore
1113	.quad	.Lsysc_done
1114	.quad	.Lio_tif
1115	.quad	.Lio_restore
1116	.quad	.Lio_done
1117	.quad	psw_idle
1118	.quad	.Lpsw_idle_end
1119	.quad	save_fpu_regs
1120	.quad	.Lsave_fpu_regs_end
1121	.quad	load_fpu_regs
1122	.quad	.Lload_fpu_regs_end
1123
1124#if IS_ENABLED(CONFIG_KVM)
1125.Lcleanup_table_sie:
1126	.quad	.Lsie_gmap
1127	.quad	.Lsie_done
1128
1129.Lcleanup_sie:
1130	cghi    %r11,__LC_SAVE_AREA_ASYNC 	#Is this in normal interrupt?
1131	je      1f
1132	slg     %r9,BASED(.Lsie_crit_mcck_start)
1133	clg     %r9,BASED(.Lsie_crit_mcck_length)
1134	jh      1f
1135	oi      __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
11361:	lg	%r9,__SF_EMPTY(%r15)		# get control block pointer
1137	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
1138	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
1139	larl	%r9,sie_exit			# skip forward to sie_exit
1140	br	%r14
1141#endif
1142
1143.Lcleanup_system_call:
1144	# check if stpt has been executed
1145	clg	%r9,BASED(.Lcleanup_system_call_insn)
1146	jh	0f
1147	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1148	cghi	%r11,__LC_SAVE_AREA_ASYNC
1149	je	0f
1150	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
11510:	# check if stmg has been executed
1152	clg	%r9,BASED(.Lcleanup_system_call_insn+8)
1153	jh	0f
1154	mvc	__LC_SAVE_AREA_SYNC(64),0(%r11)
11550:	# check if base register setup + TIF bit load has been done
1156	clg	%r9,BASED(.Lcleanup_system_call_insn+16)
1157	jhe	0f
1158	# set up saved register r12 task struct pointer
1159	stg	%r12,32(%r11)
1160	# set up saved register r13 __TASK_thread offset
1161	mvc	40(8,%r11),BASED(.Lcleanup_system_call_const)
11620:	# check if the user time update has been done
1163	clg	%r9,BASED(.Lcleanup_system_call_insn+24)
1164	jh	0f
1165	lg	%r15,__LC_EXIT_TIMER
1166	slg	%r15,__LC_SYNC_ENTER_TIMER
1167	alg	%r15,__LC_USER_TIMER
1168	stg	%r15,__LC_USER_TIMER
11690:	# check if the system time update has been done
1170	clg	%r9,BASED(.Lcleanup_system_call_insn+32)
1171	jh	0f
1172	lg	%r15,__LC_LAST_UPDATE_TIMER
1173	slg	%r15,__LC_EXIT_TIMER
1174	alg	%r15,__LC_SYSTEM_TIMER
1175	stg	%r15,__LC_SYSTEM_TIMER
11760:	# update accounting time stamp
1177	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1178	# set up saved register r11
1179	lg	%r15,__LC_KERNEL_STACK
1180	la	%r9,STACK_FRAME_OVERHEAD(%r15)
1181	stg	%r9,24(%r11)		# r11 pt_regs pointer
1182	# fill pt_regs
1183	mvc	__PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1184	stmg	%r0,%r7,__PT_R0(%r9)
1185	mvc	__PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1186	mvc	__PT_INT_CODE(4,%r9),__LC_SVC_ILC
1187	xc	__PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1188	mvi	__PT_FLAGS+7(%r9),_PIF_SYSCALL
1189	# setup saved register r15
1190	stg	%r15,56(%r11)		# r15 stack pointer
1191	# set new psw address and exit
1192	larl	%r9,.Lsysc_do_svc
1193	br	%r14
1194.Lcleanup_system_call_insn:
1195	.quad	system_call
1196	.quad	.Lsysc_stmg
1197	.quad	.Lsysc_per
1198	.quad	.Lsysc_vtime+36
1199	.quad	.Lsysc_vtime+42
1200.Lcleanup_system_call_const:
1201	.quad	__TASK_thread
1202
1203.Lcleanup_sysc_tif:
1204	larl	%r9,.Lsysc_tif
1205	br	%r14
1206
1207.Lcleanup_sysc_restore:
1208	# check if stpt has been executed
1209	clg	%r9,BASED(.Lcleanup_sysc_restore_insn)
1210	jh	0f
1211	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1212	cghi	%r11,__LC_SAVE_AREA_ASYNC
1213	je	0f
1214	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
12150:	clg	%r9,BASED(.Lcleanup_sysc_restore_insn+8)
1216	je	1f
1217	lg	%r9,24(%r11)		# get saved pointer to pt_regs
1218	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1219	mvc	0(64,%r11),__PT_R8(%r9)
1220	lmg	%r0,%r7,__PT_R0(%r9)
12211:	lmg	%r8,%r9,__LC_RETURN_PSW
1222	br	%r14
1223.Lcleanup_sysc_restore_insn:
1224	.quad	.Lsysc_exit_timer
1225	.quad	.Lsysc_done - 4
1226
1227.Lcleanup_io_tif:
1228	larl	%r9,.Lio_tif
1229	br	%r14
1230
1231.Lcleanup_io_restore:
1232	# check if stpt has been executed
1233	clg	%r9,BASED(.Lcleanup_io_restore_insn)
1234	jh	0f
1235	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
12360:	clg	%r9,BASED(.Lcleanup_io_restore_insn+8)
1237	je	1f
1238	lg	%r9,24(%r11)		# get saved r11 pointer to pt_regs
1239	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1240	mvc	0(64,%r11),__PT_R8(%r9)
1241	lmg	%r0,%r7,__PT_R0(%r9)
12421:	lmg	%r8,%r9,__LC_RETURN_PSW
1243	br	%r14
1244.Lcleanup_io_restore_insn:
1245	.quad	.Lio_exit_timer
1246	.quad	.Lio_done - 4
1247
1248.Lcleanup_idle:
1249	ni	__LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1250	# copy interrupt clock & cpu timer
1251	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1252	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1253	cghi	%r11,__LC_SAVE_AREA_ASYNC
1254	je	0f
1255	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1256	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
12570:	# check if stck & stpt have been executed
1258	clg	%r9,BASED(.Lcleanup_idle_insn)
1259	jhe	1f
1260	mvc	__CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1261	mvc	__TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
12621:	# calculate idle cycles
1263#ifdef CONFIG_SMP
1264	clg	%r9,BASED(.Lcleanup_idle_insn)
1265	jl	3f
1266	larl	%r1,smp_cpu_mtid
1267	llgf	%r1,0(%r1)
1268	ltgr	%r1,%r1
1269	jz	3f
1270	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1271	larl	%r3,mt_cycles
1272	ag	%r3,__LC_PERCPU_OFFSET
1273	la	%r4,__SF_EMPTY+16(%r15)
12742:	lg	%r0,0(%r3)
1275	slg	%r0,0(%r4)
1276	alg	%r0,64(%r4)
1277	stg	%r0,0(%r3)
1278	la	%r3,8(%r3)
1279	la	%r4,8(%r4)
1280	brct	%r1,2b
1281#endif
12823:	# account system time going idle
1283	lg	%r9,__LC_STEAL_TIMER
1284	alg	%r9,__CLOCK_IDLE_ENTER(%r2)
1285	slg	%r9,__LC_LAST_UPDATE_CLOCK
1286	stg	%r9,__LC_STEAL_TIMER
1287	mvc	__LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1288	lg	%r9,__LC_SYSTEM_TIMER
1289	alg	%r9,__LC_LAST_UPDATE_TIMER
1290	slg	%r9,__TIMER_IDLE_ENTER(%r2)
1291	stg	%r9,__LC_SYSTEM_TIMER
1292	mvc	__LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1293	# prepare return psw
1294	nihh	%r8,0xfcfd		# clear irq & wait state bits
1295	lg	%r9,48(%r11)		# return from psw_idle
1296	br	%r14
1297.Lcleanup_idle_insn:
1298	.quad	.Lpsw_idle_lpsw
1299
1300.Lcleanup_save_fpu_regs:
1301	larl	%r9,save_fpu_regs
1302	br	%r14
1303
1304.Lcleanup_load_fpu_regs:
1305	larl	%r9,load_fpu_regs
1306	br	%r14
1307
1308/*
1309 * Integer constants
1310 */
1311	.align	8
1312.Lcritical_start:
1313	.quad	.L__critical_start
1314.Lcritical_length:
1315	.quad	.L__critical_end - .L__critical_start
1316#if IS_ENABLED(CONFIG_KVM)
1317.Lsie_critical_start:
1318	.quad	.Lsie_gmap
1319.Lsie_critical_length:
1320	.quad	.Lsie_done - .Lsie_gmap
1321.Lsie_crit_mcck_start:
1322	.quad   .Lsie_entry
1323.Lsie_crit_mcck_length:
1324	.quad   .Lsie_skip - .Lsie_entry
1325#endif
1326
1327	.section .rodata, "a"
1328#define SYSCALL(esame,emu)	.long esame
1329	.globl	sys_call_table
1330sys_call_table:
1331#include "syscalls.S"
1332#undef SYSCALL
1333
1334#ifdef CONFIG_COMPAT
1335
1336#define SYSCALL(esame,emu)	.long emu
1337	.globl	sys_call_table_emu
1338sys_call_table_emu:
1339#include "syscalls.S"
1340#undef SYSCALL
1341#endif
1342