1/* 2 * S390 low-level entry points. 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 6 * Hartmut Penner (hp@de.ibm.com), 7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 8 * Heiko Carstens <heiko.carstens@de.ibm.com> 9 */ 10 11#include <linux/init.h> 12#include <linux/linkage.h> 13#include <asm/processor.h> 14#include <asm/cache.h> 15#include <asm/errno.h> 16#include <asm/ptrace.h> 17#include <asm/thread_info.h> 18#include <asm/asm-offsets.h> 19#include <asm/unistd.h> 20#include <asm/page.h> 21#include <asm/sigp.h> 22#include <asm/irq.h> 23#include <asm/vx-insn.h> 24#include <asm/setup.h> 25#include <asm/nmi.h> 26#include <asm/export.h> 27 28__PT_R0 = __PT_GPRS 29__PT_R1 = __PT_GPRS + 8 30__PT_R2 = __PT_GPRS + 16 31__PT_R3 = __PT_GPRS + 24 32__PT_R4 = __PT_GPRS + 32 33__PT_R5 = __PT_GPRS + 40 34__PT_R6 = __PT_GPRS + 48 35__PT_R7 = __PT_GPRS + 56 36__PT_R8 = __PT_GPRS + 64 37__PT_R9 = __PT_GPRS + 72 38__PT_R10 = __PT_GPRS + 80 39__PT_R11 = __PT_GPRS + 88 40__PT_R12 = __PT_GPRS + 96 41__PT_R13 = __PT_GPRS + 104 42__PT_R14 = __PT_GPRS + 112 43__PT_R15 = __PT_GPRS + 120 44 45STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER 46STACK_SIZE = 1 << STACK_SHIFT 47STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE 48 49_TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 50 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING) 51_TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ 52 _TIF_SYSCALL_TRACEPOINT) 53_CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \ 54 _CIF_ASCE_SECONDARY | _CIF_FPU) 55_PIF_WORK = (_PIF_PER_TRAP) 56 57#define BASED(name) name-cleanup_critical(%r13) 58 59 .macro TRACE_IRQS_ON 60#ifdef CONFIG_TRACE_IRQFLAGS 61 basr %r2,%r0 62 brasl %r14,trace_hardirqs_on_caller 63#endif 64 .endm 65 66 .macro TRACE_IRQS_OFF 67#ifdef CONFIG_TRACE_IRQFLAGS 68 basr %r2,%r0 69 brasl %r14,trace_hardirqs_off_caller 70#endif 71 .endm 72 73 .macro LOCKDEP_SYS_EXIT 74#ifdef CONFIG_LOCKDEP 75 tm __PT_PSW+1(%r11),0x01 # returning to user ? 76 jz .+10 77 brasl %r14,lockdep_sys_exit 78#endif 79 .endm 80 81 .macro CHECK_STACK stacksize,savearea 82#ifdef CONFIG_CHECK_STACK 83 tml %r15,\stacksize - CONFIG_STACK_GUARD 84 lghi %r14,\savearea 85 jz stack_overflow 86#endif 87 .endm 88 89 .macro SWITCH_ASYNC savearea,timer 90 tmhh %r8,0x0001 # interrupting from user ? 91 jnz 1f 92 lgr %r14,%r9 93 slg %r14,BASED(.Lcritical_start) 94 clg %r14,BASED(.Lcritical_length) 95 jhe 0f 96 lghi %r11,\savearea # inside critical section, do cleanup 97 brasl %r14,cleanup_critical 98 tmhh %r8,0x0001 # retest problem state after cleanup 99 jnz 1f 1000: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? 101 slgr %r14,%r15 102 srag %r14,%r14,STACK_SHIFT 103 jnz 2f 104 CHECK_STACK 1<<STACK_SHIFT,\savearea 105 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 106 j 3f 1071: UPDATE_VTIME %r14,%r15,\timer 1082: lg %r15,__LC_ASYNC_STACK # load async stack 1093: la %r11,STACK_FRAME_OVERHEAD(%r15) 110 .endm 111 112 .macro UPDATE_VTIME w1,w2,enter_timer 113 lg \w1,__LC_EXIT_TIMER 114 lg \w2,__LC_LAST_UPDATE_TIMER 115 slg \w1,\enter_timer 116 slg \w2,__LC_EXIT_TIMER 117 alg \w1,__LC_USER_TIMER 118 alg \w2,__LC_SYSTEM_TIMER 119 stg \w1,__LC_USER_TIMER 120 stg \w2,__LC_SYSTEM_TIMER 121 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer 122 .endm 123 124 .macro REENABLE_IRQS 125 stg %r8,__LC_RETURN_PSW 126 ni __LC_RETURN_PSW,0xbf 127 ssm __LC_RETURN_PSW 128 .endm 129 130 .macro STCK savearea 131#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES 132 .insn s,0xb27c0000,\savearea # store clock fast 133#else 134 .insn s,0xb2050000,\savearea # store clock 135#endif 136 .endm 137 138 /* 139 * The TSTMSK macro generates a test-under-mask instruction by 140 * calculating the memory offset for the specified mask value. 141 * Mask value can be any constant. The macro shifts the mask 142 * value to calculate the memory offset for the test-under-mask 143 * instruction. 144 */ 145 .macro TSTMSK addr, mask, size=8, bytepos=0 146 .if (\bytepos < \size) && (\mask >> 8) 147 .if (\mask & 0xff) 148 .error "Mask exceeds byte boundary" 149 .endif 150 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" 151 .exitm 152 .endif 153 .ifeq \mask 154 .error "Mask must not be zero" 155 .endif 156 off = \size - \bytepos - 1 157 tm off+\addr, \mask 158 .endm 159 160 .section .kprobes.text, "ax" 161.Ldummy: 162 /* 163 * This nop exists only in order to avoid that __switch_to starts at 164 * the beginning of the kprobes text section. In that case we would 165 * have several symbols at the same address. E.g. objdump would take 166 * an arbitrary symbol name when disassembling this code. 167 * With the added nop in between the __switch_to symbol is unique 168 * again. 169 */ 170 nop 0 171 172/* 173 * Scheduler resume function, called by switch_to 174 * gpr2 = (task_struct *) prev 175 * gpr3 = (task_struct *) next 176 * Returns: 177 * gpr2 = prev 178 */ 179ENTRY(__switch_to) 180 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task 181 lgr %r1,%r2 182 aghi %r1,__TASK_thread # thread_struct of prev task 183 lg %r5,__TASK_stack(%r3) # start of kernel stack of next 184 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev 185 lgr %r1,%r3 186 aghi %r1,__TASK_thread # thread_struct of next task 187 lgr %r15,%r5 188 aghi %r15,STACK_INIT # end of kernel stack of next 189 stg %r3,__LC_CURRENT # store task struct of next 190 stg %r15,__LC_KERNEL_STACK # store end of kernel stack 191 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next 192 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next 193 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task 194 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 195 bzr %r14 196 .insn s,0xb2800000,__LC_LPP # set program parameter 197 br %r14 198 199.L__critical_start: 200 201#if IS_ENABLED(CONFIG_KVM) 202/* 203 * sie64a calling convention: 204 * %r2 pointer to sie control block 205 * %r3 guest register save area 206 */ 207ENTRY(sie64a) 208 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers 209 stg %r2,__SF_EMPTY(%r15) # save control block pointer 210 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area 211 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 212 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? 213 jno .Lsie_load_guest_gprs 214 brasl %r14,load_fpu_regs # load guest fp/vx regs 215.Lsie_load_guest_gprs: 216 lmg %r0,%r13,0(%r3) # load guest gprs 0-13 217 lg %r14,__LC_GMAP # get gmap pointer 218 ltgr %r14,%r14 219 jz .Lsie_gmap 220 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce 221.Lsie_gmap: 222 lg %r14,__SF_EMPTY(%r15) # get control block pointer 223 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now 224 tm __SIE_PROG20+3(%r14),3 # last exit... 225 jnz .Lsie_skip 226 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 227 jo .Lsie_skip # exit if fp/vx regs changed 228 sie 0(%r14) 229.Lsie_skip: 230 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE 231 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 232.Lsie_done: 233# some program checks are suppressing. C code (e.g. do_protection_exception) 234# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other 235# instructions between sie64a and .Lsie_done should not cause program 236# interrupts. So lets use a nop (47 00 00 00) as a landing pad. 237# See also .Lcleanup_sie 238.Lrewind_pad: 239 nop 0 240 .globl sie_exit 241sie_exit: 242 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area 243 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 244 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers 245 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code 246 br %r14 247.Lsie_fault: 248 lghi %r14,-EFAULT 249 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code 250 j sie_exit 251 252 EX_TABLE(.Lrewind_pad,.Lsie_fault) 253 EX_TABLE(sie_exit,.Lsie_fault) 254EXPORT_SYMBOL(sie64a) 255EXPORT_SYMBOL(sie_exit) 256#endif 257 258/* 259 * SVC interrupt handler routine. System calls are synchronous events and 260 * are executed with interrupts enabled. 261 */ 262 263ENTRY(system_call) 264 stpt __LC_SYNC_ENTER_TIMER 265.Lsysc_stmg: 266 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 267 lg %r12,__LC_CURRENT 268 lghi %r13,__TASK_thread 269 lghi %r14,_PIF_SYSCALL 270.Lsysc_per: 271 lg %r15,__LC_KERNEL_STACK 272 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs 273.Lsysc_vtime: 274 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER 275 stmg %r0,%r7,__PT_R0(%r11) 276 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 277 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW 278 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC 279 stg %r14,__PT_FLAGS(%r11) 280.Lsysc_do_svc: 281 # load address of system call table 282 lg %r10,__THREAD_sysc_table(%r13,%r12) 283 llgh %r8,__PT_INT_CODE+2(%r11) 284 slag %r8,%r8,2 # shift and test for svc 0 285 jnz .Lsysc_nr_ok 286 # svc 0: system call number in %r1 287 llgfr %r1,%r1 # clear high word in r1 288 cghi %r1,NR_syscalls 289 jnl .Lsysc_nr_ok 290 sth %r1,__PT_INT_CODE+2(%r11) 291 slag %r8,%r1,2 292.Lsysc_nr_ok: 293 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 294 stg %r2,__PT_ORIG_GPR2(%r11) 295 stg %r7,STACK_FRAME_OVERHEAD(%r15) 296 lgf %r9,0(%r8,%r10) # get system call add. 297 TSTMSK __TI_flags(%r12),_TIF_TRACE 298 jnz .Lsysc_tracesys 299 basr %r14,%r9 # call sys_xxxx 300 stg %r2,__PT_R2(%r11) # store return value 301 302.Lsysc_return: 303 LOCKDEP_SYS_EXIT 304.Lsysc_tif: 305 TSTMSK __PT_FLAGS(%r11),_PIF_WORK 306 jnz .Lsysc_work 307 TSTMSK __TI_flags(%r12),_TIF_WORK 308 jnz .Lsysc_work # check for work 309 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 310 jnz .Lsysc_work 311.Lsysc_restore: 312 lg %r14,__LC_VDSO_PER_CPU 313 lmg %r0,%r10,__PT_R0(%r11) 314 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 315 stpt __LC_EXIT_TIMER 316 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 317 lmg %r11,%r15,__PT_R11(%r11) 318 lpswe __LC_RETURN_PSW 319.Lsysc_done: 320 321# 322# One of the work bits is on. Find out which one. 323# 324.Lsysc_work: 325 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 326 jo .Lsysc_mcck_pending 327 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 328 jo .Lsysc_reschedule 329#ifdef CONFIG_UPROBES 330 TSTMSK __TI_flags(%r12),_TIF_UPROBE 331 jo .Lsysc_uprobe_notify 332#endif 333 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE 334 jo .Lsysc_guarded_storage 335 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP 336 jo .Lsysc_singlestep 337#ifdef CONFIG_LIVEPATCH 338 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING 339 jo .Lsysc_patch_pending # handle live patching just before 340 # signals and possible syscall restart 341#endif 342 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 343 jo .Lsysc_sigpending 344 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 345 jo .Lsysc_notify_resume 346 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 347 jo .Lsysc_vxrs 348 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 349 jnz .Lsysc_asce 350 j .Lsysc_return # beware of critical section cleanup 351 352# 353# _TIF_NEED_RESCHED is set, call schedule 354# 355.Lsysc_reschedule: 356 larl %r14,.Lsysc_return 357 jg schedule 358 359# 360# _CIF_MCCK_PENDING is set, call handler 361# 362.Lsysc_mcck_pending: 363 larl %r14,.Lsysc_return 364 jg s390_handle_mcck # TIF bit will be cleared by handler 365 366# 367# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 368# 369.Lsysc_asce: 370 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 371 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 372 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY 373 jz .Lsysc_return 374 larl %r14,.Lsysc_return 375 jg set_fs_fixup 376 377# 378# CIF_FPU is set, restore floating-point controls and floating-point registers. 379# 380.Lsysc_vxrs: 381 larl %r14,.Lsysc_return 382 jg load_fpu_regs 383 384# 385# _TIF_SIGPENDING is set, call do_signal 386# 387.Lsysc_sigpending: 388 lgr %r2,%r11 # pass pointer to pt_regs 389 brasl %r14,do_signal 390 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 391 jno .Lsysc_return 392.Lsysc_do_syscall: 393 lghi %r13,__TASK_thread 394 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments 395 lghi %r1,0 # svc 0 returns -ENOSYS 396 j .Lsysc_do_svc 397 398# 399# _TIF_NOTIFY_RESUME is set, call do_notify_resume 400# 401.Lsysc_notify_resume: 402 lgr %r2,%r11 # pass pointer to pt_regs 403 larl %r14,.Lsysc_return 404 jg do_notify_resume 405 406# 407# _TIF_UPROBE is set, call uprobe_notify_resume 408# 409#ifdef CONFIG_UPROBES 410.Lsysc_uprobe_notify: 411 lgr %r2,%r11 # pass pointer to pt_regs 412 larl %r14,.Lsysc_return 413 jg uprobe_notify_resume 414#endif 415 416# 417# _TIF_GUARDED_STORAGE is set, call guarded_storage_load 418# 419.Lsysc_guarded_storage: 420 lgr %r2,%r11 # pass pointer to pt_regs 421 larl %r14,.Lsysc_return 422 jg gs_load_bc_cb 423# 424# _TIF_PATCH_PENDING is set, call klp_update_patch_state 425# 426#ifdef CONFIG_LIVEPATCH 427.Lsysc_patch_pending: 428 lg %r2,__LC_CURRENT # pass pointer to task struct 429 larl %r14,.Lsysc_return 430 jg klp_update_patch_state 431#endif 432 433# 434# _PIF_PER_TRAP is set, call do_per_trap 435# 436.Lsysc_singlestep: 437 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP 438 lgr %r2,%r11 # pass pointer to pt_regs 439 larl %r14,.Lsysc_return 440 jg do_per_trap 441 442# 443# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before 444# and after the system call 445# 446.Lsysc_tracesys: 447 lgr %r2,%r11 # pass pointer to pt_regs 448 la %r3,0 449 llgh %r0,__PT_INT_CODE+2(%r11) 450 stg %r0,__PT_R2(%r11) 451 brasl %r14,do_syscall_trace_enter 452 lghi %r0,NR_syscalls 453 clgr %r0,%r2 454 jnh .Lsysc_tracenogo 455 sllg %r8,%r2,2 456 lgf %r9,0(%r8,%r10) 457.Lsysc_tracego: 458 lmg %r3,%r7,__PT_R3(%r11) 459 stg %r7,STACK_FRAME_OVERHEAD(%r15) 460 lg %r2,__PT_ORIG_GPR2(%r11) 461 basr %r14,%r9 # call sys_xxx 462 stg %r2,__PT_R2(%r11) # store return value 463.Lsysc_tracenogo: 464 TSTMSK __TI_flags(%r12),_TIF_TRACE 465 jz .Lsysc_return 466 lgr %r2,%r11 # pass pointer to pt_regs 467 larl %r14,.Lsysc_return 468 jg do_syscall_trace_exit 469 470# 471# a new process exits the kernel with ret_from_fork 472# 473ENTRY(ret_from_fork) 474 la %r11,STACK_FRAME_OVERHEAD(%r15) 475 lg %r12,__LC_CURRENT 476 brasl %r14,schedule_tail 477 TRACE_IRQS_ON 478 ssm __LC_SVC_NEW_PSW # reenable interrupts 479 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? 480 jne .Lsysc_tracenogo 481 # it's a kernel thread 482 lmg %r9,%r10,__PT_R9(%r11) # load gprs 483ENTRY(kernel_thread_starter) 484 la %r2,0(%r10) 485 basr %r14,%r9 486 j .Lsysc_tracenogo 487 488/* 489 * Program check handler routine 490 */ 491 492ENTRY(pgm_check_handler) 493 stpt __LC_SYNC_ENTER_TIMER 494 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 495 lg %r10,__LC_LAST_BREAK 496 lg %r12,__LC_CURRENT 497 larl %r13,cleanup_critical 498 lmg %r8,%r9,__LC_PGM_OLD_PSW 499 tmhh %r8,0x0001 # test problem state bit 500 jnz 2f # -> fault in user space 501#if IS_ENABLED(CONFIG_KVM) 502 # cleanup critical section for sie64a 503 lgr %r14,%r9 504 slg %r14,BASED(.Lsie_critical_start) 505 clg %r14,BASED(.Lsie_critical_length) 506 jhe 0f 507 brasl %r14,.Lcleanup_sie 508#endif 5090: tmhh %r8,0x4000 # PER bit set in old PSW ? 510 jnz 1f # -> enabled, can't be a double fault 511 tm __LC_PGM_ILC+3,0x80 # check for per exception 512 jnz .Lpgm_svcper # -> single stepped svc 5131: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC 514 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 515 j 4f 5162: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER 517 lg %r15,__LC_KERNEL_STACK 518 lgr %r14,%r12 519 aghi %r14,__TASK_thread # pointer to thread_struct 520 lghi %r13,__LC_PGM_TDB 521 tm __LC_PGM_ILC+2,0x02 # check for transaction abort 522 jz 3f 523 mvc __THREAD_trap_tdb(256,%r14),0(%r13) 5243: stg %r10,__THREAD_last_break(%r14) 5254: la %r11,STACK_FRAME_OVERHEAD(%r15) 526 stmg %r0,%r7,__PT_R0(%r11) 527 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 528 stmg %r8,%r9,__PT_PSW(%r11) 529 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC 530 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE 531 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 532 stg %r10,__PT_ARGS(%r11) 533 tm __LC_PGM_ILC+3,0x80 # check for per exception 534 jz 5f 535 tmhh %r8,0x0001 # kernel per event ? 536 jz .Lpgm_kprobe 537 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP 538 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS 539 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE 540 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID 5415: REENABLE_IRQS 542 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 543 larl %r1,pgm_check_table 544 llgh %r10,__PT_INT_CODE+2(%r11) 545 nill %r10,0x007f 546 sll %r10,2 547 je .Lpgm_return 548 lgf %r1,0(%r10,%r1) # load address of handler routine 549 lgr %r2,%r11 # pass pointer to pt_regs 550 basr %r14,%r1 # branch to interrupt-handler 551.Lpgm_return: 552 LOCKDEP_SYS_EXIT 553 tm __PT_PSW+1(%r11),0x01 # returning to user ? 554 jno .Lsysc_restore 555 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 556 jo .Lsysc_do_syscall 557 j .Lsysc_tif 558 559# 560# PER event in supervisor state, must be kprobes 561# 562.Lpgm_kprobe: 563 REENABLE_IRQS 564 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 565 lgr %r2,%r11 # pass pointer to pt_regs 566 brasl %r14,do_per_trap 567 j .Lpgm_return 568 569# 570# single stepped system call 571# 572.Lpgm_svcper: 573 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW 574 lghi %r13,__TASK_thread 575 larl %r14,.Lsysc_per 576 stg %r14,__LC_RETURN_PSW+8 577 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP 578 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs 579 580/* 581 * IO interrupt handler routine 582 */ 583ENTRY(io_int_handler) 584 STCK __LC_INT_CLOCK 585 stpt __LC_ASYNC_ENTER_TIMER 586 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 587 lg %r12,__LC_CURRENT 588 larl %r13,cleanup_critical 589 lmg %r8,%r9,__LC_IO_OLD_PSW 590 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 591 stmg %r0,%r7,__PT_R0(%r11) 592 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 593 stmg %r8,%r9,__PT_PSW(%r11) 594 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 595 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 596 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 597 jo .Lio_restore 598 TRACE_IRQS_OFF 599 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 600.Lio_loop: 601 lgr %r2,%r11 # pass pointer to pt_regs 602 lghi %r3,IO_INTERRUPT 603 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? 604 jz .Lio_call 605 lghi %r3,THIN_INTERRUPT 606.Lio_call: 607 brasl %r14,do_IRQ 608 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR 609 jz .Lio_return 610 tpi 0 611 jz .Lio_return 612 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 613 j .Lio_loop 614.Lio_return: 615 LOCKDEP_SYS_EXIT 616 TRACE_IRQS_ON 617.Lio_tif: 618 TSTMSK __TI_flags(%r12),_TIF_WORK 619 jnz .Lio_work # there is work to do (signals etc.) 620 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 621 jnz .Lio_work 622.Lio_restore: 623 lg %r14,__LC_VDSO_PER_CPU 624 lmg %r0,%r10,__PT_R0(%r11) 625 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 626 stpt __LC_EXIT_TIMER 627 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 628 lmg %r11,%r15,__PT_R11(%r11) 629 lpswe __LC_RETURN_PSW 630.Lio_done: 631 632# 633# There is work todo, find out in which context we have been interrupted: 634# 1) if we return to user space we can do all _TIF_WORK work 635# 2) if we return to kernel code and kvm is enabled check if we need to 636# modify the psw to leave SIE 637# 3) if we return to kernel code and preemptive scheduling is enabled check 638# the preemption counter and if it is zero call preempt_schedule_irq 639# Before any work can be done, a switch to the kernel stack is required. 640# 641.Lio_work: 642 tm __PT_PSW+1(%r11),0x01 # returning to user ? 643 jo .Lio_work_user # yes -> do resched & signal 644#ifdef CONFIG_PREEMPT 645 # check for preemptive scheduling 646 icm %r0,15,__LC_PREEMPT_COUNT 647 jnz .Lio_restore # preemption is disabled 648 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 649 jno .Lio_restore 650 # switch to kernel stack 651 lg %r1,__PT_R15(%r11) 652 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 653 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 654 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 655 la %r11,STACK_FRAME_OVERHEAD(%r1) 656 lgr %r15,%r1 657 # TRACE_IRQS_ON already done at .Lio_return, call 658 # TRACE_IRQS_OFF to keep things symmetrical 659 TRACE_IRQS_OFF 660 brasl %r14,preempt_schedule_irq 661 j .Lio_return 662#else 663 j .Lio_restore 664#endif 665 666# 667# Need to do work before returning to userspace, switch to kernel stack 668# 669.Lio_work_user: 670 lg %r1,__LC_KERNEL_STACK 671 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 672 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 673 la %r11,STACK_FRAME_OVERHEAD(%r1) 674 lgr %r15,%r1 675 676# 677# One of the work bits is on. Find out which one. 678# 679.Lio_work_tif: 680 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 681 jo .Lio_mcck_pending 682 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 683 jo .Lio_reschedule 684#ifdef CONFIG_LIVEPATCH 685 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING 686 jo .Lio_patch_pending 687#endif 688 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 689 jo .Lio_sigpending 690 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 691 jo .Lio_notify_resume 692 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE 693 jo .Lio_guarded_storage 694 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 695 jo .Lio_vxrs 696 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 697 jnz .Lio_asce 698 j .Lio_return # beware of critical section cleanup 699 700# 701# _CIF_MCCK_PENDING is set, call handler 702# 703.Lio_mcck_pending: 704 # TRACE_IRQS_ON already done at .Lio_return 705 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler 706 TRACE_IRQS_OFF 707 j .Lio_return 708 709# 710# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 711# 712.Lio_asce: 713 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 714 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 715 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY 716 jz .Lio_return 717 larl %r14,.Lio_return 718 jg set_fs_fixup 719 720# 721# CIF_FPU is set, restore floating-point controls and floating-point registers. 722# 723.Lio_vxrs: 724 larl %r14,.Lio_return 725 jg load_fpu_regs 726 727# 728# _TIF_GUARDED_STORAGE is set, call guarded_storage_load 729# 730.Lio_guarded_storage: 731 # TRACE_IRQS_ON already done at .Lio_return 732 ssm __LC_SVC_NEW_PSW # reenable interrupts 733 lgr %r2,%r11 # pass pointer to pt_regs 734 brasl %r14,gs_load_bc_cb 735 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 736 TRACE_IRQS_OFF 737 j .Lio_return 738 739# 740# _TIF_NEED_RESCHED is set, call schedule 741# 742.Lio_reschedule: 743 # TRACE_IRQS_ON already done at .Lio_return 744 ssm __LC_SVC_NEW_PSW # reenable interrupts 745 brasl %r14,schedule # call scheduler 746 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 747 TRACE_IRQS_OFF 748 j .Lio_return 749 750# 751# _TIF_PATCH_PENDING is set, call klp_update_patch_state 752# 753#ifdef CONFIG_LIVEPATCH 754.Lio_patch_pending: 755 lg %r2,__LC_CURRENT # pass pointer to task struct 756 larl %r14,.Lio_return 757 jg klp_update_patch_state 758#endif 759 760# 761# _TIF_SIGPENDING or is set, call do_signal 762# 763.Lio_sigpending: 764 # TRACE_IRQS_ON already done at .Lio_return 765 ssm __LC_SVC_NEW_PSW # reenable interrupts 766 lgr %r2,%r11 # pass pointer to pt_regs 767 brasl %r14,do_signal 768 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 769 TRACE_IRQS_OFF 770 j .Lio_return 771 772# 773# _TIF_NOTIFY_RESUME or is set, call do_notify_resume 774# 775.Lio_notify_resume: 776 # TRACE_IRQS_ON already done at .Lio_return 777 ssm __LC_SVC_NEW_PSW # reenable interrupts 778 lgr %r2,%r11 # pass pointer to pt_regs 779 brasl %r14,do_notify_resume 780 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 781 TRACE_IRQS_OFF 782 j .Lio_return 783 784/* 785 * External interrupt handler routine 786 */ 787ENTRY(ext_int_handler) 788 STCK __LC_INT_CLOCK 789 stpt __LC_ASYNC_ENTER_TIMER 790 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 791 lg %r12,__LC_CURRENT 792 larl %r13,cleanup_critical 793 lmg %r8,%r9,__LC_EXT_OLD_PSW 794 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 795 stmg %r0,%r7,__PT_R0(%r11) 796 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 797 stmg %r8,%r9,__PT_PSW(%r11) 798 lghi %r1,__LC_EXT_PARAMS2 799 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR 800 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS 801 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) 802 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 803 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 804 jo .Lio_restore 805 TRACE_IRQS_OFF 806 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 807 lgr %r2,%r11 # pass pointer to pt_regs 808 lghi %r3,EXT_INTERRUPT 809 brasl %r14,do_IRQ 810 j .Lio_return 811 812/* 813 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. 814 */ 815ENTRY(psw_idle) 816 stg %r3,__SF_EMPTY(%r15) 817 larl %r1,.Lpsw_idle_lpsw+4 818 stg %r1,__SF_EMPTY+8(%r15) 819#ifdef CONFIG_SMP 820 larl %r1,smp_cpu_mtid 821 llgf %r1,0(%r1) 822 ltgr %r1,%r1 823 jz .Lpsw_idle_stcctm 824 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) 825.Lpsw_idle_stcctm: 826#endif 827 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT 828 STCK __CLOCK_IDLE_ENTER(%r2) 829 stpt __TIMER_IDLE_ENTER(%r2) 830.Lpsw_idle_lpsw: 831 lpswe __SF_EMPTY(%r15) 832 br %r14 833.Lpsw_idle_end: 834 835/* 836 * Store floating-point controls and floating-point or vector register 837 * depending whether the vector facility is available. A critical section 838 * cleanup assures that the registers are stored even if interrupted for 839 * some other work. The CIF_FPU flag is set to trigger a lazy restore 840 * of the register contents at return from io or a system call. 841 */ 842ENTRY(save_fpu_regs) 843 lg %r2,__LC_CURRENT 844 aghi %r2,__TASK_thread 845 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 846 bor %r14 847 stfpc __THREAD_FPU_fpc(%r2) 848 lg %r3,__THREAD_FPU_regs(%r2) 849 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 850 jz .Lsave_fpu_regs_fp # no -> store FP regs 851 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) 852 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) 853 j .Lsave_fpu_regs_done # -> set CIF_FPU flag 854.Lsave_fpu_regs_fp: 855 std 0,0(%r3) 856 std 1,8(%r3) 857 std 2,16(%r3) 858 std 3,24(%r3) 859 std 4,32(%r3) 860 std 5,40(%r3) 861 std 6,48(%r3) 862 std 7,56(%r3) 863 std 8,64(%r3) 864 std 9,72(%r3) 865 std 10,80(%r3) 866 std 11,88(%r3) 867 std 12,96(%r3) 868 std 13,104(%r3) 869 std 14,112(%r3) 870 std 15,120(%r3) 871.Lsave_fpu_regs_done: 872 oi __LC_CPU_FLAGS+7,_CIF_FPU 873 br %r14 874.Lsave_fpu_regs_end: 875#if IS_ENABLED(CONFIG_KVM) 876EXPORT_SYMBOL(save_fpu_regs) 877#endif 878 879/* 880 * Load floating-point controls and floating-point or vector registers. 881 * A critical section cleanup assures that the register contents are 882 * loaded even if interrupted for some other work. 883 * 884 * There are special calling conventions to fit into sysc and io return work: 885 * %r15: <kernel stack> 886 * The function requires: 887 * %r4 888 */ 889load_fpu_regs: 890 lg %r4,__LC_CURRENT 891 aghi %r4,__TASK_thread 892 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 893 bnor %r14 894 lfpc __THREAD_FPU_fpc(%r4) 895 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 896 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area 897 jz .Lload_fpu_regs_fp # -> no VX, load FP regs 898 VLM %v0,%v15,0,%r4 899 VLM %v16,%v31,256,%r4 900 j .Lload_fpu_regs_done 901.Lload_fpu_regs_fp: 902 ld 0,0(%r4) 903 ld 1,8(%r4) 904 ld 2,16(%r4) 905 ld 3,24(%r4) 906 ld 4,32(%r4) 907 ld 5,40(%r4) 908 ld 6,48(%r4) 909 ld 7,56(%r4) 910 ld 8,64(%r4) 911 ld 9,72(%r4) 912 ld 10,80(%r4) 913 ld 11,88(%r4) 914 ld 12,96(%r4) 915 ld 13,104(%r4) 916 ld 14,112(%r4) 917 ld 15,120(%r4) 918.Lload_fpu_regs_done: 919 ni __LC_CPU_FLAGS+7,255-_CIF_FPU 920 br %r14 921.Lload_fpu_regs_end: 922 923.L__critical_end: 924 925/* 926 * Machine check handler routines 927 */ 928ENTRY(mcck_int_handler) 929 STCK __LC_MCCK_CLOCK 930 la %r1,4095 # revalidate r1 931 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 932 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 933 lg %r12,__LC_CURRENT 934 larl %r13,cleanup_critical 935 lmg %r8,%r9,__LC_MCK_OLD_PSW 936 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE 937 jo .Lmcck_panic # yes -> rest of mcck code invalid 938 lghi %r14,__LC_CPU_TIMER_SAVE_AREA 939 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 940 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID 941 jo 3f 942 la %r14,__LC_SYNC_ENTER_TIMER 943 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 944 jl 0f 945 la %r14,__LC_ASYNC_ENTER_TIMER 9460: clc 0(8,%r14),__LC_EXIT_TIMER 947 jl 1f 948 la %r14,__LC_EXIT_TIMER 9491: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 950 jl 2f 951 la %r14,__LC_LAST_UPDATE_TIMER 9522: spt 0(%r14) 953 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 9543: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) 955 jno .Lmcck_panic # no -> skip cleanup critical 956 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER 957.Lmcck_skip: 958 lghi %r14,__LC_GPREGS_SAVE_AREA+64 959 stmg %r0,%r7,__PT_R0(%r11) 960 mvc __PT_R8(64,%r11),0(%r14) 961 stmg %r8,%r9,__PT_PSW(%r11) 962 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 963 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 964 lgr %r2,%r11 # pass pointer to pt_regs 965 brasl %r14,s390_do_machine_check 966 tm __PT_PSW+1(%r11),0x01 # returning to user ? 967 jno .Lmcck_return 968 lg %r1,__LC_KERNEL_STACK # switch to kernel stack 969 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 970 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 971 la %r11,STACK_FRAME_OVERHEAD(%r1) 972 lgr %r15,%r1 973 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off 974 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 975 jno .Lmcck_return 976 TRACE_IRQS_OFF 977 brasl %r14,s390_handle_mcck 978 TRACE_IRQS_ON 979.Lmcck_return: 980 lg %r14,__LC_VDSO_PER_CPU 981 lmg %r0,%r10,__PT_R0(%r11) 982 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW 983 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 984 jno 0f 985 stpt __LC_EXIT_TIMER 986 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 9870: lmg %r11,%r15,__PT_R11(%r11) 988 lpswe __LC_RETURN_MCCK_PSW 989 990.Lmcck_panic: 991 lg %r15,__LC_PANIC_STACK 992 la %r11,STACK_FRAME_OVERHEAD(%r15) 993 j .Lmcck_skip 994 995# 996# PSW restart interrupt handler 997# 998ENTRY(restart_int_handler) 999 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 1000 jz 0f 1001 .insn s,0xb2800000,__LC_LPP 10020: stg %r15,__LC_SAVE_AREA_RESTART 1003 lg %r15,__LC_RESTART_STACK 1004 aghi %r15,-__PT_SIZE # create pt_regs on stack 1005 xc 0(__PT_SIZE,%r15),0(%r15) 1006 stmg %r0,%r14,__PT_R0(%r15) 1007 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART 1008 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw 1009 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack 1010 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) 1011 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu 1012 lg %r2,__LC_RESTART_DATA 1013 lg %r3,__LC_RESTART_SOURCE 1014 ltgr %r3,%r3 # test source cpu address 1015 jm 1f # negative -> skip source stop 10160: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu 1017 brc 10,0b # wait for status stored 10181: basr %r14,%r1 # call function 1019 stap __SF_EMPTY(%r15) # store cpu address 1020 llgh %r3,__SF_EMPTY(%r15) 10212: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu 1022 brc 2,2b 10233: j 3b 1024 1025 .section .kprobes.text, "ax" 1026 1027#ifdef CONFIG_CHECK_STACK 1028/* 1029 * The synchronous or the asynchronous stack overflowed. We are dead. 1030 * No need to properly save the registers, we are going to panic anyway. 1031 * Setup a pt_regs so that show_trace can provide a good call trace. 1032 */ 1033stack_overflow: 1034 lg %r15,__LC_PANIC_STACK # change to panic stack 1035 la %r11,STACK_FRAME_OVERHEAD(%r15) 1036 stmg %r0,%r7,__PT_R0(%r11) 1037 stmg %r8,%r9,__PT_PSW(%r11) 1038 mvc __PT_R8(64,%r11),0(%r14) 1039 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 1040 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 1041 lgr %r2,%r11 # pass pointer to pt_regs 1042 jg kernel_stack_overflow 1043#endif 1044 1045cleanup_critical: 1046#if IS_ENABLED(CONFIG_KVM) 1047 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap 1048 jl 0f 1049 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done 1050 jl .Lcleanup_sie 1051#endif 1052 clg %r9,BASED(.Lcleanup_table) # system_call 1053 jl 0f 1054 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc 1055 jl .Lcleanup_system_call 1056 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif 1057 jl 0f 1058 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore 1059 jl .Lcleanup_sysc_tif 1060 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done 1061 jl .Lcleanup_sysc_restore 1062 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif 1063 jl 0f 1064 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore 1065 jl .Lcleanup_io_tif 1066 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done 1067 jl .Lcleanup_io_restore 1068 clg %r9,BASED(.Lcleanup_table+64) # psw_idle 1069 jl 0f 1070 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end 1071 jl .Lcleanup_idle 1072 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs 1073 jl 0f 1074 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end 1075 jl .Lcleanup_save_fpu_regs 1076 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs 1077 jl 0f 1078 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end 1079 jl .Lcleanup_load_fpu_regs 10800: br %r14 1081 1082 .align 8 1083.Lcleanup_table: 1084 .quad system_call 1085 .quad .Lsysc_do_svc 1086 .quad .Lsysc_tif 1087 .quad .Lsysc_restore 1088 .quad .Lsysc_done 1089 .quad .Lio_tif 1090 .quad .Lio_restore 1091 .quad .Lio_done 1092 .quad psw_idle 1093 .quad .Lpsw_idle_end 1094 .quad save_fpu_regs 1095 .quad .Lsave_fpu_regs_end 1096 .quad load_fpu_regs 1097 .quad .Lload_fpu_regs_end 1098 1099#if IS_ENABLED(CONFIG_KVM) 1100.Lcleanup_table_sie: 1101 .quad .Lsie_gmap 1102 .quad .Lsie_done 1103 1104.Lcleanup_sie: 1105 lg %r9,__SF_EMPTY(%r15) # get control block pointer 1106 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE 1107 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 1108 larl %r9,sie_exit # skip forward to sie_exit 1109 br %r14 1110#endif 1111 1112.Lcleanup_system_call: 1113 # check if stpt has been executed 1114 clg %r9,BASED(.Lcleanup_system_call_insn) 1115 jh 0f 1116 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 1117 cghi %r11,__LC_SAVE_AREA_ASYNC 1118 je 0f 1119 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER 11200: # check if stmg has been executed 1121 clg %r9,BASED(.Lcleanup_system_call_insn+8) 1122 jh 0f 1123 mvc __LC_SAVE_AREA_SYNC(64),0(%r11) 11240: # check if base register setup + TIF bit load has been done 1125 clg %r9,BASED(.Lcleanup_system_call_insn+16) 1126 jhe 0f 1127 # set up saved register r12 task struct pointer 1128 stg %r12,32(%r11) 1129 # set up saved register r13 __TASK_thread offset 1130 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const) 11310: # check if the user time update has been done 1132 clg %r9,BASED(.Lcleanup_system_call_insn+24) 1133 jh 0f 1134 lg %r15,__LC_EXIT_TIMER 1135 slg %r15,__LC_SYNC_ENTER_TIMER 1136 alg %r15,__LC_USER_TIMER 1137 stg %r15,__LC_USER_TIMER 11380: # check if the system time update has been done 1139 clg %r9,BASED(.Lcleanup_system_call_insn+32) 1140 jh 0f 1141 lg %r15,__LC_LAST_UPDATE_TIMER 1142 slg %r15,__LC_EXIT_TIMER 1143 alg %r15,__LC_SYSTEM_TIMER 1144 stg %r15,__LC_SYSTEM_TIMER 11450: # update accounting time stamp 1146 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 1147 # set up saved register r11 1148 lg %r15,__LC_KERNEL_STACK 1149 la %r9,STACK_FRAME_OVERHEAD(%r15) 1150 stg %r9,24(%r11) # r11 pt_regs pointer 1151 # fill pt_regs 1152 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC 1153 stmg %r0,%r7,__PT_R0(%r9) 1154 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW 1155 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC 1156 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) 1157 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL 1158 # setup saved register r15 1159 stg %r15,56(%r11) # r15 stack pointer 1160 # set new psw address and exit 1161 larl %r9,.Lsysc_do_svc 1162 br %r14 1163.Lcleanup_system_call_insn: 1164 .quad system_call 1165 .quad .Lsysc_stmg 1166 .quad .Lsysc_per 1167 .quad .Lsysc_vtime+36 1168 .quad .Lsysc_vtime+42 1169.Lcleanup_system_call_const: 1170 .quad __TASK_thread 1171 1172.Lcleanup_sysc_tif: 1173 larl %r9,.Lsysc_tif 1174 br %r14 1175 1176.Lcleanup_sysc_restore: 1177 clg %r9,BASED(.Lcleanup_sysc_restore_insn) 1178 je 0f 1179 lg %r9,24(%r11) # get saved pointer to pt_regs 1180 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1181 mvc 0(64,%r11),__PT_R8(%r9) 1182 lmg %r0,%r7,__PT_R0(%r9) 11830: lmg %r8,%r9,__LC_RETURN_PSW 1184 br %r14 1185.Lcleanup_sysc_restore_insn: 1186 .quad .Lsysc_done - 4 1187 1188.Lcleanup_io_tif: 1189 larl %r9,.Lio_tif 1190 br %r14 1191 1192.Lcleanup_io_restore: 1193 clg %r9,BASED(.Lcleanup_io_restore_insn) 1194 je 0f 1195 lg %r9,24(%r11) # get saved r11 pointer to pt_regs 1196 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1197 mvc 0(64,%r11),__PT_R8(%r9) 1198 lmg %r0,%r7,__PT_R0(%r9) 11990: lmg %r8,%r9,__LC_RETURN_PSW 1200 br %r14 1201.Lcleanup_io_restore_insn: 1202 .quad .Lio_done - 4 1203 1204.Lcleanup_idle: 1205 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT 1206 # copy interrupt clock & cpu timer 1207 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK 1208 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER 1209 cghi %r11,__LC_SAVE_AREA_ASYNC 1210 je 0f 1211 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK 1212 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER 12130: # check if stck & stpt have been executed 1214 clg %r9,BASED(.Lcleanup_idle_insn) 1215 jhe 1f 1216 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) 1217 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) 12181: # calculate idle cycles 1219#ifdef CONFIG_SMP 1220 clg %r9,BASED(.Lcleanup_idle_insn) 1221 jl 3f 1222 larl %r1,smp_cpu_mtid 1223 llgf %r1,0(%r1) 1224 ltgr %r1,%r1 1225 jz 3f 1226 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) 1227 larl %r3,mt_cycles 1228 ag %r3,__LC_PERCPU_OFFSET 1229 la %r4,__SF_EMPTY+16(%r15) 12302: lg %r0,0(%r3) 1231 slg %r0,0(%r4) 1232 alg %r0,64(%r4) 1233 stg %r0,0(%r3) 1234 la %r3,8(%r3) 1235 la %r4,8(%r4) 1236 brct %r1,2b 1237#endif 12383: # account system time going idle 1239 lg %r9,__LC_STEAL_TIMER 1240 alg %r9,__CLOCK_IDLE_ENTER(%r2) 1241 slg %r9,__LC_LAST_UPDATE_CLOCK 1242 stg %r9,__LC_STEAL_TIMER 1243 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) 1244 lg %r9,__LC_SYSTEM_TIMER 1245 alg %r9,__LC_LAST_UPDATE_TIMER 1246 slg %r9,__TIMER_IDLE_ENTER(%r2) 1247 stg %r9,__LC_SYSTEM_TIMER 1248 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) 1249 # prepare return psw 1250 nihh %r8,0xfcfd # clear irq & wait state bits 1251 lg %r9,48(%r11) # return from psw_idle 1252 br %r14 1253.Lcleanup_idle_insn: 1254 .quad .Lpsw_idle_lpsw 1255 1256.Lcleanup_save_fpu_regs: 1257 larl %r9,save_fpu_regs 1258 br %r14 1259 1260.Lcleanup_load_fpu_regs: 1261 larl %r9,load_fpu_regs 1262 br %r14 1263 1264/* 1265 * Integer constants 1266 */ 1267 .align 8 1268.Lcritical_start: 1269 .quad .L__critical_start 1270.Lcritical_length: 1271 .quad .L__critical_end - .L__critical_start 1272#if IS_ENABLED(CONFIG_KVM) 1273.Lsie_critical_start: 1274 .quad .Lsie_gmap 1275.Lsie_critical_length: 1276 .quad .Lsie_done - .Lsie_gmap 1277#endif 1278 1279 .section .rodata, "a" 1280#define SYSCALL(esame,emu) .long esame 1281 .globl sys_call_table 1282sys_call_table: 1283#include "syscalls.S" 1284#undef SYSCALL 1285 1286#ifdef CONFIG_COMPAT 1287 1288#define SYSCALL(esame,emu) .long emu 1289 .globl sys_call_table_emu 1290sys_call_table_emu: 1291#include "syscalls.S" 1292#undef SYSCALL 1293#endif 1294