xref: /openbmc/linux/arch/s390/include/uapi/asm/ptrace.h (revision 078b39c9)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /*
3  *  S390 version
4  *    Copyright IBM Corp. 1999, 2000
5  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6  */
7 
8 #ifndef _UAPI_S390_PTRACE_H
9 #define _UAPI_S390_PTRACE_H
10 
11 /*
12  * Offsets in the user_regs_struct. They are used for the ptrace
13  * system call and in entry.S
14  */
15 #ifndef __s390x__
16 
17 #define PT_PSWMASK  0x00
18 #define PT_PSWADDR  0x04
19 #define PT_GPR0     0x08
20 #define PT_GPR1     0x0C
21 #define PT_GPR2     0x10
22 #define PT_GPR3     0x14
23 #define PT_GPR4     0x18
24 #define PT_GPR5     0x1C
25 #define PT_GPR6     0x20
26 #define PT_GPR7     0x24
27 #define PT_GPR8     0x28
28 #define PT_GPR9     0x2C
29 #define PT_GPR10    0x30
30 #define PT_GPR11    0x34
31 #define PT_GPR12    0x38
32 #define PT_GPR13    0x3C
33 #define PT_GPR14    0x40
34 #define PT_GPR15    0x44
35 #define PT_ACR0     0x48
36 #define PT_ACR1     0x4C
37 #define PT_ACR2     0x50
38 #define PT_ACR3     0x54
39 #define PT_ACR4	    0x58
40 #define PT_ACR5	    0x5C
41 #define PT_ACR6	    0x60
42 #define PT_ACR7	    0x64
43 #define PT_ACR8	    0x68
44 #define PT_ACR9	    0x6C
45 #define PT_ACR10    0x70
46 #define PT_ACR11    0x74
47 #define PT_ACR12    0x78
48 #define PT_ACR13    0x7C
49 #define PT_ACR14    0x80
50 #define PT_ACR15    0x84
51 #define PT_ORIGGPR2 0x88
52 #define PT_FPC	    0x90
53 /*
54  * A nasty fact of life that the ptrace api
55  * only supports passing of longs.
56  */
57 #define PT_FPR0_HI  0x98
58 #define PT_FPR0_LO  0x9C
59 #define PT_FPR1_HI  0xA0
60 #define PT_FPR1_LO  0xA4
61 #define PT_FPR2_HI  0xA8
62 #define PT_FPR2_LO  0xAC
63 #define PT_FPR3_HI  0xB0
64 #define PT_FPR3_LO  0xB4
65 #define PT_FPR4_HI  0xB8
66 #define PT_FPR4_LO  0xBC
67 #define PT_FPR5_HI  0xC0
68 #define PT_FPR5_LO  0xC4
69 #define PT_FPR6_HI  0xC8
70 #define PT_FPR6_LO  0xCC
71 #define PT_FPR7_HI  0xD0
72 #define PT_FPR7_LO  0xD4
73 #define PT_FPR8_HI  0xD8
74 #define PT_FPR8_LO  0XDC
75 #define PT_FPR9_HI  0xE0
76 #define PT_FPR9_LO  0xE4
77 #define PT_FPR10_HI 0xE8
78 #define PT_FPR10_LO 0xEC
79 #define PT_FPR11_HI 0xF0
80 #define PT_FPR11_LO 0xF4
81 #define PT_FPR12_HI 0xF8
82 #define PT_FPR12_LO 0xFC
83 #define PT_FPR13_HI 0x100
84 #define PT_FPR13_LO 0x104
85 #define PT_FPR14_HI 0x108
86 #define PT_FPR14_LO 0x10C
87 #define PT_FPR15_HI 0x110
88 #define PT_FPR15_LO 0x114
89 #define PT_CR_9	    0x118
90 #define PT_CR_10    0x11C
91 #define PT_CR_11    0x120
92 #define PT_IEEE_IP  0x13C
93 #define PT_LASTOFF  PT_IEEE_IP
94 #define PT_ENDREGS  0x140-1
95 
96 #define GPR_SIZE	4
97 #define CR_SIZE		4
98 
99 #define STACK_FRAME_OVERHEAD	96	/* size of minimum stack frame */
100 
101 #else /* __s390x__ */
102 
103 #define PT_PSWMASK  0x00
104 #define PT_PSWADDR  0x08
105 #define PT_GPR0     0x10
106 #define PT_GPR1     0x18
107 #define PT_GPR2     0x20
108 #define PT_GPR3     0x28
109 #define PT_GPR4     0x30
110 #define PT_GPR5     0x38
111 #define PT_GPR6     0x40
112 #define PT_GPR7     0x48
113 #define PT_GPR8     0x50
114 #define PT_GPR9     0x58
115 #define PT_GPR10    0x60
116 #define PT_GPR11    0x68
117 #define PT_GPR12    0x70
118 #define PT_GPR13    0x78
119 #define PT_GPR14    0x80
120 #define PT_GPR15    0x88
121 #define PT_ACR0     0x90
122 #define PT_ACR1     0x94
123 #define PT_ACR2     0x98
124 #define PT_ACR3     0x9C
125 #define PT_ACR4	    0xA0
126 #define PT_ACR5	    0xA4
127 #define PT_ACR6	    0xA8
128 #define PT_ACR7	    0xAC
129 #define PT_ACR8	    0xB0
130 #define PT_ACR9	    0xB4
131 #define PT_ACR10    0xB8
132 #define PT_ACR11    0xBC
133 #define PT_ACR12    0xC0
134 #define PT_ACR13    0xC4
135 #define PT_ACR14    0xC8
136 #define PT_ACR15    0xCC
137 #define PT_ORIGGPR2 0xD0
138 #define PT_FPC	    0xD8
139 #define PT_FPR0     0xE0
140 #define PT_FPR1     0xE8
141 #define PT_FPR2     0xF0
142 #define PT_FPR3     0xF8
143 #define PT_FPR4     0x100
144 #define PT_FPR5     0x108
145 #define PT_FPR6     0x110
146 #define PT_FPR7     0x118
147 #define PT_FPR8     0x120
148 #define PT_FPR9     0x128
149 #define PT_FPR10    0x130
150 #define PT_FPR11    0x138
151 #define PT_FPR12    0x140
152 #define PT_FPR13    0x148
153 #define PT_FPR14    0x150
154 #define PT_FPR15    0x158
155 #define PT_CR_9     0x160
156 #define PT_CR_10    0x168
157 #define PT_CR_11    0x170
158 #define PT_IEEE_IP  0x1A8
159 #define PT_LASTOFF  PT_IEEE_IP
160 #define PT_ENDREGS  0x1B0-1
161 
162 #define GPR_SIZE	8
163 #define CR_SIZE		8
164 
165 #define STACK_FRAME_OVERHEAD	160	 /* size of minimum stack frame */
166 
167 #endif /* __s390x__ */
168 
169 #ifndef __s390x__
170 
171 #define PSW_MASK_PER		_AC(0x40000000, UL)
172 #define PSW_MASK_DAT		_AC(0x04000000, UL)
173 #define PSW_MASK_IO		_AC(0x02000000, UL)
174 #define PSW_MASK_EXT		_AC(0x01000000, UL)
175 #define PSW_MASK_KEY		_AC(0x00F00000, UL)
176 #define PSW_MASK_BASE		_AC(0x00080000, UL)	/* always one */
177 #define PSW_MASK_MCHECK		_AC(0x00040000, UL)
178 #define PSW_MASK_WAIT		_AC(0x00020000, UL)
179 #define PSW_MASK_PSTATE		_AC(0x00010000, UL)
180 #define PSW_MASK_ASC		_AC(0x0000C000, UL)
181 #define PSW_MASK_CC		_AC(0x00003000, UL)
182 #define PSW_MASK_PM		_AC(0x00000F00, UL)
183 #define PSW_MASK_RI		_AC(0x00000000, UL)
184 #define PSW_MASK_EA		_AC(0x00000000, UL)
185 #define PSW_MASK_BA		_AC(0x00000000, UL)
186 
187 #define PSW_MASK_USER		_AC(0x0000FF00, UL)
188 
189 #define PSW_ADDR_AMODE		_AC(0x80000000, UL)
190 #define PSW_ADDR_INSN		_AC(0x7FFFFFFF, UL)
191 
192 #define PSW_ASC_PRIMARY		_AC(0x00000000, UL)
193 #define PSW_ASC_ACCREG		_AC(0x00004000, UL)
194 #define PSW_ASC_SECONDARY	_AC(0x00008000, UL)
195 #define PSW_ASC_HOME		_AC(0x0000C000, UL)
196 
197 #else /* __s390x__ */
198 
199 #define PSW_MASK_PER		_AC(0x4000000000000000, UL)
200 #define PSW_MASK_DAT		_AC(0x0400000000000000, UL)
201 #define PSW_MASK_IO		_AC(0x0200000000000000, UL)
202 #define PSW_MASK_EXT		_AC(0x0100000000000000, UL)
203 #define PSW_MASK_BASE		_AC(0x0000000000000000, UL)
204 #define PSW_MASK_KEY		_AC(0x00F0000000000000, UL)
205 #define PSW_MASK_MCHECK		_AC(0x0004000000000000, UL)
206 #define PSW_MASK_WAIT		_AC(0x0002000000000000, UL)
207 #define PSW_MASK_PSTATE		_AC(0x0001000000000000, UL)
208 #define PSW_MASK_ASC		_AC(0x0000C00000000000, UL)
209 #define PSW_MASK_CC		_AC(0x0000300000000000, UL)
210 #define PSW_MASK_PM		_AC(0x00000F0000000000, UL)
211 #define PSW_MASK_RI		_AC(0x0000008000000000, UL)
212 #define PSW_MASK_EA		_AC(0x0000000100000000, UL)
213 #define PSW_MASK_BA		_AC(0x0000000080000000, UL)
214 
215 #define PSW_MASK_USER		_AC(0x0000FF0180000000, UL)
216 
217 #define PSW_ADDR_AMODE		_AC(0x0000000000000000, UL)
218 #define PSW_ADDR_INSN		_AC(0xFFFFFFFFFFFFFFFF, UL)
219 
220 #define PSW_ASC_PRIMARY		_AC(0x0000000000000000, UL)
221 #define PSW_ASC_ACCREG		_AC(0x0000400000000000, UL)
222 #define PSW_ASC_SECONDARY	_AC(0x0000800000000000, UL)
223 #define PSW_ASC_HOME		_AC(0x0000C00000000000, UL)
224 
225 #endif /* __s390x__ */
226 
227 #define NUM_GPRS	16
228 #define NUM_FPRS	16
229 #define NUM_CRS		16
230 #define NUM_ACRS	16
231 
232 #define NUM_CR_WORDS	3
233 
234 #define FPR_SIZE	8
235 #define FPC_SIZE	4
236 #define FPC_PAD_SIZE	4 /* gcc insists on aligning the fpregs */
237 #define ACR_SIZE	4
238 
239 
240 #define PTRACE_OLDSETOPTIONS		21
241 #define PTRACE_SYSEMU			31
242 #define PTRACE_SYSEMU_SINGLESTEP	32
243 #ifndef __ASSEMBLY__
244 #include <linux/stddef.h>
245 #include <linux/types.h>
246 
247 typedef union {
248 	float	f;
249 	double	d;
250 	__u64	ui;
251 	struct
252 	{
253 		__u32 hi;
254 		__u32 lo;
255 	} fp;
256 } freg_t;
257 
258 typedef struct {
259 	__u32	fpc;
260 	__u32	pad;
261 	freg_t	fprs[NUM_FPRS];
262 } s390_fp_regs;
263 
264 #define FPC_EXCEPTION_MASK	0xF8000000
265 #define FPC_FLAGS_MASK		0x00F80000
266 #define FPC_DXC_MASK		0x0000FF00
267 #define FPC_RM_MASK		0x00000003
268 
269 /* this typedef defines how a Program Status Word looks like */
270 typedef struct {
271 	unsigned long mask;
272 	unsigned long addr;
273 } __attribute__ ((aligned(8))) psw_t;
274 
275 /*
276  * The s390_regs structure is used to define the elf_gregset_t.
277  */
278 typedef struct {
279 	psw_t psw;
280 	unsigned long gprs[NUM_GPRS];
281 	unsigned int  acrs[NUM_ACRS];
282 	unsigned long orig_gpr2;
283 } s390_regs;
284 
285 /*
286  * The user_pt_regs structure exports the beginning of
287  * the in-kernel pt_regs structure to user space.
288  */
289 typedef struct {
290 	unsigned long args[1];
291 	psw_t psw;
292 	unsigned long gprs[NUM_GPRS];
293 } user_pt_regs;
294 
295 /*
296  * Now for the user space program event recording (trace) definitions.
297  * The following structures are used only for the ptrace interface, don't
298  * touch or even look at it if you don't want to modify the user-space
299  * ptrace interface. In particular stay away from it for in-kernel PER.
300  */
301 typedef struct {
302 	unsigned long cr[NUM_CR_WORDS];
303 } per_cr_words;
304 
305 #define PER_EM_MASK 0xE8000000UL
306 
307 typedef struct {
308 #ifdef __s390x__
309 	unsigned		       : 32;
310 #endif /* __s390x__ */
311 	unsigned em_branching	       : 1;
312 	unsigned em_instruction_fetch  : 1;
313 	/*
314 	 * Switching on storage alteration automatically fixes
315 	 * the storage alteration event bit in the users std.
316 	 */
317 	unsigned em_storage_alteration : 1;
318 	unsigned em_gpr_alt_unused     : 1;
319 	unsigned em_store_real_address : 1;
320 	unsigned		       : 3;
321 	unsigned branch_addr_ctl       : 1;
322 	unsigned		       : 1;
323 	unsigned storage_alt_space_ctl : 1;
324 	unsigned		       : 21;
325 	unsigned long starting_addr;
326 	unsigned long ending_addr;
327 } per_cr_bits;
328 
329 typedef struct {
330 	unsigned short perc_atmid;
331 	unsigned long address;
332 	unsigned char access_id;
333 } per_lowcore_words;
334 
335 typedef struct {
336 	unsigned perc_branching		 : 1;
337 	unsigned perc_instruction_fetch  : 1;
338 	unsigned perc_storage_alteration : 1;
339 	unsigned perc_gpr_alt_unused	 : 1;
340 	unsigned perc_store_real_address : 1;
341 	unsigned			 : 3;
342 	unsigned atmid_psw_bit_31	 : 1;
343 	unsigned atmid_validity_bit	 : 1;
344 	unsigned atmid_psw_bit_32	 : 1;
345 	unsigned atmid_psw_bit_5	 : 1;
346 	unsigned atmid_psw_bit_16	 : 1;
347 	unsigned atmid_psw_bit_17	 : 1;
348 	unsigned si			 : 2;
349 	unsigned long address;
350 	unsigned			 : 4;
351 	unsigned access_id		 : 4;
352 } per_lowcore_bits;
353 
354 typedef struct {
355 	union {
356 		per_cr_words   words;
357 		per_cr_bits    bits;
358 	} control_regs;
359 	/*
360 	 * The single_step and instruction_fetch bits are obsolete,
361 	 * the kernel always sets them to zero. To enable single
362 	 * stepping use ptrace(PTRACE_SINGLESTEP) instead.
363 	 */
364 	unsigned  single_step	    : 1;
365 	unsigned  instruction_fetch : 1;
366 	unsigned		    : 30;
367 	/*
368 	 * These addresses are copied into cr10 & cr11 if single
369 	 * stepping is switched off
370 	 */
371 	unsigned long starting_addr;
372 	unsigned long ending_addr;
373 	union {
374 		per_lowcore_words words;
375 		per_lowcore_bits  bits;
376 	} lowcore;
377 } per_struct;
378 
379 typedef struct {
380 	unsigned int  len;
381 	unsigned long kernel_addr;
382 	unsigned long process_addr;
383 } ptrace_area;
384 
385 /*
386  * S/390 specific non posix ptrace requests. I chose unusual values so
387  * they are unlikely to clash with future ptrace definitions.
388  */
389 #define PTRACE_PEEKUSR_AREA	      0x5000
390 #define PTRACE_POKEUSR_AREA	      0x5001
391 #define PTRACE_PEEKTEXT_AREA	      0x5002
392 #define PTRACE_PEEKDATA_AREA	      0x5003
393 #define PTRACE_POKETEXT_AREA	      0x5004
394 #define PTRACE_POKEDATA_AREA	      0x5005
395 #define PTRACE_GET_LAST_BREAK	      0x5006
396 #define PTRACE_PEEK_SYSTEM_CALL       0x5007
397 #define PTRACE_POKE_SYSTEM_CALL	      0x5008
398 #define PTRACE_ENABLE_TE	      0x5009
399 #define PTRACE_DISABLE_TE	      0x5010
400 #define PTRACE_TE_ABORT_RAND	      0x5011
401 
402 /*
403  * The numbers chosen here are somewhat arbitrary but absolutely MUST
404  * not overlap with any of the number assigned in <linux/ptrace.h>.
405  */
406 #define PTRACE_SINGLEBLOCK	12	/* resume execution until next branch */
407 
408 /*
409  * PT_PROT definition is loosely based on hppa bsd definition in
410  * gdb/hppab-nat.c
411  */
412 #define PTRACE_PROT			  21
413 
414 typedef enum {
415 	ptprot_set_access_watchpoint,
416 	ptprot_set_write_watchpoint,
417 	ptprot_disable_watchpoint
418 } ptprot_flags;
419 
420 typedef struct {
421 	unsigned long lowaddr;
422 	unsigned long hiaddr;
423 	ptprot_flags prot;
424 } ptprot_area;
425 
426 /* Sequence of bytes for breakpoint illegal instruction.  */
427 #define S390_BREAKPOINT     {0x0,0x1}
428 #define S390_BREAKPOINT_U16 ((__u16)0x0001)
429 #define S390_SYSCALL_OPCODE ((__u16)0x0a00)
430 #define S390_SYSCALL_SIZE   2
431 
432 /*
433  * The user_regs_struct defines the way the user registers are
434  * store on the stack for signal handling.
435  */
436 struct user_regs_struct {
437 	psw_t psw;
438 	unsigned long gprs[NUM_GPRS];
439 	unsigned int  acrs[NUM_ACRS];
440 	unsigned long orig_gpr2;
441 	s390_fp_regs fp_regs;
442 	/*
443 	 * These per registers are in here so that gdb can modify them
444 	 * itself as there is no "official" ptrace interface for hardware
445 	 * watchpoints. This is the way intel does it.
446 	 */
447 	per_struct per_info;
448 	unsigned long ieee_instruction_pointer;	/* obsolete, always 0 */
449 };
450 
451 #endif /* __ASSEMBLY__ */
452 
453 #endif /* _UAPI_S390_PTRACE_H */
454