1 #ifndef _S390_TLB_H 2 #define _S390_TLB_H 3 4 /* 5 * TLB flushing on s390 is complicated. The following requirement 6 * from the principles of operation is the most arduous: 7 * 8 * "A valid table entry must not be changed while it is attached 9 * to any CPU and may be used for translation by that CPU except to 10 * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY, 11 * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page 12 * table entry, or (3) make a change by means of a COMPARE AND SWAP 13 * AND PURGE instruction that purges the TLB." 14 * 15 * The modification of a pte of an active mm struct therefore is 16 * a two step process: i) invalidate the pte, ii) store the new pte. 17 * This is true for the page protection bit as well. 18 * The only possible optimization is to flush at the beginning of 19 * a tlb_gather_mmu cycle if the mm_struct is currently not in use. 20 * 21 * Pages used for the page tables is a different story. FIXME: more 22 */ 23 24 #include <linux/mm.h> 25 #include <linux/pagemap.h> 26 #include <linux/swap.h> 27 #include <asm/processor.h> 28 #include <asm/pgalloc.h> 29 #include <asm/tlbflush.h> 30 31 struct mmu_gather { 32 struct mm_struct *mm; 33 #ifdef CONFIG_HAVE_RCU_TABLE_FREE 34 struct mmu_table_batch *batch; 35 #endif 36 unsigned int fullmm; 37 unsigned int need_flush; 38 }; 39 40 #ifdef CONFIG_HAVE_RCU_TABLE_FREE 41 struct mmu_table_batch { 42 struct rcu_head rcu; 43 unsigned int nr; 44 void *tables[0]; 45 }; 46 47 #define MAX_TABLE_BATCH \ 48 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *)) 49 50 extern void tlb_table_flush(struct mmu_gather *tlb); 51 extern void tlb_remove_table(struct mmu_gather *tlb, void *table); 52 #endif 53 54 static inline void tlb_gather_mmu(struct mmu_gather *tlb, 55 struct mm_struct *mm, 56 unsigned int full_mm_flush) 57 { 58 tlb->mm = mm; 59 tlb->fullmm = full_mm_flush; 60 tlb->need_flush = 0; 61 #ifdef CONFIG_HAVE_RCU_TABLE_FREE 62 tlb->batch = NULL; 63 #endif 64 if (tlb->fullmm) 65 __tlb_flush_mm(mm); 66 } 67 68 static inline void tlb_flush_mmu(struct mmu_gather *tlb) 69 { 70 if (!tlb->need_flush) 71 return; 72 tlb->need_flush = 0; 73 __tlb_flush_mm(tlb->mm); 74 #ifdef CONFIG_HAVE_RCU_TABLE_FREE 75 tlb_table_flush(tlb); 76 #endif 77 } 78 79 static inline void tlb_finish_mmu(struct mmu_gather *tlb, 80 unsigned long start, unsigned long end) 81 { 82 tlb_flush_mmu(tlb); 83 } 84 85 /* 86 * Release the page cache reference for a pte removed by 87 * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page 88 * has already been freed, so just do free_page_and_swap_cache. 89 */ 90 static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page) 91 { 92 free_page_and_swap_cache(page); 93 return 1; /* avoid calling tlb_flush_mmu */ 94 } 95 96 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) 97 { 98 free_page_and_swap_cache(page); 99 } 100 101 /* 102 * pte_free_tlb frees a pte table and clears the CRSTE for the 103 * page table from the tlb. 104 */ 105 static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, 106 unsigned long address) 107 { 108 #ifdef CONFIG_HAVE_RCU_TABLE_FREE 109 if (!tlb->fullmm) 110 return page_table_free_rcu(tlb, (unsigned long *) pte); 111 #endif 112 page_table_free(tlb->mm, (unsigned long *) pte); 113 } 114 115 /* 116 * pmd_free_tlb frees a pmd table and clears the CRSTE for the 117 * segment table entry from the tlb. 118 * If the mm uses a two level page table the single pmd is freed 119 * as the pgd. pmd_free_tlb checks the asce_limit against 2GB 120 * to avoid the double free of the pmd in this case. 121 */ 122 static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd, 123 unsigned long address) 124 { 125 #ifdef __s390x__ 126 if (tlb->mm->context.asce_limit <= (1UL << 31)) 127 return; 128 #ifdef CONFIG_HAVE_RCU_TABLE_FREE 129 if (!tlb->fullmm) 130 return tlb_remove_table(tlb, pmd); 131 #endif 132 crst_table_free(tlb->mm, (unsigned long *) pmd); 133 #endif 134 } 135 136 /* 137 * pud_free_tlb frees a pud table and clears the CRSTE for the 138 * region third table entry from the tlb. 139 * If the mm uses a three level page table the single pud is freed 140 * as the pgd. pud_free_tlb checks the asce_limit against 4TB 141 * to avoid the double free of the pud in this case. 142 */ 143 static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud, 144 unsigned long address) 145 { 146 #ifdef __s390x__ 147 if (tlb->mm->context.asce_limit <= (1UL << 42)) 148 return; 149 #ifdef CONFIG_HAVE_RCU_TABLE_FREE 150 if (!tlb->fullmm) 151 return tlb_remove_table(tlb, pud); 152 #endif 153 crst_table_free(tlb->mm, (unsigned long *) pud); 154 #endif 155 } 156 157 #define tlb_start_vma(tlb, vma) do { } while (0) 158 #define tlb_end_vma(tlb, vma) do { } while (0) 159 #define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0) 160 #define tlb_migrate_finish(mm) do { } while (0) 161 162 #endif /* _S390_TLB_H */ 163