1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright IBM Corp. 2000, 2008 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 5 * Jan Glauber <jang@linux.vnet.ibm.com> 6 * 7 */ 8 #ifndef __QDIO_H__ 9 #define __QDIO_H__ 10 11 #include <linux/interrupt.h> 12 #include <asm/cio.h> 13 #include <asm/ccwdev.h> 14 15 /* only use 4 queues to save some cachelines */ 16 #define QDIO_MAX_QUEUES_PER_IRQ 4 17 #define QDIO_MAX_BUFFERS_PER_Q 128 18 #define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1) 19 #define QDIO_MAX_ELEMENTS_PER_BUFFER 16 20 #define QDIO_SBAL_SIZE 256 21 22 #define QDIO_QETH_QFMT 0 23 #define QDIO_ZFCP_QFMT 1 24 #define QDIO_IQDIO_QFMT 2 25 26 /** 27 * struct qdesfmt0 - queue descriptor, format 0 28 * @sliba: storage list information block address 29 * @sla: storage list address 30 * @slsba: storage list state block address 31 * @akey: access key for DLIB 32 * @bkey: access key for SL 33 * @ckey: access key for SBALs 34 * @dkey: access key for SLSB 35 */ 36 struct qdesfmt0 { 37 u64 sliba; 38 u64 sla; 39 u64 slsba; 40 u32 : 32; 41 u32 akey : 4; 42 u32 bkey : 4; 43 u32 ckey : 4; 44 u32 dkey : 4; 45 u32 : 16; 46 } __attribute__ ((packed)); 47 48 #define QDR_AC_MULTI_BUFFER_ENABLE 0x01 49 50 /** 51 * struct qdr - queue description record (QDR) 52 * @qfmt: queue format 53 * @pfmt: implementation dependent parameter format 54 * @ac: adapter characteristics 55 * @iqdcnt: input queue descriptor count 56 * @oqdcnt: output queue descriptor count 57 * @iqdsz: inpout queue descriptor size 58 * @oqdsz: output queue descriptor size 59 * @qiba: queue information block address 60 * @qkey: queue information block key 61 * @qdf0: queue descriptions 62 */ 63 struct qdr { 64 u32 qfmt : 8; 65 u32 pfmt : 8; 66 u32 : 8; 67 u32 ac : 8; 68 u32 : 8; 69 u32 iqdcnt : 8; 70 u32 : 8; 71 u32 oqdcnt : 8; 72 u32 : 8; 73 u32 iqdsz : 8; 74 u32 : 8; 75 u32 oqdsz : 8; 76 /* private: */ 77 u32 res[9]; 78 /* public: */ 79 u64 qiba; 80 u32 : 32; 81 u32 qkey : 4; 82 u32 : 28; 83 struct qdesfmt0 qdf0[126]; 84 } __packed __aligned(PAGE_SIZE); 85 86 #define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40 87 #define QIB_RFLAGS_ENABLE_QEBSM 0x80 88 #define QIB_RFLAGS_ENABLE_DATA_DIV 0x02 89 90 /** 91 * struct qib - queue information block (QIB) 92 * @qfmt: queue format 93 * @pfmt: implementation dependent parameter format 94 * @rflags: QEBSM 95 * @ac: adapter characteristics 96 * @isliba: absolute address of first input SLIB 97 * @osliba: absolute address of first output SLIB 98 * @ebcnam: adapter identifier in EBCDIC 99 * @parm: implementation dependent parameters 100 */ 101 struct qib { 102 u32 qfmt : 8; 103 u32 pfmt : 8; 104 u32 rflags : 8; 105 u32 ac : 8; 106 u32 : 32; 107 u64 isliba; 108 u64 osliba; 109 u32 : 32; 110 u32 : 32; 111 u8 ebcnam[8]; 112 /* private: */ 113 u8 res[88]; 114 /* public: */ 115 u8 parm[QDIO_MAX_BUFFERS_PER_Q]; 116 } __attribute__ ((packed, aligned(256))); 117 118 /** 119 * struct slibe - storage list information block element (SLIBE) 120 * @parms: implementation dependent parameters 121 */ 122 struct slibe { 123 u64 parms; 124 }; 125 126 /** 127 * struct qaob - queue asynchronous operation block 128 * @res0: reserved parameters 129 * @res1: reserved parameter 130 * @res2: reserved parameter 131 * @res3: reserved parameter 132 * @aorc: asynchronous operation return code 133 * @flags: internal flags 134 * @cbtbs: control block type 135 * @sb_count: number of storage blocks 136 * @sba: storage block element addresses 137 * @dcount: size of storage block elements 138 * @user0: user defineable value 139 * @res4: reserved paramater 140 * @user1: user defineable value 141 * @user2: user defineable value 142 */ 143 struct qaob { 144 u64 res0[6]; 145 u8 res1; 146 u8 res2; 147 u8 res3; 148 u8 aorc; 149 u8 flags; 150 u16 cbtbs; 151 u8 sb_count; 152 u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER]; 153 u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER]; 154 u64 user0; 155 u64 res4[2]; 156 u64 user1; 157 u64 user2; 158 } __attribute__ ((packed, aligned(256))); 159 160 /** 161 * struct slib - storage list information block (SLIB) 162 * @nsliba: next SLIB address (if any) 163 * @sla: SL address 164 * @slsba: SLSB address 165 * @slibe: SLIB elements 166 */ 167 struct slib { 168 u64 nsliba; 169 u64 sla; 170 u64 slsba; 171 /* private: */ 172 u8 res[1000]; 173 /* public: */ 174 struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q]; 175 } __attribute__ ((packed, aligned(2048))); 176 177 #define SBAL_EFLAGS_LAST_ENTRY 0x40 178 #define SBAL_EFLAGS_CONTIGUOUS 0x20 179 #define SBAL_EFLAGS_FIRST_FRAG 0x04 180 #define SBAL_EFLAGS_MIDDLE_FRAG 0x08 181 #define SBAL_EFLAGS_LAST_FRAG 0x0c 182 #define SBAL_EFLAGS_MASK 0x6f 183 184 #define SBAL_SFLAGS0_PCI_REQ 0x40 185 #define SBAL_SFLAGS0_DATA_CONTINUATION 0x20 186 187 /* Awesome OpenFCP extensions */ 188 #define SBAL_SFLAGS0_TYPE_STATUS 0x00 189 #define SBAL_SFLAGS0_TYPE_WRITE 0x08 190 #define SBAL_SFLAGS0_TYPE_READ 0x10 191 #define SBAL_SFLAGS0_TYPE_WRITE_READ 0x18 192 #define SBAL_SFLAGS0_MORE_SBALS 0x04 193 #define SBAL_SFLAGS0_COMMAND 0x02 194 #define SBAL_SFLAGS0_LAST_SBAL 0x00 195 #define SBAL_SFLAGS0_ONLY_SBAL SBAL_SFLAGS0_COMMAND 196 #define SBAL_SFLAGS0_MIDDLE_SBAL SBAL_SFLAGS0_MORE_SBALS 197 #define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND) 198 199 /** 200 * struct qdio_buffer_element - SBAL entry 201 * @eflags: SBAL entry flags 202 * @scount: SBAL count 203 * @sflags: whole SBAL flags 204 * @length: length 205 * @addr: address 206 */ 207 struct qdio_buffer_element { 208 u8 eflags; 209 /* private: */ 210 u8 res1; 211 /* public: */ 212 u8 scount; 213 u8 sflags; 214 u32 length; 215 void *addr; 216 } __attribute__ ((packed, aligned(16))); 217 218 /** 219 * struct qdio_buffer - storage block address list (SBAL) 220 * @element: SBAL entries 221 */ 222 struct qdio_buffer { 223 struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER]; 224 } __attribute__ ((packed, aligned(256))); 225 226 /** 227 * struct sl_element - storage list entry 228 * @sbal: absolute SBAL address 229 */ 230 struct sl_element { 231 unsigned long sbal; 232 } __attribute__ ((packed)); 233 234 /** 235 * struct sl - storage list (SL) 236 * @element: SL entries 237 */ 238 struct sl { 239 struct sl_element element[QDIO_MAX_BUFFERS_PER_Q]; 240 } __attribute__ ((packed, aligned(1024))); 241 242 /** 243 * struct slsb - storage list state block (SLSB) 244 * @val: state per buffer 245 */ 246 struct slsb { 247 u8 val[QDIO_MAX_BUFFERS_PER_Q]; 248 } __attribute__ ((packed, aligned(256))); 249 250 /** 251 * struct qdio_outbuf_state - SBAL related asynchronous operation information 252 * (for communication with upper layer programs) 253 * (only required for use with completion queues) 254 * @flags: flags indicating state of buffer 255 * @aob: pointer to QAOB used for the particular SBAL 256 * @user: pointer to upper layer program's state information related to SBAL 257 * (stored in user1 data of QAOB) 258 */ 259 struct qdio_outbuf_state { 260 u8 flags; 261 struct qaob *aob; 262 void *user; 263 }; 264 265 #define QDIO_OUTBUF_STATE_FLAG_PENDING 0x01 266 267 #define CHSC_AC1_INITIATE_INPUTQ 0x80 268 269 270 /* qdio adapter-characteristics-1 flag */ 271 #define AC1_SIGA_INPUT_NEEDED 0x40 /* process input queues */ 272 #define AC1_SIGA_OUTPUT_NEEDED 0x20 /* process output queues */ 273 #define AC1_SIGA_SYNC_NEEDED 0x10 /* ask hypervisor to sync */ 274 #define AC1_AUTOMATIC_SYNC_ON_THININT 0x08 /* set by hypervisor */ 275 #define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04 /* set by hypervisor */ 276 #define AC1_SC_QEBSM_AVAILABLE 0x02 /* available for subchannel */ 277 #define AC1_SC_QEBSM_ENABLED 0x01 /* enabled for subchannel */ 278 279 #define CHSC_AC2_MULTI_BUFFER_AVAILABLE 0x0080 280 #define CHSC_AC2_MULTI_BUFFER_ENABLED 0x0040 281 #define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010 282 #define CHSC_AC2_DATA_DIV_ENABLED 0x0002 283 284 #define CHSC_AC3_FORMAT2_CQ_AVAILABLE 0x8000 285 286 struct qdio_ssqd_desc { 287 u8 flags; 288 u8:8; 289 u16 sch; 290 u8 qfmt; 291 u8 parm; 292 u8 qdioac1; 293 u8 sch_class; 294 u8 pcnt; 295 u8 icnt; 296 u8:8; 297 u8 ocnt; 298 u8:8; 299 u8 mbccnt; 300 u16 qdioac2; 301 u64 sch_token; 302 u8 mro; 303 u8 mri; 304 u16 qdioac3; 305 u16:16; 306 u8:8; 307 u8 mmwc; 308 } __attribute__ ((packed)); 309 310 /* params are: ccw_device, qdio_error, queue_number, 311 first element processed, number of elements processed, int_parm */ 312 typedef void qdio_handler_t(struct ccw_device *, unsigned int, int, 313 int, int, unsigned long); 314 315 /* qdio errors reported to the upper-layer program */ 316 #define QDIO_ERROR_ACTIVATE 0x0001 317 #define QDIO_ERROR_GET_BUF_STATE 0x0002 318 #define QDIO_ERROR_SET_BUF_STATE 0x0004 319 #define QDIO_ERROR_SLSB_STATE 0x0100 320 321 #define QDIO_ERROR_FATAL 0x00ff 322 #define QDIO_ERROR_TEMPORARY 0xff00 323 324 /* for qdio_cleanup */ 325 #define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01 326 #define QDIO_FLAG_CLEANUP_USING_HALT 0x02 327 328 /** 329 * struct qdio_initialize - qdio initialization data 330 * @cdev: associated ccw device 331 * @q_format: queue format 332 * @adapter_name: name for the adapter 333 * @qib_param_field_format: format for qib_parm_field 334 * @qib_param_field: pointer to 128 bytes or NULL, if no param field 335 * @qib_rflags: rflags to set 336 * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL 337 * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL 338 * @no_input_qs: number of input queues 339 * @no_output_qs: number of output queues 340 * @input_handler: handler to be called for input queues 341 * @output_handler: handler to be called for output queues 342 * @queue_start_poll_array: polling handlers (one per input queue or NULL) 343 * @int_parm: interruption parameter 344 * @input_sbal_addr_array: address of no_input_qs * 128 pointers 345 * @output_sbal_addr_array: address of no_output_qs * 128 pointers 346 * @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL) 347 */ 348 struct qdio_initialize { 349 struct ccw_device *cdev; 350 unsigned char q_format; 351 unsigned char qdr_ac; 352 unsigned char adapter_name[8]; 353 unsigned int qib_param_field_format; 354 unsigned char *qib_param_field; 355 unsigned char qib_rflags; 356 unsigned long *input_slib_elements; 357 unsigned long *output_slib_elements; 358 unsigned int no_input_qs; 359 unsigned int no_output_qs; 360 qdio_handler_t *input_handler; 361 qdio_handler_t *output_handler; 362 void (**queue_start_poll_array) (struct ccw_device *, int, 363 unsigned long); 364 int scan_threshold; 365 unsigned long int_parm; 366 void **input_sbal_addr_array; 367 void **output_sbal_addr_array; 368 struct qdio_outbuf_state *output_sbal_state_array; 369 }; 370 371 /** 372 * enum qdio_brinfo_entry_type - type of address entry for qdio_brinfo_desc() 373 * @l3_ipv6_addr: entry contains IPv6 address 374 * @l3_ipv4_addr: entry contains IPv4 address 375 * @l2_addr_lnid: entry contains MAC address and VLAN ID 376 */ 377 enum qdio_brinfo_entry_type {l3_ipv6_addr, l3_ipv4_addr, l2_addr_lnid}; 378 379 /** 380 * struct qdio_brinfo_entry_XXX - Address entry for qdio_brinfo_desc() 381 * @nit: Network interface token 382 * @addr: Address of one of the three types 383 * 384 * The struct is passed to the callback function by qdio_brinfo_desc() 385 */ 386 struct qdio_brinfo_entry_l3_ipv6 { 387 u64 nit; 388 struct { unsigned char _s6_addr[16]; } addr; 389 } __packed; 390 struct qdio_brinfo_entry_l3_ipv4 { 391 u64 nit; 392 struct { uint32_t _s_addr; } addr; 393 } __packed; 394 struct qdio_brinfo_entry_l2 { 395 u64 nit; 396 struct { u8 mac[6]; u16 lnid; } addr_lnid; 397 } __packed; 398 399 #define QDIO_STATE_INACTIVE 0x00000002 /* after qdio_cleanup */ 400 #define QDIO_STATE_ESTABLISHED 0x00000004 /* after qdio_establish */ 401 #define QDIO_STATE_ACTIVE 0x00000008 /* after qdio_activate */ 402 #define QDIO_STATE_STOPPED 0x00000010 /* after queues went down */ 403 404 #define QDIO_FLAG_SYNC_INPUT 0x01 405 #define QDIO_FLAG_SYNC_OUTPUT 0x02 406 #define QDIO_FLAG_PCI_OUT 0x10 407 408 int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count); 409 void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count); 410 void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count); 411 412 extern int qdio_allocate(struct qdio_initialize *); 413 extern int qdio_establish(struct qdio_initialize *); 414 extern int qdio_activate(struct ccw_device *); 415 extern void qdio_release_aob(struct qaob *); 416 extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int, 417 unsigned int); 418 extern int qdio_start_irq(struct ccw_device *, int); 419 extern int qdio_stop_irq(struct ccw_device *, int); 420 extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *); 421 extern int qdio_shutdown(struct ccw_device *, int); 422 extern int qdio_free(struct ccw_device *); 423 extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *); 424 extern int qdio_pnso_brinfo(struct subchannel_id schid, 425 int cnc, u16 *response, 426 void (*cb)(void *priv, enum qdio_brinfo_entry_type type, 427 void *entry), 428 void *priv); 429 430 #endif /* __QDIO_H__ */ 431