xref: /openbmc/linux/arch/s390/include/asm/ptrace.h (revision d2168146)
1 /*
2  *  S390 version
3  *    Copyright IBM Corp. 1999, 2000
4  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
5  */
6 #ifndef _S390_PTRACE_H
7 #define _S390_PTRACE_H
8 
9 #include <uapi/asm/ptrace.h>
10 
11 #define PIF_SYSCALL		0	/* inside a system call */
12 #define PIF_PER_TRAP		1	/* deliver sigtrap on return to user */
13 
14 #define _PIF_SYSCALL		(1<<PIF_SYSCALL)
15 #define _PIF_PER_TRAP		(1<<PIF_PER_TRAP)
16 
17 #ifndef __ASSEMBLY__
18 
19 #define PSW_KERNEL_BITS	(PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
20 			 PSW_MASK_EA | PSW_MASK_BA)
21 #define PSW_USER_BITS	(PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
22 			 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
23 			 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
24 
25 struct psw_bits {
26 	unsigned long long	: 1;
27 	unsigned long long r	: 1; /* PER-Mask */
28 	unsigned long long	: 3;
29 	unsigned long long t	: 1; /* DAT Mode */
30 	unsigned long long i	: 1; /* Input/Output Mask */
31 	unsigned long long e	: 1; /* External Mask */
32 	unsigned long long key	: 4; /* PSW Key */
33 	unsigned long long	: 1;
34 	unsigned long long m	: 1; /* Machine-Check Mask */
35 	unsigned long long w	: 1; /* Wait State */
36 	unsigned long long p	: 1; /* Problem State */
37 	unsigned long long as	: 2; /* Address Space Control */
38 	unsigned long long cc	: 2; /* Condition Code */
39 	unsigned long long pm	: 4; /* Program Mask */
40 	unsigned long long ri	: 1; /* Runtime Instrumentation */
41 	unsigned long long	: 6;
42 	unsigned long long eaba : 2; /* Addressing Mode */
43 #ifdef CONFIG_64BIT
44 	unsigned long long	: 31;
45 	unsigned long long ia	: 64;/* Instruction Address */
46 #else
47 	unsigned long long ia	: 31;/* Instruction Address */
48 #endif
49 };
50 
51 enum {
52 	PSW_AMODE_24BIT = 0,
53 	PSW_AMODE_31BIT = 1,
54 	PSW_AMODE_64BIT = 3
55 };
56 
57 enum {
58 	PSW_AS_PRIMARY	 = 0,
59 	PSW_AS_ACCREG	 = 1,
60 	PSW_AS_SECONDARY = 2,
61 	PSW_AS_HOME	 = 3
62 };
63 
64 #define psw_bits(__psw) (*({			\
65 	typecheck(psw_t, __psw);		\
66 	&(*(struct psw_bits *)(&(__psw)));	\
67 }))
68 
69 /*
70  * The pt_regs struct defines the way the registers are stored on
71  * the stack during a system call.
72  */
73 struct pt_regs
74 {
75 	unsigned long args[1];
76 	psw_t psw;
77 	unsigned long gprs[NUM_GPRS];
78 	unsigned long orig_gpr2;
79 	unsigned int int_code;
80 	unsigned int int_parm;
81 	unsigned long int_parm_long;
82 	unsigned long flags;
83 };
84 
85 /*
86  * Program event recording (PER) register set.
87  */
88 struct per_regs {
89 	unsigned long control;		/* PER control bits */
90 	unsigned long start;		/* PER starting address */
91 	unsigned long end;		/* PER ending address */
92 };
93 
94 /*
95  * PER event contains information about the cause of the last PER exception.
96  */
97 struct per_event {
98 	unsigned short cause;		/* PER code, ATMID and AI */
99 	unsigned long address;		/* PER address */
100 	unsigned char paid;		/* PER access identification */
101 };
102 
103 /*
104  * Simplified per_info structure used to decode the ptrace user space ABI.
105  */
106 struct per_struct_kernel {
107 	unsigned long cr9;		/* PER control bits */
108 	unsigned long cr10;		/* PER starting address */
109 	unsigned long cr11;		/* PER ending address */
110 	unsigned long bits;		/* Obsolete software bits */
111 	unsigned long starting_addr;	/* User specified start address */
112 	unsigned long ending_addr;	/* User specified end address */
113 	unsigned short perc_atmid;	/* PER trap ATMID */
114 	unsigned long address;		/* PER trap instruction address */
115 	unsigned char access_id;	/* PER trap access identification */
116 };
117 
118 #define PER_EVENT_MASK			0xEB000000UL
119 
120 #define PER_EVENT_BRANCH		0x80000000UL
121 #define PER_EVENT_IFETCH		0x40000000UL
122 #define PER_EVENT_STORE			0x20000000UL
123 #define PER_EVENT_STORE_REAL		0x08000000UL
124 #define PER_EVENT_TRANSACTION_END	0x02000000UL
125 #define PER_EVENT_NULLIFICATION		0x01000000UL
126 
127 #define PER_CONTROL_MASK		0x00e00000UL
128 
129 #define PER_CONTROL_BRANCH_ADDRESS	0x00800000UL
130 #define PER_CONTROL_SUSPENSION		0x00400000UL
131 #define PER_CONTROL_ALTERATION		0x00200000UL
132 
133 static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
134 {
135 	regs->flags |= (1U << flag);
136 }
137 
138 static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
139 {
140 	regs->flags &= ~(1U << flag);
141 }
142 
143 static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
144 {
145 	return !!(regs->flags & (1U << flag));
146 }
147 
148 /*
149  * These are defined as per linux/ptrace.h, which see.
150  */
151 #define arch_has_single_step()	(1)
152 #define arch_has_block_step()	(1)
153 
154 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
155 #define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
156 #define user_stack_pointer(regs)((regs)->gprs[15])
157 #define profile_pc(regs) instruction_pointer(regs)
158 
159 static inline long regs_return_value(struct pt_regs *regs)
160 {
161 	return regs->gprs[2];
162 }
163 
164 int regs_query_register_offset(const char *name);
165 const char *regs_query_register_name(unsigned int offset);
166 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
167 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
168 
169 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
170 {
171 	return regs->gprs[15] & PSW_ADDR_INSN;
172 }
173 
174 #endif /* __ASSEMBLY__ */
175 #endif /* _S390_PTRACE_H */
176