xref: /openbmc/linux/arch/s390/include/asm/ptrace.h (revision a06c488d)
1 /*
2  *  S390 version
3  *    Copyright IBM Corp. 1999, 2000
4  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
5  */
6 #ifndef _S390_PTRACE_H
7 #define _S390_PTRACE_H
8 
9 #include <linux/const.h>
10 #include <uapi/asm/ptrace.h>
11 
12 #define PIF_SYSCALL		0	/* inside a system call */
13 #define PIF_PER_TRAP		1	/* deliver sigtrap on return to user */
14 
15 #define _PIF_SYSCALL		_BITUL(PIF_SYSCALL)
16 #define _PIF_PER_TRAP		_BITUL(PIF_PER_TRAP)
17 
18 #ifndef __ASSEMBLY__
19 
20 #define PSW_KERNEL_BITS	(PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
21 			 PSW_MASK_EA | PSW_MASK_BA)
22 #define PSW_USER_BITS	(PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
23 			 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
24 			 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
25 
26 struct psw_bits {
27 	unsigned long	   :  1;
28 	unsigned long r	   :  1; /* PER-Mask */
29 	unsigned long	   :  3;
30 	unsigned long t	   :  1; /* DAT Mode */
31 	unsigned long i	   :  1; /* Input/Output Mask */
32 	unsigned long e	   :  1; /* External Mask */
33 	unsigned long key  :  4; /* PSW Key */
34 	unsigned long	   :  1;
35 	unsigned long m	   :  1; /* Machine-Check Mask */
36 	unsigned long w	   :  1; /* Wait State */
37 	unsigned long p	   :  1; /* Problem State */
38 	unsigned long as   :  2; /* Address Space Control */
39 	unsigned long cc   :  2; /* Condition Code */
40 	unsigned long pm   :  4; /* Program Mask */
41 	unsigned long ri   :  1; /* Runtime Instrumentation */
42 	unsigned long	   :  6;
43 	unsigned long eaba :  2; /* Addressing Mode */
44 	unsigned long	   : 31;
45 	unsigned long ia   : 64; /* Instruction Address */
46 };
47 
48 enum {
49 	PSW_AMODE_24BIT = 0,
50 	PSW_AMODE_31BIT = 1,
51 	PSW_AMODE_64BIT = 3
52 };
53 
54 enum {
55 	PSW_AS_PRIMARY	 = 0,
56 	PSW_AS_ACCREG	 = 1,
57 	PSW_AS_SECONDARY = 2,
58 	PSW_AS_HOME	 = 3
59 };
60 
61 #define psw_bits(__psw) (*({			\
62 	typecheck(psw_t, __psw);		\
63 	&(*(struct psw_bits *)(&(__psw)));	\
64 }))
65 
66 /*
67  * The pt_regs struct defines the way the registers are stored on
68  * the stack during a system call.
69  */
70 struct pt_regs
71 {
72 	unsigned long args[1];
73 	psw_t psw;
74 	unsigned long gprs[NUM_GPRS];
75 	unsigned long orig_gpr2;
76 	unsigned int int_code;
77 	unsigned int int_parm;
78 	unsigned long int_parm_long;
79 	unsigned long flags;
80 };
81 
82 /*
83  * Program event recording (PER) register set.
84  */
85 struct per_regs {
86 	unsigned long control;		/* PER control bits */
87 	unsigned long start;		/* PER starting address */
88 	unsigned long end;		/* PER ending address */
89 };
90 
91 /*
92  * PER event contains information about the cause of the last PER exception.
93  */
94 struct per_event {
95 	unsigned short cause;		/* PER code, ATMID and AI */
96 	unsigned long address;		/* PER address */
97 	unsigned char paid;		/* PER access identification */
98 };
99 
100 /*
101  * Simplified per_info structure used to decode the ptrace user space ABI.
102  */
103 struct per_struct_kernel {
104 	unsigned long cr9;		/* PER control bits */
105 	unsigned long cr10;		/* PER starting address */
106 	unsigned long cr11;		/* PER ending address */
107 	unsigned long bits;		/* Obsolete software bits */
108 	unsigned long starting_addr;	/* User specified start address */
109 	unsigned long ending_addr;	/* User specified end address */
110 	unsigned short perc_atmid;	/* PER trap ATMID */
111 	unsigned long address;		/* PER trap instruction address */
112 	unsigned char access_id;	/* PER trap access identification */
113 };
114 
115 #define PER_EVENT_MASK			0xEB000000UL
116 
117 #define PER_EVENT_BRANCH		0x80000000UL
118 #define PER_EVENT_IFETCH		0x40000000UL
119 #define PER_EVENT_STORE			0x20000000UL
120 #define PER_EVENT_STORE_REAL		0x08000000UL
121 #define PER_EVENT_TRANSACTION_END	0x02000000UL
122 #define PER_EVENT_NULLIFICATION		0x01000000UL
123 
124 #define PER_CONTROL_MASK		0x00e00000UL
125 
126 #define PER_CONTROL_BRANCH_ADDRESS	0x00800000UL
127 #define PER_CONTROL_SUSPENSION		0x00400000UL
128 #define PER_CONTROL_ALTERATION		0x00200000UL
129 
130 static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
131 {
132 	regs->flags |= (1UL << flag);
133 }
134 
135 static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
136 {
137 	regs->flags &= ~(1UL << flag);
138 }
139 
140 static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
141 {
142 	return !!(regs->flags & (1UL << flag));
143 }
144 
145 /*
146  * These are defined as per linux/ptrace.h, which see.
147  */
148 #define arch_has_single_step()	(1)
149 #define arch_has_block_step()	(1)
150 
151 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
152 #define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
153 #define user_stack_pointer(regs)((regs)->gprs[15])
154 #define profile_pc(regs) instruction_pointer(regs)
155 
156 static inline long regs_return_value(struct pt_regs *regs)
157 {
158 	return regs->gprs[2];
159 }
160 
161 static inline void instruction_pointer_set(struct pt_regs *regs,
162 					   unsigned long val)
163 {
164 	regs->psw.addr = val | PSW_ADDR_AMODE;
165 }
166 
167 int regs_query_register_offset(const char *name);
168 const char *regs_query_register_name(unsigned int offset);
169 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
170 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
171 
172 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
173 {
174 	return regs->gprs[15] & PSW_ADDR_INSN;
175 }
176 
177 #endif /* __ASSEMBLY__ */
178 #endif /* _S390_PTRACE_H */
179