1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * S390 version 4 * Copyright IBM Corp. 1999, 2000 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 6 */ 7 #ifndef _S390_PTRACE_H 8 #define _S390_PTRACE_H 9 10 #include <linux/bits.h> 11 #include <uapi/asm/ptrace.h> 12 13 #define PIF_SYSCALL 0 /* inside a system call */ 14 #define PIF_SYSCALL_RESTART 1 /* restart the current system call */ 15 #define PIF_SYSCALL_RET_SET 2 /* return value was set via ptrace */ 16 #define PIF_GUEST_FAULT 3 /* indicates program check in sie64a */ 17 18 #define _PIF_SYSCALL BIT(PIF_SYSCALL) 19 #define _PIF_SYSCALL_RESTART BIT(PIF_SYSCALL_RESTART) 20 #define _PIF_SYSCALL_RET_SET BIT(PIF_SYSCALL_RET_SET) 21 #define _PIF_GUEST_FAULT BIT(PIF_GUEST_FAULT) 22 23 #ifndef __ASSEMBLY__ 24 25 #define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \ 26 PSW_MASK_EA | PSW_MASK_BA) 27 #define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \ 28 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \ 29 PSW_MASK_PSTATE | PSW_ASC_PRIMARY) 30 31 struct psw_bits { 32 unsigned long : 1; 33 unsigned long per : 1; /* PER-Mask */ 34 unsigned long : 3; 35 unsigned long dat : 1; /* DAT Mode */ 36 unsigned long io : 1; /* Input/Output Mask */ 37 unsigned long ext : 1; /* External Mask */ 38 unsigned long key : 4; /* PSW Key */ 39 unsigned long : 1; 40 unsigned long mcheck : 1; /* Machine-Check Mask */ 41 unsigned long wait : 1; /* Wait State */ 42 unsigned long pstate : 1; /* Problem State */ 43 unsigned long as : 2; /* Address Space Control */ 44 unsigned long cc : 2; /* Condition Code */ 45 unsigned long pm : 4; /* Program Mask */ 46 unsigned long ri : 1; /* Runtime Instrumentation */ 47 unsigned long : 6; 48 unsigned long eaba : 2; /* Addressing Mode */ 49 unsigned long : 31; 50 unsigned long ia : 64; /* Instruction Address */ 51 }; 52 53 enum { 54 PSW_BITS_AMODE_24BIT = 0, 55 PSW_BITS_AMODE_31BIT = 1, 56 PSW_BITS_AMODE_64BIT = 3 57 }; 58 59 enum { 60 PSW_BITS_AS_PRIMARY = 0, 61 PSW_BITS_AS_ACCREG = 1, 62 PSW_BITS_AS_SECONDARY = 2, 63 PSW_BITS_AS_HOME = 3 64 }; 65 66 #define psw_bits(__psw) (*({ \ 67 typecheck(psw_t, __psw); \ 68 &(*(struct psw_bits *)(&(__psw))); \ 69 })) 70 71 #define PGM_INT_CODE_MASK 0x7f 72 #define PGM_INT_CODE_PER 0x80 73 74 /* 75 * The pt_regs struct defines the way the registers are stored on 76 * the stack during a system call. 77 */ 78 struct pt_regs 79 { 80 union { 81 user_pt_regs user_regs; 82 struct { 83 unsigned long args[1]; 84 psw_t psw; 85 unsigned long gprs[NUM_GPRS]; 86 }; 87 }; 88 unsigned long orig_gpr2; 89 unsigned int int_code; 90 unsigned int int_parm; 91 unsigned long int_parm_long; 92 unsigned long flags; 93 unsigned long cr1; 94 }; 95 96 /* 97 * Program event recording (PER) register set. 98 */ 99 struct per_regs { 100 unsigned long control; /* PER control bits */ 101 unsigned long start; /* PER starting address */ 102 unsigned long end; /* PER ending address */ 103 }; 104 105 /* 106 * PER event contains information about the cause of the last PER exception. 107 */ 108 struct per_event { 109 unsigned short cause; /* PER code, ATMID and AI */ 110 unsigned long address; /* PER address */ 111 unsigned char paid; /* PER access identification */ 112 }; 113 114 /* 115 * Simplified per_info structure used to decode the ptrace user space ABI. 116 */ 117 struct per_struct_kernel { 118 unsigned long cr9; /* PER control bits */ 119 unsigned long cr10; /* PER starting address */ 120 unsigned long cr11; /* PER ending address */ 121 unsigned long bits; /* Obsolete software bits */ 122 unsigned long starting_addr; /* User specified start address */ 123 unsigned long ending_addr; /* User specified end address */ 124 unsigned short perc_atmid; /* PER trap ATMID */ 125 unsigned long address; /* PER trap instruction address */ 126 unsigned char access_id; /* PER trap access identification */ 127 }; 128 129 #define PER_EVENT_MASK 0xEB000000UL 130 131 #define PER_EVENT_BRANCH 0x80000000UL 132 #define PER_EVENT_IFETCH 0x40000000UL 133 #define PER_EVENT_STORE 0x20000000UL 134 #define PER_EVENT_STORE_REAL 0x08000000UL 135 #define PER_EVENT_TRANSACTION_END 0x02000000UL 136 #define PER_EVENT_NULLIFICATION 0x01000000UL 137 138 #define PER_CONTROL_MASK 0x00e00000UL 139 140 #define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL 141 #define PER_CONTROL_SUSPENSION 0x00400000UL 142 #define PER_CONTROL_ALTERATION 0x00200000UL 143 144 static inline void set_pt_regs_flag(struct pt_regs *regs, int flag) 145 { 146 regs->flags |= (1UL << flag); 147 } 148 149 static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag) 150 { 151 regs->flags &= ~(1UL << flag); 152 } 153 154 static inline int test_pt_regs_flag(struct pt_regs *regs, int flag) 155 { 156 return !!(regs->flags & (1UL << flag)); 157 } 158 159 /* 160 * These are defined as per linux/ptrace.h, which see. 161 */ 162 #define arch_has_single_step() (1) 163 #define arch_has_block_step() (1) 164 165 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0) 166 #define instruction_pointer(regs) ((regs)->psw.addr) 167 #define user_stack_pointer(regs)((regs)->gprs[15]) 168 #define profile_pc(regs) instruction_pointer(regs) 169 170 static inline long regs_return_value(struct pt_regs *regs) 171 { 172 return regs->gprs[2]; 173 } 174 175 static inline void instruction_pointer_set(struct pt_regs *regs, 176 unsigned long val) 177 { 178 regs->psw.addr = val; 179 } 180 181 int regs_query_register_offset(const char *name); 182 const char *regs_query_register_name(unsigned int offset); 183 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset); 184 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n); 185 186 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) 187 { 188 return regs->gprs[15]; 189 } 190 191 static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc) 192 { 193 regs->gprs[2] = rc; 194 } 195 196 #endif /* __ASSEMBLY__ */ 197 #endif /* _S390_PTRACE_H */ 198