1 /* 2 * include/asm-s390/processor.h 3 * 4 * S390 version 5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation 6 * Author(s): Hartmut Penner (hp@de.ibm.com), 7 * Martin Schwidefsky (schwidefsky@de.ibm.com) 8 * 9 * Derived from "include/asm-i386/processor.h" 10 * Copyright (C) 1994, Linus Torvalds 11 */ 12 13 #ifndef __ASM_S390_PROCESSOR_H 14 #define __ASM_S390_PROCESSOR_H 15 16 #include <linux/linkage.h> 17 #include <asm/ptrace.h> 18 19 #ifdef __KERNEL__ 20 /* 21 * Default implementation of macro that returns current 22 * instruction pointer ("program counter"). 23 */ 24 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 25 26 /* 27 * CPU type and hardware bug flags. Kept separately for each CPU. 28 * Members of this structure are referenced in head.S, so think twice 29 * before touching them. [mj] 30 */ 31 32 typedef struct 33 { 34 unsigned int version : 8; 35 unsigned int ident : 24; 36 unsigned int machine : 16; 37 unsigned int unused : 16; 38 } __attribute__ ((packed)) cpuid_t; 39 40 static inline void get_cpu_id(cpuid_t *ptr) 41 { 42 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr)); 43 } 44 45 extern void s390_adjust_jiffies(void); 46 extern void print_cpu_info(void); 47 extern int get_cpu_capability(unsigned int *); 48 49 /* 50 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 51 */ 52 #ifndef __s390x__ 53 54 #define TASK_SIZE (1UL << 31) 55 #define TASK_UNMAPPED_BASE (1UL << 30) 56 57 #else /* __s390x__ */ 58 59 #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit) 60 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 61 (1UL << 30) : (1UL << 41)) 62 #define TASK_SIZE TASK_SIZE_OF(current) 63 64 #endif /* __s390x__ */ 65 66 #ifdef __KERNEL__ 67 68 #ifndef __s390x__ 69 #define STACK_TOP (1UL << 31) 70 #define STACK_TOP_MAX (1UL << 31) 71 #else /* __s390x__ */ 72 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42)) 73 #define STACK_TOP_MAX (1UL << 42) 74 #endif /* __s390x__ */ 75 76 77 #endif 78 79 #define HAVE_ARCH_PICK_MMAP_LAYOUT 80 81 typedef struct { 82 __u32 ar4; 83 } mm_segment_t; 84 85 /* 86 * Thread structure 87 */ 88 struct thread_struct { 89 s390_fp_regs fp_regs; 90 unsigned int acrs[NUM_ACRS]; 91 unsigned long ksp; /* kernel stack pointer */ 92 mm_segment_t mm_segment; 93 unsigned long prot_addr; /* address of protection-excep. */ 94 unsigned int trap_no; 95 per_struct per_info; 96 /* Used to give failing instruction back to user for ieee exceptions */ 97 unsigned long ieee_instruction_pointer; 98 /* pfault_wait is used to block the process on a pfault event */ 99 unsigned long pfault_wait; 100 }; 101 102 typedef struct thread_struct thread_struct; 103 104 /* 105 * Stack layout of a C stack frame. 106 */ 107 #ifndef __PACK_STACK 108 struct stack_frame { 109 unsigned long back_chain; 110 unsigned long empty1[5]; 111 unsigned long gprs[10]; 112 unsigned int empty2[8]; 113 }; 114 #else 115 struct stack_frame { 116 unsigned long empty1[5]; 117 unsigned int empty2[8]; 118 unsigned long gprs[10]; 119 unsigned long back_chain; 120 }; 121 #endif 122 123 #define ARCH_MIN_TASKALIGN 8 124 125 #define INIT_THREAD { \ 126 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 127 } 128 129 /* 130 * Do necessary setup to start up a new thread. 131 */ 132 #define start_thread(regs, new_psw, new_stackp) do { \ 133 set_fs(USER_DS); \ 134 regs->psw.mask = psw_user_bits; \ 135 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 136 regs->gprs[15] = new_stackp; \ 137 } while (0) 138 139 #define start_thread31(regs, new_psw, new_stackp) do { \ 140 set_fs(USER_DS); \ 141 regs->psw.mask = psw_user32_bits; \ 142 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 143 regs->gprs[15] = new_stackp; \ 144 crst_table_downgrade(current->mm, 1UL << 31); \ 145 } while (0) 146 147 /* Forward declaration, a strange C thing */ 148 struct task_struct; 149 struct mm_struct; 150 struct seq_file; 151 152 /* Free all resources held by a thread. */ 153 extern void release_thread(struct task_struct *); 154 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 155 156 /* Prepare to copy thread state - unlazy all lazy status */ 157 #define prepare_to_copy(tsk) do { } while (0) 158 159 /* 160 * Return saved PC of a blocked thread. 161 */ 162 extern unsigned long thread_saved_pc(struct task_struct *t); 163 164 /* 165 * Print register of task into buffer. Used in fs/proc/array.c. 166 */ 167 extern void task_show_regs(struct seq_file *m, struct task_struct *task); 168 169 extern void show_code(struct pt_regs *regs); 170 171 unsigned long get_wchan(struct task_struct *p); 172 #define task_pt_regs(tsk) ((struct pt_regs *) \ 173 (task_stack_page(tsk) + THREAD_SIZE) - 1) 174 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 175 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 176 177 /* 178 * Give up the time slice of the virtual PU. 179 */ 180 static inline void cpu_relax(void) 181 { 182 if (MACHINE_HAS_DIAG44) 183 asm volatile("diag 0,0,68"); 184 barrier(); 185 } 186 187 static inline void psw_set_key(unsigned int key) 188 { 189 asm volatile("spka 0(%0)" : : "d" (key)); 190 } 191 192 /* 193 * Set PSW to specified value. 194 */ 195 static inline void __load_psw(psw_t psw) 196 { 197 #ifndef __s390x__ 198 asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc"); 199 #else 200 asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc"); 201 #endif 202 } 203 204 /* 205 * Set PSW mask to specified value, while leaving the 206 * PSW addr pointing to the next instruction. 207 */ 208 209 static inline void __load_psw_mask (unsigned long mask) 210 { 211 unsigned long addr; 212 psw_t psw; 213 214 psw.mask = mask; 215 216 #ifndef __s390x__ 217 asm volatile( 218 " basr %0,0\n" 219 "0: ahi %0,1f-0b\n" 220 " st %0,4(%1)\n" 221 " lpsw 0(%1)\n" 222 "1:" 223 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc"); 224 #else /* __s390x__ */ 225 asm volatile( 226 " larl %0,1f\n" 227 " stg %0,8(%1)\n" 228 " lpswe 0(%1)\n" 229 "1:" 230 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc"); 231 #endif /* __s390x__ */ 232 } 233 234 /* 235 * Function to stop a processor until an interruption occurred 236 */ 237 static inline void enabled_wait(void) 238 { 239 __load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT | 240 PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY); 241 } 242 243 /* 244 * Function to drop a processor into disabled wait state 245 */ 246 247 static inline void ATTRIB_NORET disabled_wait(unsigned long code) 248 { 249 unsigned long ctl_buf; 250 psw_t dw_psw; 251 252 dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT; 253 dw_psw.addr = code; 254 /* 255 * Store status and then load disabled wait psw, 256 * the processor is dead afterwards 257 */ 258 #ifndef __s390x__ 259 asm volatile( 260 " stctl 0,0,0(%2)\n" 261 " ni 0(%2),0xef\n" /* switch off protection */ 262 " lctl 0,0,0(%2)\n" 263 " stpt 0xd8\n" /* store timer */ 264 " stckc 0xe0\n" /* store clock comparator */ 265 " stpx 0x108\n" /* store prefix register */ 266 " stam 0,15,0x120\n" /* store access registers */ 267 " std 0,0x160\n" /* store f0 */ 268 " std 2,0x168\n" /* store f2 */ 269 " std 4,0x170\n" /* store f4 */ 270 " std 6,0x178\n" /* store f6 */ 271 " stm 0,15,0x180\n" /* store general registers */ 272 " stctl 0,15,0x1c0\n" /* store control registers */ 273 " oi 0x1c0,0x10\n" /* fake protection bit */ 274 " lpsw 0(%1)" 275 : "=m" (ctl_buf) 276 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc"); 277 #else /* __s390x__ */ 278 asm volatile( 279 " stctg 0,0,0(%2)\n" 280 " ni 4(%2),0xef\n" /* switch off protection */ 281 " lctlg 0,0,0(%2)\n" 282 " lghi 1,0x1000\n" 283 " stpt 0x328(1)\n" /* store timer */ 284 " stckc 0x330(1)\n" /* store clock comparator */ 285 " stpx 0x318(1)\n" /* store prefix register */ 286 " stam 0,15,0x340(1)\n"/* store access registers */ 287 " stfpc 0x31c(1)\n" /* store fpu control */ 288 " std 0,0x200(1)\n" /* store f0 */ 289 " std 1,0x208(1)\n" /* store f1 */ 290 " std 2,0x210(1)\n" /* store f2 */ 291 " std 3,0x218(1)\n" /* store f3 */ 292 " std 4,0x220(1)\n" /* store f4 */ 293 " std 5,0x228(1)\n" /* store f5 */ 294 " std 6,0x230(1)\n" /* store f6 */ 295 " std 7,0x238(1)\n" /* store f7 */ 296 " std 8,0x240(1)\n" /* store f8 */ 297 " std 9,0x248(1)\n" /* store f9 */ 298 " std 10,0x250(1)\n" /* store f10 */ 299 " std 11,0x258(1)\n" /* store f11 */ 300 " std 12,0x260(1)\n" /* store f12 */ 301 " std 13,0x268(1)\n" /* store f13 */ 302 " std 14,0x270(1)\n" /* store f14 */ 303 " std 15,0x278(1)\n" /* store f15 */ 304 " stmg 0,15,0x280(1)\n"/* store general registers */ 305 " stctg 0,15,0x380(1)\n"/* store control registers */ 306 " oi 0x384(1),0x10\n"/* fake protection bit */ 307 " lpswe 0(%1)" 308 : "=m" (ctl_buf) 309 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0"); 310 #endif /* __s390x__ */ 311 while (1); 312 } 313 314 /* 315 * Basic Machine Check/Program Check Handler. 316 */ 317 318 extern void s390_base_mcck_handler(void); 319 extern void s390_base_pgm_handler(void); 320 extern void s390_base_ext_handler(void); 321 322 extern void (*s390_base_mcck_handler_fn)(void); 323 extern void (*s390_base_pgm_handler_fn)(void); 324 extern void (*s390_base_ext_handler_fn)(void); 325 326 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 327 328 #endif 329 330 /* 331 * Helper macro for exception table entries 332 */ 333 #ifndef __s390x__ 334 #define EX_TABLE(_fault,_target) \ 335 ".section __ex_table,\"a\"\n" \ 336 " .align 4\n" \ 337 " .long " #_fault "," #_target "\n" \ 338 ".previous\n" 339 #else 340 #define EX_TABLE(_fault,_target) \ 341 ".section __ex_table,\"a\"\n" \ 342 " .align 8\n" \ 343 " .quad " #_fault "," #_target "\n" \ 344 ".previous\n" 345 #endif 346 347 #endif /* __ASM_S390_PROCESSOR_H */ 348