1 /* 2 * S390 version 3 * Copyright IBM Corp. 1999 4 * Author(s): Hartmut Penner (hp@de.ibm.com), 5 * Martin Schwidefsky (schwidefsky@de.ibm.com) 6 * 7 * Derived from "include/asm-i386/processor.h" 8 * Copyright (C) 1994, Linus Torvalds 9 */ 10 11 #ifndef __ASM_S390_PROCESSOR_H 12 #define __ASM_S390_PROCESSOR_H 13 14 #include <linux/const.h> 15 16 #define CIF_MCCK_PENDING 0 /* machine check handling is pending */ 17 #define CIF_ASCE_PRIMARY 1 /* primary asce needs fixup / uaccess */ 18 #define CIF_ASCE_SECONDARY 2 /* secondary asce needs fixup / uaccess */ 19 #define CIF_NOHZ_DELAY 3 /* delay HZ disable for a tick */ 20 #define CIF_FPU 4 /* restore FPU registers */ 21 #define CIF_IGNORE_IRQ 5 /* ignore interrupt (for udelay) */ 22 #define CIF_ENABLED_WAIT 6 /* in enabled wait state */ 23 #define CIF_MCCK_GUEST 7 /* machine check happening in guest */ 24 25 #define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING) 26 #define _CIF_ASCE_PRIMARY _BITUL(CIF_ASCE_PRIMARY) 27 #define _CIF_ASCE_SECONDARY _BITUL(CIF_ASCE_SECONDARY) 28 #define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY) 29 #define _CIF_FPU _BITUL(CIF_FPU) 30 #define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ) 31 #define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT) 32 #define _CIF_MCCK_GUEST _BITUL(CIF_MCCK_GUEST) 33 34 #ifndef __ASSEMBLY__ 35 36 #include <linux/linkage.h> 37 #include <linux/irqflags.h> 38 #include <asm/cpu.h> 39 #include <asm/page.h> 40 #include <asm/ptrace.h> 41 #include <asm/setup.h> 42 #include <asm/runtime_instr.h> 43 #include <asm/fpu/types.h> 44 #include <asm/fpu/internal.h> 45 46 static inline void set_cpu_flag(int flag) 47 { 48 S390_lowcore.cpu_flags |= (1UL << flag); 49 } 50 51 static inline void clear_cpu_flag(int flag) 52 { 53 S390_lowcore.cpu_flags &= ~(1UL << flag); 54 } 55 56 static inline int test_cpu_flag(int flag) 57 { 58 return !!(S390_lowcore.cpu_flags & (1UL << flag)); 59 } 60 61 /* 62 * Test CIF flag of another CPU. The caller needs to ensure that 63 * CPU hotplug can not happen, e.g. by disabling preemption. 64 */ 65 static inline int test_cpu_flag_of(int flag, int cpu) 66 { 67 struct lowcore *lc = lowcore_ptr[cpu]; 68 return !!(lc->cpu_flags & (1UL << flag)); 69 } 70 71 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY) 72 73 /* 74 * Default implementation of macro that returns current 75 * instruction pointer ("program counter"). 76 */ 77 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 78 79 static inline void get_cpu_id(struct cpuid *ptr) 80 { 81 asm volatile("stidp %0" : "=Q" (*ptr)); 82 } 83 84 void s390_adjust_jiffies(void); 85 void s390_update_cpu_mhz(void); 86 void cpu_detect_mhz_feature(void); 87 88 extern const struct seq_operations cpuinfo_op; 89 extern int sysctl_ieee_emulation_warnings; 90 extern void execve_tail(void); 91 92 /* 93 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 94 */ 95 96 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_31BIT) ? \ 97 (1UL << 31) : -PAGE_SIZE) 98 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 99 (1UL << 30) : (1UL << 41)) 100 #define TASK_SIZE TASK_SIZE_OF(current) 101 #define TASK_SIZE_MAX (-PAGE_SIZE) 102 103 #define STACK_TOP (test_thread_flag(TIF_31BIT) ? \ 104 (1UL << 31) : (1UL << 42)) 105 #define STACK_TOP_MAX (1UL << 42) 106 107 #define HAVE_ARCH_PICK_MMAP_LAYOUT 108 109 typedef struct { 110 __u32 ar4; 111 } mm_segment_t; 112 113 /* 114 * Thread structure 115 */ 116 struct thread_struct { 117 unsigned int acrs[NUM_ACRS]; 118 unsigned long ksp; /* kernel stack pointer */ 119 unsigned long user_timer; /* task cputime in user space */ 120 unsigned long guest_timer; /* task cputime in kvm guest */ 121 unsigned long system_timer; /* task cputime in kernel space */ 122 unsigned long hardirq_timer; /* task cputime in hardirq context */ 123 unsigned long softirq_timer; /* task cputime in softirq context */ 124 unsigned long sys_call_table; /* system call table address */ 125 mm_segment_t mm_segment; 126 unsigned long gmap_addr; /* address of last gmap fault. */ 127 unsigned int gmap_write_flag; /* gmap fault write indication */ 128 unsigned int gmap_int_code; /* int code of last gmap fault */ 129 unsigned int gmap_pfault; /* signal of a pending guest pfault */ 130 /* Per-thread information related to debugging */ 131 struct per_regs per_user; /* User specified PER registers */ 132 struct per_event per_event; /* Cause of the last PER trap */ 133 unsigned long per_flags; /* Flags to control debug behavior */ 134 unsigned int system_call; /* system call number in signal */ 135 unsigned long last_break; /* last breaking-event-address. */ 136 /* pfault_wait is used to block the process on a pfault event */ 137 unsigned long pfault_wait; 138 struct list_head list; 139 /* cpu runtime instrumentation */ 140 struct runtime_instr_cb *ri_cb; 141 struct gs_cb *gs_cb; /* Current guarded storage cb */ 142 struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */ 143 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */ 144 /* 145 * Warning: 'fpu' is dynamically-sized. It *MUST* be at 146 * the end. 147 */ 148 struct fpu fpu; /* FP and VX register save area */ 149 }; 150 151 /* Flag to disable transactions. */ 152 #define PER_FLAG_NO_TE 1UL 153 /* Flag to enable random transaction aborts. */ 154 #define PER_FLAG_TE_ABORT_RAND 2UL 155 /* Flag to specify random transaction abort mode: 156 * - abort each transaction at a random instruction before TEND if set. 157 * - abort random transactions at a random instruction if cleared. 158 */ 159 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL 160 161 typedef struct thread_struct thread_struct; 162 163 /* 164 * Stack layout of a C stack frame. 165 */ 166 #ifndef __PACK_STACK 167 struct stack_frame { 168 unsigned long back_chain; 169 unsigned long empty1[5]; 170 unsigned long gprs[10]; 171 unsigned int empty2[8]; 172 }; 173 #else 174 struct stack_frame { 175 unsigned long empty1[5]; 176 unsigned int empty2[8]; 177 unsigned long gprs[10]; 178 unsigned long back_chain; 179 }; 180 #endif 181 182 #define ARCH_MIN_TASKALIGN 8 183 184 #define INIT_THREAD { \ 185 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 186 .fpu.regs = (void *) init_task.thread.fpu.fprs, \ 187 } 188 189 /* 190 * Do necessary setup to start up a new thread. 191 */ 192 #define start_thread(regs, new_psw, new_stackp) do { \ 193 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \ 194 regs->psw.addr = new_psw; \ 195 regs->gprs[15] = new_stackp; \ 196 execve_tail(); \ 197 } while (0) 198 199 #define start_thread31(regs, new_psw, new_stackp) do { \ 200 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \ 201 regs->psw.addr = new_psw; \ 202 regs->gprs[15] = new_stackp; \ 203 crst_table_downgrade(current->mm); \ 204 execve_tail(); \ 205 } while (0) 206 207 /* Forward declaration, a strange C thing */ 208 struct task_struct; 209 struct mm_struct; 210 struct seq_file; 211 struct pt_regs; 212 213 typedef int (*dump_trace_func_t)(void *data, unsigned long address, int reliable); 214 void dump_trace(dump_trace_func_t func, void *data, 215 struct task_struct *task, unsigned long sp); 216 void show_registers(struct pt_regs *regs); 217 218 void show_cacheinfo(struct seq_file *m); 219 220 /* Free all resources held by a thread. */ 221 extern void release_thread(struct task_struct *); 222 223 /* Free guarded storage control block for current */ 224 void exit_thread_gs(void); 225 226 unsigned long get_wchan(struct task_struct *p); 227 #define task_pt_regs(tsk) ((struct pt_regs *) \ 228 (task_stack_page(tsk) + THREAD_SIZE) - 1) 229 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 230 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 231 232 /* Has task runtime instrumentation enabled ? */ 233 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb) 234 235 static inline unsigned long current_stack_pointer(void) 236 { 237 unsigned long sp; 238 239 asm volatile("la %0,0(15)" : "=a" (sp)); 240 return sp; 241 } 242 243 static inline unsigned short stap(void) 244 { 245 unsigned short cpu_address; 246 247 asm volatile("stap %0" : "=m" (cpu_address)); 248 return cpu_address; 249 } 250 251 /* 252 * Give up the time slice of the virtual PU. 253 */ 254 #define cpu_relax_yield cpu_relax_yield 255 void cpu_relax_yield(void); 256 257 #define cpu_relax() barrier() 258 259 #define ECAG_CACHE_ATTRIBUTE 0 260 #define ECAG_CPU_ATTRIBUTE 1 261 262 static inline unsigned long __ecag(unsigned int asi, unsigned char parm) 263 { 264 unsigned long val; 265 266 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */ 267 : "=d" (val) : "a" (asi << 8 | parm)); 268 return val; 269 } 270 271 static inline void psw_set_key(unsigned int key) 272 { 273 asm volatile("spka 0(%0)" : : "d" (key)); 274 } 275 276 /* 277 * Set PSW to specified value. 278 */ 279 static inline void __load_psw(psw_t psw) 280 { 281 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 282 } 283 284 /* 285 * Set PSW mask to specified value, while leaving the 286 * PSW addr pointing to the next instruction. 287 */ 288 static inline void __load_psw_mask(unsigned long mask) 289 { 290 unsigned long addr; 291 psw_t psw; 292 293 psw.mask = mask; 294 295 asm volatile( 296 " larl %0,1f\n" 297 " stg %0,%O1+8(%R1)\n" 298 " lpswe %1\n" 299 "1:" 300 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); 301 } 302 303 /* 304 * Extract current PSW mask 305 */ 306 static inline unsigned long __extract_psw(void) 307 { 308 unsigned int reg1, reg2; 309 310 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2)); 311 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2); 312 } 313 314 static inline void local_mcck_enable(void) 315 { 316 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK); 317 } 318 319 static inline void local_mcck_disable(void) 320 { 321 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK); 322 } 323 324 /* 325 * Rewind PSW instruction address by specified number of bytes. 326 */ 327 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 328 { 329 unsigned long mask; 330 331 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 332 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 333 (1UL << 24) - 1; 334 return (psw.addr - ilc) & mask; 335 } 336 337 /* 338 * Function to stop a processor until the next interrupt occurs 339 */ 340 void enabled_wait(void); 341 342 /* 343 * Function to drop a processor into disabled wait state 344 */ 345 static inline void __noreturn disabled_wait(unsigned long code) 346 { 347 psw_t psw; 348 349 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; 350 psw.addr = code; 351 __load_psw(psw); 352 while (1); 353 } 354 355 /* 356 * Basic Machine Check/Program Check Handler. 357 */ 358 359 extern void s390_base_mcck_handler(void); 360 extern void s390_base_pgm_handler(void); 361 extern void s390_base_ext_handler(void); 362 363 extern void (*s390_base_mcck_handler_fn)(void); 364 extern void (*s390_base_pgm_handler_fn)(void); 365 extern void (*s390_base_ext_handler_fn)(void); 366 367 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 368 369 extern int memcpy_real(void *, void *, size_t); 370 extern void memcpy_absolute(void *, void *, size_t); 371 372 #define mem_assign_absolute(dest, val) do { \ 373 __typeof__(dest) __tmp = (val); \ 374 \ 375 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \ 376 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \ 377 } while (0) 378 379 #endif /* __ASSEMBLY__ */ 380 381 #endif /* __ASM_S390_PROCESSOR_H */ 382