1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * S390 version 4 * Copyright IBM Corp. 1999 5 * Author(s): Hartmut Penner (hp@de.ibm.com), 6 * Martin Schwidefsky (schwidefsky@de.ibm.com) 7 * 8 * Derived from "include/asm-i386/processor.h" 9 * Copyright (C) 1994, Linus Torvalds 10 */ 11 12 #ifndef __ASM_S390_PROCESSOR_H 13 #define __ASM_S390_PROCESSOR_H 14 15 #include <linux/bits.h> 16 17 #define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */ 18 #define CIF_FPU 3 /* restore FPU registers */ 19 #define CIF_ENABLED_WAIT 5 /* in enabled wait state */ 20 #define CIF_MCCK_GUEST 6 /* machine check happening in guest */ 21 #define CIF_DEDICATED_CPU 7 /* this CPU is dedicated */ 22 23 #define _CIF_NOHZ_DELAY BIT(CIF_NOHZ_DELAY) 24 #define _CIF_FPU BIT(CIF_FPU) 25 #define _CIF_ENABLED_WAIT BIT(CIF_ENABLED_WAIT) 26 #define _CIF_MCCK_GUEST BIT(CIF_MCCK_GUEST) 27 #define _CIF_DEDICATED_CPU BIT(CIF_DEDICATED_CPU) 28 29 #ifndef __ASSEMBLY__ 30 31 #include <linux/cpumask.h> 32 #include <linux/linkage.h> 33 #include <linux/irqflags.h> 34 #include <asm/cpu.h> 35 #include <asm/page.h> 36 #include <asm/ptrace.h> 37 #include <asm/setup.h> 38 #include <asm/runtime_instr.h> 39 #include <asm/fpu/types.h> 40 #include <asm/fpu/internal.h> 41 42 static inline void set_cpu_flag(int flag) 43 { 44 S390_lowcore.cpu_flags |= (1UL << flag); 45 } 46 47 static inline void clear_cpu_flag(int flag) 48 { 49 S390_lowcore.cpu_flags &= ~(1UL << flag); 50 } 51 52 static inline int test_cpu_flag(int flag) 53 { 54 return !!(S390_lowcore.cpu_flags & (1UL << flag)); 55 } 56 57 /* 58 * Test CIF flag of another CPU. The caller needs to ensure that 59 * CPU hotplug can not happen, e.g. by disabling preemption. 60 */ 61 static inline int test_cpu_flag_of(int flag, int cpu) 62 { 63 struct lowcore *lc = lowcore_ptr[cpu]; 64 return !!(lc->cpu_flags & (1UL << flag)); 65 } 66 67 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY) 68 69 static inline void get_cpu_id(struct cpuid *ptr) 70 { 71 asm volatile("stidp %0" : "=Q" (*ptr)); 72 } 73 74 void s390_adjust_jiffies(void); 75 void s390_update_cpu_mhz(void); 76 void cpu_detect_mhz_feature(void); 77 78 extern const struct seq_operations cpuinfo_op; 79 extern void execve_tail(void); 80 extern void __bpon(void); 81 82 /* 83 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 84 */ 85 86 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_31BIT) ? \ 87 _REGION3_SIZE : TASK_SIZE_MAX) 88 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 89 (_REGION3_SIZE >> 1) : (_REGION2_SIZE >> 1)) 90 #define TASK_SIZE TASK_SIZE_OF(current) 91 #define TASK_SIZE_MAX (-PAGE_SIZE) 92 93 #define STACK_TOP (test_thread_flag(TIF_31BIT) ? \ 94 _REGION3_SIZE : _REGION2_SIZE) 95 #define STACK_TOP_MAX _REGION2_SIZE 96 97 #define HAVE_ARCH_PICK_MMAP_LAYOUT 98 99 /* 100 * Thread structure 101 */ 102 struct thread_struct { 103 unsigned int acrs[NUM_ACRS]; 104 unsigned long ksp; /* kernel stack pointer */ 105 unsigned long user_timer; /* task cputime in user space */ 106 unsigned long guest_timer; /* task cputime in kvm guest */ 107 unsigned long system_timer; /* task cputime in kernel space */ 108 unsigned long hardirq_timer; /* task cputime in hardirq context */ 109 unsigned long softirq_timer; /* task cputime in softirq context */ 110 unsigned long sys_call_table; /* system call table address */ 111 unsigned long gmap_addr; /* address of last gmap fault. */ 112 unsigned int gmap_write_flag; /* gmap fault write indication */ 113 unsigned int gmap_int_code; /* int code of last gmap fault */ 114 unsigned int gmap_pfault; /* signal of a pending guest pfault */ 115 /* Per-thread information related to debugging */ 116 struct per_regs per_user; /* User specified PER registers */ 117 struct per_event per_event; /* Cause of the last PER trap */ 118 unsigned long per_flags; /* Flags to control debug behavior */ 119 unsigned int system_call; /* system call number in signal */ 120 unsigned long last_break; /* last breaking-event-address. */ 121 /* pfault_wait is used to block the process on a pfault event */ 122 unsigned long pfault_wait; 123 struct list_head list; 124 /* cpu runtime instrumentation */ 125 struct runtime_instr_cb *ri_cb; 126 struct gs_cb *gs_cb; /* Current guarded storage cb */ 127 struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */ 128 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */ 129 /* 130 * Warning: 'fpu' is dynamically-sized. It *MUST* be at 131 * the end. 132 */ 133 struct fpu fpu; /* FP and VX register save area */ 134 }; 135 136 /* Flag to disable transactions. */ 137 #define PER_FLAG_NO_TE 1UL 138 /* Flag to enable random transaction aborts. */ 139 #define PER_FLAG_TE_ABORT_RAND 2UL 140 /* Flag to specify random transaction abort mode: 141 * - abort each transaction at a random instruction before TEND if set. 142 * - abort random transactions at a random instruction if cleared. 143 */ 144 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL 145 146 typedef struct thread_struct thread_struct; 147 148 #define ARCH_MIN_TASKALIGN 8 149 150 #define INIT_THREAD { \ 151 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 152 .fpu.regs = (void *) init_task.thread.fpu.fprs, \ 153 .last_break = 1, \ 154 } 155 156 /* 157 * Do necessary setup to start up a new thread. 158 */ 159 #define start_thread(regs, new_psw, new_stackp) do { \ 160 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \ 161 regs->psw.addr = new_psw; \ 162 regs->gprs[15] = new_stackp; \ 163 execve_tail(); \ 164 } while (0) 165 166 #define start_thread31(regs, new_psw, new_stackp) do { \ 167 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \ 168 regs->psw.addr = new_psw; \ 169 regs->gprs[15] = new_stackp; \ 170 execve_tail(); \ 171 } while (0) 172 173 /* Forward declaration, a strange C thing */ 174 struct task_struct; 175 struct mm_struct; 176 struct seq_file; 177 struct pt_regs; 178 179 void show_registers(struct pt_regs *regs); 180 void show_cacheinfo(struct seq_file *m); 181 182 /* Free all resources held by a thread. */ 183 static inline void release_thread(struct task_struct *tsk) { } 184 185 /* Free guarded storage control block */ 186 void guarded_storage_release(struct task_struct *tsk); 187 188 unsigned long get_wchan(struct task_struct *p); 189 #define task_pt_regs(tsk) ((struct pt_regs *) \ 190 (task_stack_page(tsk) + THREAD_SIZE) - 1) 191 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 192 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 193 194 /* Has task runtime instrumentation enabled ? */ 195 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb) 196 197 static __always_inline unsigned long current_stack_pointer(void) 198 { 199 unsigned long sp; 200 201 asm volatile("la %0,0(15)" : "=a" (sp)); 202 return sp; 203 } 204 205 static __no_kasan_or_inline unsigned short stap(void) 206 { 207 unsigned short cpu_address; 208 209 asm volatile("stap %0" : "=Q" (cpu_address)); 210 return cpu_address; 211 } 212 213 #define cpu_relax() barrier() 214 215 #define ECAG_CACHE_ATTRIBUTE 0 216 #define ECAG_CPU_ATTRIBUTE 1 217 218 static inline unsigned long __ecag(unsigned int asi, unsigned char parm) 219 { 220 unsigned long val; 221 222 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */ 223 : "=d" (val) : "a" (asi << 8 | parm)); 224 return val; 225 } 226 227 static inline void psw_set_key(unsigned int key) 228 { 229 asm volatile("spka 0(%0)" : : "d" (key)); 230 } 231 232 /* 233 * Set PSW to specified value. 234 */ 235 static inline void __load_psw(psw_t psw) 236 { 237 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 238 } 239 240 /* 241 * Set PSW mask to specified value, while leaving the 242 * PSW addr pointing to the next instruction. 243 */ 244 static __no_kasan_or_inline void __load_psw_mask(unsigned long mask) 245 { 246 unsigned long addr; 247 psw_t psw; 248 249 psw.mask = mask; 250 251 asm volatile( 252 " larl %0,1f\n" 253 " stg %0,%1\n" 254 " lpswe %2\n" 255 "1:" 256 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc"); 257 } 258 259 /* 260 * Extract current PSW mask 261 */ 262 static inline unsigned long __extract_psw(void) 263 { 264 unsigned int reg1, reg2; 265 266 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2)); 267 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2); 268 } 269 270 static inline void local_mcck_enable(void) 271 { 272 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK); 273 } 274 275 static inline void local_mcck_disable(void) 276 { 277 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK); 278 } 279 280 /* 281 * Rewind PSW instruction address by specified number of bytes. 282 */ 283 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 284 { 285 unsigned long mask; 286 287 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 288 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 289 (1UL << 24) - 1; 290 return (psw.addr - ilc) & mask; 291 } 292 293 /* 294 * Function to drop a processor into disabled wait state 295 */ 296 static __always_inline void __noreturn disabled_wait(void) 297 { 298 psw_t psw; 299 300 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; 301 psw.addr = _THIS_IP_; 302 __load_psw(psw); 303 while (1); 304 } 305 306 /* 307 * Basic Program Check Handler. 308 */ 309 extern void s390_base_pgm_handler(void); 310 extern void (*s390_base_pgm_handler_fn)(void); 311 312 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 313 314 extern int memcpy_real(void *, void *, size_t); 315 extern void memcpy_absolute(void *, void *, size_t); 316 317 #define mem_assign_absolute(dest, val) do { \ 318 __typeof__(dest) __tmp = (val); \ 319 \ 320 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \ 321 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \ 322 } while (0) 323 324 extern int s390_isolate_bp(void); 325 extern int s390_isolate_bp_guest(void); 326 327 #endif /* __ASSEMBLY__ */ 328 329 #endif /* __ASM_S390_PROCESSOR_H */ 330