1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_S390_PCI_INSN_H 3 #define _ASM_S390_PCI_INSN_H 4 5 #include <linux/jump_label.h> 6 7 /* Load/Store status codes */ 8 #define ZPCI_PCI_ST_FUNC_NOT_ENABLED 4 9 #define ZPCI_PCI_ST_FUNC_IN_ERR 8 10 #define ZPCI_PCI_ST_BLOCKED 12 11 #define ZPCI_PCI_ST_INSUF_RES 16 12 #define ZPCI_PCI_ST_INVAL_AS 20 13 #define ZPCI_PCI_ST_FUNC_ALREADY_ENABLED 24 14 #define ZPCI_PCI_ST_DMA_AS_NOT_ENABLED 28 15 #define ZPCI_PCI_ST_2ND_OP_IN_INV_AS 36 16 #define ZPCI_PCI_ST_FUNC_NOT_AVAIL 40 17 #define ZPCI_PCI_ST_ALREADY_IN_RQ_STATE 44 18 19 /* Load/Store return codes */ 20 #define ZPCI_PCI_LS_OK 0 21 #define ZPCI_PCI_LS_ERR 1 22 #define ZPCI_PCI_LS_BUSY 2 23 #define ZPCI_PCI_LS_INVAL_HANDLE 3 24 25 /* Load/Store address space identifiers */ 26 #define ZPCI_PCIAS_MEMIO_0 0 27 #define ZPCI_PCIAS_MEMIO_1 1 28 #define ZPCI_PCIAS_MEMIO_2 2 29 #define ZPCI_PCIAS_MEMIO_3 3 30 #define ZPCI_PCIAS_MEMIO_4 4 31 #define ZPCI_PCIAS_MEMIO_5 5 32 #define ZPCI_PCIAS_CFGSPC 15 33 34 /* Modify PCI Function Controls */ 35 #define ZPCI_MOD_FC_REG_INT 2 36 #define ZPCI_MOD_FC_DEREG_INT 3 37 #define ZPCI_MOD_FC_REG_IOAT 4 38 #define ZPCI_MOD_FC_DEREG_IOAT 5 39 #define ZPCI_MOD_FC_REREG_IOAT 6 40 #define ZPCI_MOD_FC_RESET_ERROR 7 41 #define ZPCI_MOD_FC_RESET_BLOCK 9 42 #define ZPCI_MOD_FC_SET_MEASURE 10 43 #define ZPCI_MOD_FC_REG_INT_D 16 44 #define ZPCI_MOD_FC_DEREG_INT_D 17 45 46 /* FIB function controls */ 47 #define ZPCI_FIB_FC_ENABLED 0x80 48 #define ZPCI_FIB_FC_ERROR 0x40 49 #define ZPCI_FIB_FC_LS_BLOCKED 0x20 50 #define ZPCI_FIB_FC_DMAAS_REG 0x10 51 52 /* FIB function controls */ 53 #define ZPCI_FIB_FC_ENABLED 0x80 54 #define ZPCI_FIB_FC_ERROR 0x40 55 #define ZPCI_FIB_FC_LS_BLOCKED 0x20 56 #define ZPCI_FIB_FC_DMAAS_REG 0x10 57 58 struct zpci_fib_fmt0 { 59 u32 : 1; 60 u32 isc : 3; /* Interrupt subclass */ 61 u32 noi : 12; /* Number of interrupts */ 62 u32 : 2; 63 u32 aibvo : 6; /* Adapter interrupt bit vector offset */ 64 u32 sum : 1; /* Adapter int summary bit enabled */ 65 u32 : 1; 66 u32 aisbo : 6; /* Adapter int summary bit offset */ 67 u32 : 32; 68 u64 aibv; /* Adapter int bit vector address */ 69 u64 aisb; /* Adapter int summary bit address */ 70 }; 71 72 struct zpci_fib_fmt1 { 73 u32 : 4; 74 u32 noi : 12; 75 u32 : 16; 76 u32 dibvo : 16; 77 u32 : 16; 78 u64 : 64; 79 u64 : 64; 80 }; 81 82 /* Function Information Block */ 83 struct zpci_fib { 84 u32 fmt : 8; /* format */ 85 u32 : 24; 86 u32 : 32; 87 u8 fc; /* function controls */ 88 u64 : 56; 89 u64 pba; /* PCI base address */ 90 u64 pal; /* PCI address limit */ 91 u64 iota; /* I/O Translation Anchor */ 92 union { 93 struct zpci_fib_fmt0 fmt0; 94 struct zpci_fib_fmt1 fmt1; 95 }; 96 u64 fmb_addr; /* Function measurement block address and key */ 97 u32 : 32; 98 u32 gd; 99 } __packed __aligned(8); 100 101 /* Set Interruption Controls Operation Controls */ 102 #define SIC_IRQ_MODE_ALL 0 103 #define SIC_IRQ_MODE_SINGLE 1 104 #define SIC_SET_AENI_CONTROLS 2 105 #define SIC_IRQ_MODE_DIRECT 4 106 #define SIC_IRQ_MODE_D_ALL 16 107 #define SIC_IRQ_MODE_D_SINGLE 17 108 #define SIC_IRQ_MODE_SET_CPU 18 109 110 /* directed interruption information block */ 111 struct zpci_diib { 112 u32 : 1; 113 u32 isc : 3; 114 u32 : 28; 115 u16 : 16; 116 u16 nr_cpus; 117 u64 disb_addr; 118 u64 : 64; 119 u64 : 64; 120 } __packed __aligned(8); 121 122 /* cpu directed interruption information block */ 123 struct zpci_cdiib { 124 u64 : 64; 125 u64 dibv_addr; 126 u64 : 64; 127 u64 : 64; 128 u64 : 64; 129 } __packed __aligned(8); 130 131 /* adapter interruption parameters block */ 132 struct zpci_aipb { 133 u64 faisb; 134 u64 gait; 135 u16 : 13; 136 u16 afi : 3; 137 u32 : 32; 138 u16 faal; 139 } __packed __aligned(8); 140 141 union zpci_sic_iib { 142 struct zpci_diib diib; 143 struct zpci_cdiib cdiib; 144 struct zpci_aipb aipb; 145 }; 146 147 DECLARE_STATIC_KEY_FALSE(have_mio); 148 149 u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status); 150 int zpci_refresh_trans(u64 fn, u64 addr, u64 range); 151 int __zpci_load(u64 *data, u64 req, u64 offset); 152 int zpci_load(u64 *data, const volatile void __iomem *addr, unsigned long len); 153 int __zpci_store(u64 data, u64 req, u64 offset); 154 int zpci_store(const volatile void __iomem *addr, u64 data, unsigned long len); 155 int __zpci_store_block(const u64 *data, u64 req, u64 offset); 156 void zpci_barrier(void); 157 int zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib); 158 159 #endif 160