1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_S390_PCI_H 3 #define __ASM_S390_PCI_H 4 5 /* must be set before including pci_clp.h */ 6 #define PCI_BAR_COUNT 6 7 8 #include <linux/pci.h> 9 #include <linux/mutex.h> 10 #include <linux/iommu.h> 11 #include <asm-generic/pci.h> 12 #include <asm/pci_clp.h> 13 #include <asm/pci_debug.h> 14 #include <asm/sclp.h> 15 16 #define PCIBIOS_MIN_IO 0x1000 17 #define PCIBIOS_MIN_MEM 0x10000000 18 19 #define pcibios_assign_all_busses() (0) 20 21 void __iomem *pci_iomap(struct pci_dev *, int, unsigned long); 22 void pci_iounmap(struct pci_dev *, void __iomem *); 23 int pci_domain_nr(struct pci_bus *); 24 int pci_proc_domain(struct pci_bus *); 25 26 #define ZPCI_BUS_NR 0 /* default bus number */ 27 #define ZPCI_DEVFN 0 /* default device number */ 28 29 /* PCI Function Controls */ 30 #define ZPCI_FC_FN_ENABLED 0x80 31 #define ZPCI_FC_ERROR 0x40 32 #define ZPCI_FC_BLOCKED 0x20 33 #define ZPCI_FC_DMA_ENABLED 0x10 34 35 #define ZPCI_FMB_DMA_COUNTER_VALID (1 << 23) 36 37 struct zpci_fmb_fmt0 { 38 u64 dma_rbytes; 39 u64 dma_wbytes; 40 }; 41 42 struct zpci_fmb_fmt1 { 43 u64 rx_bytes; 44 u64 rx_packets; 45 u64 tx_bytes; 46 u64 tx_packets; 47 }; 48 49 struct zpci_fmb_fmt2 { 50 u64 consumed_work_units; 51 u64 max_work_units; 52 }; 53 54 struct zpci_fmb_fmt3 { 55 u64 tx_bytes; 56 }; 57 58 struct zpci_fmb { 59 u32 format : 8; 60 u32 fmt_ind : 24; 61 u32 samples; 62 u64 last_update; 63 /* common counters */ 64 u64 ld_ops; 65 u64 st_ops; 66 u64 stb_ops; 67 u64 rpcit_ops; 68 /* format specific counters */ 69 union { 70 struct zpci_fmb_fmt0 fmt0; 71 struct zpci_fmb_fmt1 fmt1; 72 struct zpci_fmb_fmt2 fmt2; 73 struct zpci_fmb_fmt3 fmt3; 74 }; 75 } __packed __aligned(128); 76 77 enum zpci_state { 78 ZPCI_FN_STATE_STANDBY = 0, 79 ZPCI_FN_STATE_CONFIGURED = 1, 80 ZPCI_FN_STATE_RESERVED = 2, 81 ZPCI_FN_STATE_ONLINE = 3, 82 }; 83 84 struct zpci_bar_struct { 85 struct resource *res; /* bus resource */ 86 u32 val; /* bar start & 3 flag bits */ 87 u16 map_idx; /* index into bar mapping array */ 88 u8 size; /* order 2 exponent */ 89 }; 90 91 struct s390_domain; 92 93 /* Private data per function */ 94 struct zpci_dev { 95 struct pci_bus *bus; 96 struct list_head entry; /* list of all zpci_devices, needed for hotplug, etc. */ 97 98 enum zpci_state state; 99 u32 fid; /* function ID, used by sclp */ 100 u32 fh; /* function handle, used by insn's */ 101 u16 vfn; /* virtual function number */ 102 u16 pchid; /* physical channel ID */ 103 u8 pfgid; /* function group ID */ 104 u8 pft; /* pci function type */ 105 u16 domain; 106 107 struct mutex lock; 108 u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */ 109 u32 uid; /* user defined id */ 110 u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */ 111 112 /* IRQ stuff */ 113 u64 msi_addr; /* MSI address */ 114 unsigned int max_msi; /* maximum number of MSI's */ 115 struct airq_iv *aibv; /* adapter interrupt bit vector */ 116 unsigned long aisb; /* number of the summary bit */ 117 118 /* DMA stuff */ 119 unsigned long *dma_table; 120 spinlock_t dma_table_lock; 121 int tlb_refresh; 122 123 spinlock_t iommu_bitmap_lock; 124 unsigned long *iommu_bitmap; 125 unsigned long *lazy_bitmap; 126 unsigned long iommu_size; 127 unsigned long iommu_pages; 128 unsigned int next_bit; 129 130 struct iommu_device iommu_dev; /* IOMMU core handle */ 131 132 char res_name[16]; 133 struct zpci_bar_struct bars[PCI_BAR_COUNT]; 134 135 u64 start_dma; /* Start of available DMA addresses */ 136 u64 end_dma; /* End of available DMA addresses */ 137 u64 dma_mask; /* DMA address space mask */ 138 139 /* Function measurement block */ 140 struct zpci_fmb *fmb; 141 u16 fmb_update; /* update interval */ 142 u16 fmb_length; 143 /* software counters */ 144 atomic64_t allocated_pages; 145 atomic64_t mapped_pages; 146 atomic64_t unmapped_pages; 147 148 enum pci_bus_speed max_bus_speed; 149 150 struct dentry *debugfs_dev; 151 152 struct s390_domain *s390_domain; /* s390 IOMMU domain data */ 153 }; 154 155 static inline bool zdev_enabled(struct zpci_dev *zdev) 156 { 157 return (zdev->fh & (1UL << 31)) ? true : false; 158 } 159 160 extern const struct attribute_group *zpci_attr_groups[]; 161 162 /* ----------------------------------------------------------------------------- 163 Prototypes 164 ----------------------------------------------------------------------------- */ 165 /* Base stuff */ 166 int zpci_create_device(struct zpci_dev *); 167 void zpci_remove_device(struct zpci_dev *zdev); 168 int zpci_enable_device(struct zpci_dev *); 169 int zpci_disable_device(struct zpci_dev *); 170 int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64); 171 int zpci_unregister_ioat(struct zpci_dev *, u8); 172 void zpci_remove_reserved_devices(void); 173 174 /* CLP */ 175 int clp_scan_pci_devices(void); 176 int clp_rescan_pci_devices(void); 177 int clp_rescan_pci_devices_simple(void); 178 int clp_add_pci_device(u32, u32, int); 179 int clp_enable_fh(struct zpci_dev *, u8); 180 int clp_disable_fh(struct zpci_dev *); 181 int clp_get_state(u32 fid, enum zpci_state *state); 182 183 /* IOMMU Interface */ 184 int zpci_init_iommu(struct zpci_dev *zdev); 185 void zpci_destroy_iommu(struct zpci_dev *zdev); 186 187 #ifdef CONFIG_PCI 188 /* Error handling and recovery */ 189 void zpci_event_error(void *); 190 void zpci_event_availability(void *); 191 void zpci_rescan(void); 192 bool zpci_is_enabled(void); 193 #else /* CONFIG_PCI */ 194 static inline void zpci_event_error(void *e) {} 195 static inline void zpci_event_availability(void *e) {} 196 static inline void zpci_rescan(void) {} 197 #endif /* CONFIG_PCI */ 198 199 #ifdef CONFIG_HOTPLUG_PCI_S390 200 int zpci_init_slot(struct zpci_dev *); 201 void zpci_exit_slot(struct zpci_dev *); 202 #else /* CONFIG_HOTPLUG_PCI_S390 */ 203 static inline int zpci_init_slot(struct zpci_dev *zdev) 204 { 205 return 0; 206 } 207 static inline void zpci_exit_slot(struct zpci_dev *zdev) {} 208 #endif /* CONFIG_HOTPLUG_PCI_S390 */ 209 210 /* Helpers */ 211 static inline struct zpci_dev *to_zpci(struct pci_dev *pdev) 212 { 213 return pdev->sysdata; 214 } 215 216 struct zpci_dev *get_zdev_by_fid(u32); 217 218 /* DMA */ 219 int zpci_dma_init(void); 220 void zpci_dma_exit(void); 221 222 /* FMB */ 223 int zpci_fmb_enable_device(struct zpci_dev *); 224 int zpci_fmb_disable_device(struct zpci_dev *); 225 226 /* Debug */ 227 int zpci_debug_init(void); 228 void zpci_debug_exit(void); 229 void zpci_debug_init_device(struct zpci_dev *, const char *); 230 void zpci_debug_exit_device(struct zpci_dev *); 231 void zpci_debug_info(struct zpci_dev *, struct seq_file *); 232 233 /* Error reporting */ 234 int zpci_report_error(struct pci_dev *, struct zpci_report_error_header *); 235 236 #ifdef CONFIG_NUMA 237 238 /* Returns the node based on PCI bus */ 239 static inline int __pcibus_to_node(const struct pci_bus *bus) 240 { 241 return NUMA_NO_NODE; 242 } 243 244 static inline const struct cpumask * 245 cpumask_of_pcibus(const struct pci_bus *bus) 246 { 247 return cpu_online_mask; 248 } 249 250 #endif /* CONFIG_NUMA */ 251 252 #endif 253