1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * S390 version 4 * 5 * Derived from "include/asm-i386/mmu_context.h" 6 */ 7 8 #ifndef __S390_MMU_CONTEXT_H 9 #define __S390_MMU_CONTEXT_H 10 11 #include <asm/pgalloc.h> 12 #include <linux/uaccess.h> 13 #include <linux/mm_types.h> 14 #include <asm/tlbflush.h> 15 #include <asm/ctl_reg.h> 16 #include <asm-generic/mm_hooks.h> 17 18 static inline int init_new_context(struct task_struct *tsk, 19 struct mm_struct *mm) 20 { 21 spin_lock_init(&mm->context.lock); 22 INIT_LIST_HEAD(&mm->context.pgtable_list); 23 INIT_LIST_HEAD(&mm->context.gmap_list); 24 cpumask_clear(&mm->context.cpu_attach_mask); 25 atomic_set(&mm->context.flush_count, 0); 26 mm->context.gmap_asce = 0; 27 mm->context.flush_mm = 0; 28 mm->context.compat_mm = test_thread_flag(TIF_31BIT); 29 #ifdef CONFIG_PGSTE 30 mm->context.alloc_pgste = page_table_allocate_pgste || 31 test_thread_flag(TIF_PGSTE) || 32 (current->mm && current->mm->context.alloc_pgste); 33 mm->context.has_pgste = 0; 34 mm->context.uses_skeys = 0; 35 mm->context.uses_cmm = 0; 36 mm->context.allow_gmap_hpage_1m = 0; 37 #endif 38 switch (mm->context.asce_limit) { 39 case _REGION2_SIZE: 40 /* 41 * forked 3-level task, fall through to set new asce with new 42 * mm->pgd 43 */ 44 case 0: 45 /* context created by exec, set asce limit to 4TB */ 46 mm->context.asce_limit = STACK_TOP_MAX; 47 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 48 _ASCE_USER_BITS | _ASCE_TYPE_REGION3; 49 break; 50 case -PAGE_SIZE: 51 /* forked 5-level task, set new asce with new_mm->pgd */ 52 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 53 _ASCE_USER_BITS | _ASCE_TYPE_REGION1; 54 break; 55 case _REGION1_SIZE: 56 /* forked 4-level task, set new asce with new mm->pgd */ 57 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 58 _ASCE_USER_BITS | _ASCE_TYPE_REGION2; 59 break; 60 case _REGION3_SIZE: 61 /* forked 2-level compat task, set new asce with new mm->pgd */ 62 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 63 _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT; 64 } 65 crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm)); 66 return 0; 67 } 68 69 #define destroy_context(mm) do { } while (0) 70 71 static inline void set_user_asce(struct mm_struct *mm) 72 { 73 S390_lowcore.user_asce = mm->context.asce; 74 __ctl_load(S390_lowcore.user_asce, 1, 1); 75 clear_cpu_flag(CIF_ASCE_PRIMARY); 76 } 77 78 static inline void clear_user_asce(void) 79 { 80 S390_lowcore.user_asce = S390_lowcore.kernel_asce; 81 __ctl_load(S390_lowcore.kernel_asce, 1, 1); 82 set_cpu_flag(CIF_ASCE_PRIMARY); 83 } 84 85 mm_segment_t enable_sacf_uaccess(void); 86 void disable_sacf_uaccess(mm_segment_t old_fs); 87 88 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 89 struct task_struct *tsk) 90 { 91 int cpu = smp_processor_id(); 92 93 S390_lowcore.user_asce = next->context.asce; 94 cpumask_set_cpu(cpu, &next->context.cpu_attach_mask); 95 /* Clear previous user-ASCE from CR1 and CR7 */ 96 if (!test_cpu_flag(CIF_ASCE_PRIMARY)) { 97 __ctl_load(S390_lowcore.kernel_asce, 1, 1); 98 set_cpu_flag(CIF_ASCE_PRIMARY); 99 } 100 if (test_cpu_flag(CIF_ASCE_SECONDARY)) { 101 __ctl_load(S390_lowcore.vdso_asce, 7, 7); 102 clear_cpu_flag(CIF_ASCE_SECONDARY); 103 } 104 if (prev != next) 105 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); 106 } 107 108 #define finish_arch_post_lock_switch finish_arch_post_lock_switch 109 static inline void finish_arch_post_lock_switch(void) 110 { 111 struct task_struct *tsk = current; 112 struct mm_struct *mm = tsk->mm; 113 114 if (mm) { 115 preempt_disable(); 116 while (atomic_read(&mm->context.flush_count)) 117 cpu_relax(); 118 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); 119 __tlb_flush_mm_lazy(mm); 120 preempt_enable(); 121 } 122 set_fs(current->thread.mm_segment); 123 } 124 125 #define enter_lazy_tlb(mm,tsk) do { } while (0) 126 #define deactivate_mm(tsk,mm) do { } while (0) 127 128 static inline void activate_mm(struct mm_struct *prev, 129 struct mm_struct *next) 130 { 131 switch_mm(prev, next, current); 132 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next)); 133 set_user_asce(next); 134 } 135 136 #endif /* __S390_MMU_CONTEXT_H */ 137