1 /* 2 * S390 version 3 * 4 * Derived from "include/asm-i386/mmu_context.h" 5 */ 6 7 #ifndef __S390_MMU_CONTEXT_H 8 #define __S390_MMU_CONTEXT_H 9 10 #include <asm/pgalloc.h> 11 #include <linux/uaccess.h> 12 #include <linux/mm_types.h> 13 #include <asm/tlbflush.h> 14 #include <asm/ctl_reg.h> 15 16 static inline int init_new_context(struct task_struct *tsk, 17 struct mm_struct *mm) 18 { 19 spin_lock_init(&mm->context.pgtable_lock); 20 INIT_LIST_HEAD(&mm->context.pgtable_list); 21 spin_lock_init(&mm->context.gmap_lock); 22 INIT_LIST_HEAD(&mm->context.gmap_list); 23 cpumask_clear(&mm->context.cpu_attach_mask); 24 atomic_set(&mm->context.flush_count, 0); 25 mm->context.gmap_asce = 0; 26 mm->context.flush_mm = 0; 27 #ifdef CONFIG_PGSTE 28 mm->context.alloc_pgste = page_table_allocate_pgste; 29 mm->context.has_pgste = 0; 30 mm->context.use_skey = 0; 31 #endif 32 switch (mm->context.asce_limit) { 33 case 1UL << 42: 34 /* 35 * forked 3-level task, fall through to set new asce with new 36 * mm->pgd 37 */ 38 case 0: 39 /* context created by exec, set asce limit to 4TB */ 40 mm->context.asce_limit = STACK_TOP_MAX; 41 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 42 _ASCE_USER_BITS | _ASCE_TYPE_REGION3; 43 break; 44 case 1UL << 53: 45 /* forked 4-level task, set new asce with new mm->pgd */ 46 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 47 _ASCE_USER_BITS | _ASCE_TYPE_REGION2; 48 break; 49 case 1UL << 31: 50 /* forked 2-level compat task, set new asce with new mm->pgd */ 51 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 52 _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT; 53 /* pgd_alloc() did not increase mm->nr_pmds */ 54 mm_inc_nr_pmds(mm); 55 } 56 crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm)); 57 return 0; 58 } 59 60 #define destroy_context(mm) do { } while (0) 61 62 static inline void set_user_asce(struct mm_struct *mm) 63 { 64 S390_lowcore.user_asce = mm->context.asce; 65 if (current->thread.mm_segment.ar4) 66 __ctl_load(S390_lowcore.user_asce, 7, 7); 67 set_cpu_flag(CIF_ASCE_PRIMARY); 68 } 69 70 static inline void clear_user_asce(void) 71 { 72 S390_lowcore.user_asce = S390_lowcore.kernel_asce; 73 74 __ctl_load(S390_lowcore.user_asce, 1, 1); 75 __ctl_load(S390_lowcore.user_asce, 7, 7); 76 } 77 78 static inline void load_kernel_asce(void) 79 { 80 unsigned long asce; 81 82 __ctl_store(asce, 1, 1); 83 if (asce != S390_lowcore.kernel_asce) 84 __ctl_load(S390_lowcore.kernel_asce, 1, 1); 85 set_cpu_flag(CIF_ASCE_PRIMARY); 86 } 87 88 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 89 struct task_struct *tsk) 90 { 91 int cpu = smp_processor_id(); 92 93 S390_lowcore.user_asce = next->context.asce; 94 if (prev == next) 95 return; 96 cpumask_set_cpu(cpu, &next->context.cpu_attach_mask); 97 cpumask_set_cpu(cpu, mm_cpumask(next)); 98 /* Clear old ASCE by loading the kernel ASCE. */ 99 __ctl_load(S390_lowcore.kernel_asce, 1, 1); 100 __ctl_load(S390_lowcore.kernel_asce, 7, 7); 101 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); 102 } 103 104 #define finish_arch_post_lock_switch finish_arch_post_lock_switch 105 static inline void finish_arch_post_lock_switch(void) 106 { 107 struct task_struct *tsk = current; 108 struct mm_struct *mm = tsk->mm; 109 110 load_kernel_asce(); 111 if (mm) { 112 preempt_disable(); 113 while (atomic_read(&mm->context.flush_count)) 114 cpu_relax(); 115 116 if (mm->context.flush_mm) 117 __tlb_flush_mm(mm); 118 preempt_enable(); 119 } 120 set_fs(current->thread.mm_segment); 121 } 122 123 #define enter_lazy_tlb(mm,tsk) do { } while (0) 124 #define deactivate_mm(tsk,mm) do { } while (0) 125 126 static inline void activate_mm(struct mm_struct *prev, 127 struct mm_struct *next) 128 { 129 switch_mm(prev, next, current); 130 set_user_asce(next); 131 } 132 133 static inline void arch_dup_mmap(struct mm_struct *oldmm, 134 struct mm_struct *mm) 135 { 136 } 137 138 static inline void arch_exit_mmap(struct mm_struct *mm) 139 { 140 } 141 142 static inline void arch_unmap(struct mm_struct *mm, 143 struct vm_area_struct *vma, 144 unsigned long start, unsigned long end) 145 { 146 } 147 148 static inline void arch_bprm_mm_init(struct mm_struct *mm, 149 struct vm_area_struct *vma) 150 { 151 } 152 153 static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, 154 bool write, bool execute, bool foreign) 155 { 156 /* by default, allow everything */ 157 return true; 158 } 159 160 static inline bool arch_pte_access_permitted(pte_t pte, bool write) 161 { 162 /* by default, allow everything */ 163 return true; 164 } 165 #endif /* __S390_MMU_CONTEXT_H */ 166