1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * S390 version 4 * 5 * Derived from "include/asm-i386/mmu_context.h" 6 */ 7 8 #ifndef __S390_MMU_CONTEXT_H 9 #define __S390_MMU_CONTEXT_H 10 11 #include <asm/pgalloc.h> 12 #include <linux/uaccess.h> 13 #include <linux/mm_types.h> 14 #include <asm/tlbflush.h> 15 #include <asm/ctl_reg.h> 16 #include <asm-generic/mm_hooks.h> 17 18 static inline int init_new_context(struct task_struct *tsk, 19 struct mm_struct *mm) 20 { 21 spin_lock_init(&mm->context.lock); 22 INIT_LIST_HEAD(&mm->context.pgtable_list); 23 INIT_LIST_HEAD(&mm->context.gmap_list); 24 cpumask_clear(&mm->context.cpu_attach_mask); 25 atomic_set(&mm->context.flush_count, 0); 26 mm->context.gmap_asce = 0; 27 mm->context.flush_mm = 0; 28 mm->context.compat_mm = 0; 29 #ifdef CONFIG_PGSTE 30 mm->context.alloc_pgste = page_table_allocate_pgste || 31 test_thread_flag(TIF_PGSTE) || 32 (current->mm && current->mm->context.alloc_pgste); 33 mm->context.has_pgste = 0; 34 mm->context.uses_skeys = 0; 35 mm->context.uses_cmm = 0; 36 mm->context.allow_gmap_hpage_1m = 0; 37 #endif 38 switch (mm->context.asce_limit) { 39 case _REGION2_SIZE: 40 /* 41 * forked 3-level task, fall through to set new asce with new 42 * mm->pgd 43 */ 44 case 0: 45 /* context created by exec, set asce limit to 4TB */ 46 mm->context.asce_limit = STACK_TOP_MAX; 47 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 48 _ASCE_USER_BITS | _ASCE_TYPE_REGION3; 49 /* pgd_alloc() did not account this pud */ 50 mm_inc_nr_puds(mm); 51 break; 52 case -PAGE_SIZE: 53 /* forked 5-level task, set new asce with new_mm->pgd */ 54 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 55 _ASCE_USER_BITS | _ASCE_TYPE_REGION1; 56 break; 57 case _REGION1_SIZE: 58 /* forked 4-level task, set new asce with new mm->pgd */ 59 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 60 _ASCE_USER_BITS | _ASCE_TYPE_REGION2; 61 break; 62 case _REGION3_SIZE: 63 /* forked 2-level compat task, set new asce with new mm->pgd */ 64 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 65 _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT; 66 /* pgd_alloc() did not account this pmd */ 67 mm_inc_nr_pmds(mm); 68 mm_inc_nr_puds(mm); 69 } 70 crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm)); 71 return 0; 72 } 73 74 #define destroy_context(mm) do { } while (0) 75 76 static inline void set_user_asce(struct mm_struct *mm) 77 { 78 S390_lowcore.user_asce = mm->context.asce; 79 __ctl_load(S390_lowcore.user_asce, 1, 1); 80 clear_cpu_flag(CIF_ASCE_PRIMARY); 81 } 82 83 static inline void clear_user_asce(void) 84 { 85 S390_lowcore.user_asce = S390_lowcore.kernel_asce; 86 __ctl_load(S390_lowcore.kernel_asce, 1, 1); 87 set_cpu_flag(CIF_ASCE_PRIMARY); 88 } 89 90 mm_segment_t enable_sacf_uaccess(void); 91 void disable_sacf_uaccess(mm_segment_t old_fs); 92 93 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 94 struct task_struct *tsk) 95 { 96 int cpu = smp_processor_id(); 97 98 if (prev == next) 99 return; 100 S390_lowcore.user_asce = next->context.asce; 101 cpumask_set_cpu(cpu, &next->context.cpu_attach_mask); 102 /* Clear previous user-ASCE from CR1 and CR7 */ 103 if (!test_cpu_flag(CIF_ASCE_PRIMARY)) { 104 __ctl_load(S390_lowcore.kernel_asce, 1, 1); 105 set_cpu_flag(CIF_ASCE_PRIMARY); 106 } 107 if (test_cpu_flag(CIF_ASCE_SECONDARY)) { 108 __ctl_load(S390_lowcore.vdso_asce, 7, 7); 109 clear_cpu_flag(CIF_ASCE_SECONDARY); 110 } 111 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); 112 } 113 114 #define finish_arch_post_lock_switch finish_arch_post_lock_switch 115 static inline void finish_arch_post_lock_switch(void) 116 { 117 struct task_struct *tsk = current; 118 struct mm_struct *mm = tsk->mm; 119 120 if (mm) { 121 preempt_disable(); 122 while (atomic_read(&mm->context.flush_count)) 123 cpu_relax(); 124 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); 125 __tlb_flush_mm_lazy(mm); 126 preempt_enable(); 127 } 128 set_fs(current->thread.mm_segment); 129 } 130 131 #define enter_lazy_tlb(mm,tsk) do { } while (0) 132 #define deactivate_mm(tsk,mm) do { } while (0) 133 134 static inline void activate_mm(struct mm_struct *prev, 135 struct mm_struct *next) 136 { 137 switch_mm(prev, next, current); 138 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next)); 139 set_user_asce(next); 140 } 141 142 #endif /* __S390_MMU_CONTEXT_H */ 143