1 /*
2  *  S390 version
3  *
4  *  Derived from "include/asm-i386/mmu_context.h"
5  */
6 
7 #ifndef __S390_MMU_CONTEXT_H
8 #define __S390_MMU_CONTEXT_H
9 
10 #include <asm/pgalloc.h>
11 #include <asm/uaccess.h>
12 #include <asm/tlbflush.h>
13 #include <asm/ctl_reg.h>
14 
15 static inline int init_new_context(struct task_struct *tsk,
16 				   struct mm_struct *mm)
17 {
18 	cpumask_clear(&mm->context.cpu_attach_mask);
19 	atomic_set(&mm->context.attach_count, 0);
20 	mm->context.flush_mm = 0;
21 	mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
22 #ifdef CONFIG_64BIT
23 	mm->context.asce_bits |= _ASCE_TYPE_REGION3;
24 #endif
25 	mm->context.has_pgste = 0;
26 	mm->context.use_skey = 0;
27 	mm->context.asce_limit = STACK_TOP_MAX;
28 	crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
29 	return 0;
30 }
31 
32 #define destroy_context(mm)             do { } while (0)
33 
34 static inline void set_user_asce(struct mm_struct *mm)
35 {
36 	pgd_t *pgd = mm->pgd;
37 
38 	S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd);
39 	set_fs(current->thread.mm_segment);
40 	set_cpu_flag(CIF_ASCE);
41 }
42 
43 static inline void clear_user_asce(void)
44 {
45 	S390_lowcore.user_asce = S390_lowcore.kernel_asce;
46 
47 	__ctl_load(S390_lowcore.user_asce, 1, 1);
48 	__ctl_load(S390_lowcore.user_asce, 7, 7);
49 }
50 
51 static inline void load_kernel_asce(void)
52 {
53 	unsigned long asce;
54 
55 	__ctl_store(asce, 1, 1);
56 	if (asce != S390_lowcore.kernel_asce)
57 		__ctl_load(S390_lowcore.kernel_asce, 1, 1);
58 	set_cpu_flag(CIF_ASCE);
59 }
60 
61 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
62 			     struct task_struct *tsk)
63 {
64 	int cpu = smp_processor_id();
65 
66 	if (prev == next)
67 		return;
68 	if (MACHINE_HAS_TLB_LC)
69 		cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
70 	/* Clear old ASCE by loading the kernel ASCE. */
71 	__ctl_load(S390_lowcore.kernel_asce, 1, 1);
72 	__ctl_load(S390_lowcore.kernel_asce, 7, 7);
73 	/* Delay loading of the new ASCE to control registers CR1 & CR7 */
74 	set_cpu_flag(CIF_ASCE);
75 	atomic_inc(&next->context.attach_count);
76 	atomic_dec(&prev->context.attach_count);
77 	if (MACHINE_HAS_TLB_LC)
78 		cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
79 }
80 
81 #define finish_arch_post_lock_switch finish_arch_post_lock_switch
82 static inline void finish_arch_post_lock_switch(void)
83 {
84 	struct task_struct *tsk = current;
85 	struct mm_struct *mm = tsk->mm;
86 
87 	if (!mm)
88 		return;
89 	preempt_disable();
90 	while (atomic_read(&mm->context.attach_count) >> 16)
91 		cpu_relax();
92 
93 	cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
94 	set_user_asce(mm);
95 	if (mm->context.flush_mm)
96 		__tlb_flush_mm(mm);
97 	preempt_enable();
98 }
99 
100 #define enter_lazy_tlb(mm,tsk)	do { } while (0)
101 #define deactivate_mm(tsk,mm)	do { } while (0)
102 
103 static inline void activate_mm(struct mm_struct *prev,
104                                struct mm_struct *next)
105 {
106 	switch_mm(prev, next, current);
107 	cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
108 	set_user_asce(next);
109 }
110 
111 static inline void arch_dup_mmap(struct mm_struct *oldmm,
112 				 struct mm_struct *mm)
113 {
114 #ifdef CONFIG_64BIT
115 	if (oldmm->context.asce_limit < mm->context.asce_limit)
116 		crst_table_downgrade(mm, oldmm->context.asce_limit);
117 #endif
118 }
119 
120 static inline void arch_exit_mmap(struct mm_struct *mm)
121 {
122 }
123 
124 #endif /* __S390_MMU_CONTEXT_H */
125