1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * S390 version 4 * 5 * Derived from "include/asm-i386/mmu_context.h" 6 */ 7 8 #ifndef __S390_MMU_CONTEXT_H 9 #define __S390_MMU_CONTEXT_H 10 11 #include <asm/pgalloc.h> 12 #include <linux/uaccess.h> 13 #include <linux/mm_types.h> 14 #include <asm/tlbflush.h> 15 #include <asm/ctl_reg.h> 16 #include <asm-generic/mm_hooks.h> 17 18 static inline int init_new_context(struct task_struct *tsk, 19 struct mm_struct *mm) 20 { 21 unsigned long asce_type, init_entry; 22 23 spin_lock_init(&mm->context.lock); 24 INIT_LIST_HEAD(&mm->context.pgtable_list); 25 INIT_LIST_HEAD(&mm->context.gmap_list); 26 cpumask_clear(&mm->context.cpu_attach_mask); 27 atomic_set(&mm->context.flush_count, 0); 28 atomic_set(&mm->context.is_protected, 0); 29 mm->context.gmap_asce = 0; 30 mm->context.flush_mm = 0; 31 #ifdef CONFIG_PGSTE 32 mm->context.alloc_pgste = page_table_allocate_pgste || 33 test_thread_flag(TIF_PGSTE) || 34 (current->mm && current->mm->context.alloc_pgste); 35 mm->context.has_pgste = 0; 36 mm->context.uses_skeys = 0; 37 mm->context.uses_cmm = 0; 38 mm->context.allow_gmap_hpage_1m = 0; 39 #endif 40 switch (mm->context.asce_limit) { 41 default: 42 /* 43 * context created by exec, the value of asce_limit can 44 * only be zero in this case 45 */ 46 VM_BUG_ON(mm->context.asce_limit); 47 /* continue as 3-level task */ 48 mm->context.asce_limit = _REGION2_SIZE; 49 fallthrough; 50 case _REGION2_SIZE: 51 /* forked 3-level task */ 52 init_entry = _REGION3_ENTRY_EMPTY; 53 asce_type = _ASCE_TYPE_REGION3; 54 break; 55 case TASK_SIZE_MAX: 56 /* forked 5-level task */ 57 init_entry = _REGION1_ENTRY_EMPTY; 58 asce_type = _ASCE_TYPE_REGION1; 59 break; 60 case _REGION1_SIZE: 61 /* forked 4-level task */ 62 init_entry = _REGION2_ENTRY_EMPTY; 63 asce_type = _ASCE_TYPE_REGION2; 64 break; 65 } 66 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | 67 _ASCE_USER_BITS | asce_type; 68 crst_table_init((unsigned long *) mm->pgd, init_entry); 69 return 0; 70 } 71 72 #define destroy_context(mm) do { } while (0) 73 74 static inline void set_user_asce(struct mm_struct *mm) 75 { 76 S390_lowcore.user_asce = mm->context.asce; 77 __ctl_load(S390_lowcore.user_asce, 1, 1); 78 clear_cpu_flag(CIF_ASCE_PRIMARY); 79 } 80 81 static inline void clear_user_asce(void) 82 { 83 S390_lowcore.user_asce = S390_lowcore.kernel_asce; 84 __ctl_load(S390_lowcore.kernel_asce, 1, 1); 85 set_cpu_flag(CIF_ASCE_PRIMARY); 86 } 87 88 mm_segment_t enable_sacf_uaccess(void); 89 void disable_sacf_uaccess(mm_segment_t old_fs); 90 91 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 92 struct task_struct *tsk) 93 { 94 int cpu = smp_processor_id(); 95 96 S390_lowcore.user_asce = next->context.asce; 97 cpumask_set_cpu(cpu, &next->context.cpu_attach_mask); 98 /* Clear previous user-ASCE from CR1 and CR7 */ 99 if (!test_cpu_flag(CIF_ASCE_PRIMARY)) { 100 __ctl_load(S390_lowcore.kernel_asce, 1, 1); 101 set_cpu_flag(CIF_ASCE_PRIMARY); 102 } 103 if (test_cpu_flag(CIF_ASCE_SECONDARY)) { 104 __ctl_load(S390_lowcore.vdso_asce, 7, 7); 105 clear_cpu_flag(CIF_ASCE_SECONDARY); 106 } 107 if (prev != next) 108 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); 109 } 110 111 #define finish_arch_post_lock_switch finish_arch_post_lock_switch 112 static inline void finish_arch_post_lock_switch(void) 113 { 114 struct task_struct *tsk = current; 115 struct mm_struct *mm = tsk->mm; 116 117 if (mm) { 118 preempt_disable(); 119 while (atomic_read(&mm->context.flush_count)) 120 cpu_relax(); 121 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); 122 __tlb_flush_mm_lazy(mm); 123 preempt_enable(); 124 } 125 set_fs(current->thread.mm_segment); 126 } 127 128 #define enter_lazy_tlb(mm,tsk) do { } while (0) 129 #define deactivate_mm(tsk,mm) do { } while (0) 130 131 static inline void activate_mm(struct mm_struct *prev, 132 struct mm_struct *next) 133 { 134 switch_mm(prev, next, current); 135 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next)); 136 set_user_asce(next); 137 } 138 139 #endif /* __S390_MMU_CONTEXT_H */ 140