1 /* 2 * Copyright IBM Corp. 1999, 2012 3 * Author(s): Hartmut Penner <hp@de.ibm.com>, 4 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 5 * Denis Joseph Barrow, 6 */ 7 8 #ifndef _ASM_S390_LOWCORE_H 9 #define _ASM_S390_LOWCORE_H 10 11 #include <linux/types.h> 12 #include <asm/ptrace.h> 13 #include <asm/cpu.h> 14 #include <asm/types.h> 15 16 #define LC_ORDER 1 17 #define LC_PAGES 2 18 19 struct lowcore { 20 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */ 21 __u32 ipl_parmblock_ptr; /* 0x0014 */ 22 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ 23 __u32 ext_params; /* 0x0080 */ 24 __u16 ext_cpu_addr; /* 0x0084 */ 25 __u16 ext_int_code; /* 0x0086 */ 26 __u16 svc_ilc; /* 0x0088 */ 27 __u16 svc_code; /* 0x008a */ 28 __u16 pgm_ilc; /* 0x008c */ 29 __u16 pgm_code; /* 0x008e */ 30 __u32 data_exc_code; /* 0x0090 */ 31 __u16 mon_class_num; /* 0x0094 */ 32 __u8 per_code; /* 0x0096 */ 33 __u8 per_atmid; /* 0x0097 */ 34 __u64 per_address; /* 0x0098 */ 35 __u8 exc_access_id; /* 0x00a0 */ 36 __u8 per_access_id; /* 0x00a1 */ 37 __u8 op_access_id; /* 0x00a2 */ 38 __u8 ar_mode_id; /* 0x00a3 */ 39 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */ 40 __u64 trans_exc_code; /* 0x00a8 */ 41 __u64 monitor_code; /* 0x00b0 */ 42 __u16 subchannel_id; /* 0x00b8 */ 43 __u16 subchannel_nr; /* 0x00ba */ 44 __u32 io_int_parm; /* 0x00bc */ 45 __u32 io_int_word; /* 0x00c0 */ 46 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ 47 __u32 stfl_fac_list; /* 0x00c8 */ 48 __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */ 49 __u64 mcck_interruption_code; /* 0x00e8 */ 50 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ 51 __u32 external_damage_code; /* 0x00f4 */ 52 __u64 failing_storage_address; /* 0x00f8 */ 53 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */ 54 __u64 breaking_event_addr; /* 0x0110 */ 55 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */ 56 psw_t restart_old_psw; /* 0x0120 */ 57 psw_t external_old_psw; /* 0x0130 */ 58 psw_t svc_old_psw; /* 0x0140 */ 59 psw_t program_old_psw; /* 0x0150 */ 60 psw_t mcck_old_psw; /* 0x0160 */ 61 psw_t io_old_psw; /* 0x0170 */ 62 __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */ 63 psw_t restart_psw; /* 0x01a0 */ 64 psw_t external_new_psw; /* 0x01b0 */ 65 psw_t svc_new_psw; /* 0x01c0 */ 66 psw_t program_new_psw; /* 0x01d0 */ 67 psw_t mcck_new_psw; /* 0x01e0 */ 68 psw_t io_new_psw; /* 0x01f0 */ 69 70 /* Save areas. */ 71 __u64 save_area_sync[8]; /* 0x0200 */ 72 __u64 save_area_async[8]; /* 0x0240 */ 73 __u64 save_area_restart[1]; /* 0x0280 */ 74 75 /* CPU flags. */ 76 __u64 cpu_flags; /* 0x0288 */ 77 78 /* Return psws. */ 79 psw_t return_psw; /* 0x0290 */ 80 psw_t return_mcck_psw; /* 0x02a0 */ 81 82 /* CPU accounting and timing values. */ 83 __u64 sync_enter_timer; /* 0x02b0 */ 84 __u64 async_enter_timer; /* 0x02b8 */ 85 __u64 mcck_enter_timer; /* 0x02c0 */ 86 __u64 exit_timer; /* 0x02c8 */ 87 __u64 user_timer; /* 0x02d0 */ 88 __u64 system_timer; /* 0x02d8 */ 89 __u64 steal_timer; /* 0x02e0 */ 90 __u64 last_update_timer; /* 0x02e8 */ 91 __u64 last_update_clock; /* 0x02f0 */ 92 __u64 int_clock; /* 0x02f8 */ 93 __u64 mcck_clock; /* 0x0300 */ 94 __u64 clock_comparator; /* 0x0308 */ 95 96 /* Current process. */ 97 __u64 current_task; /* 0x0310 */ 98 __u64 thread_info; /* 0x0318 */ 99 __u64 kernel_stack; /* 0x0320 */ 100 101 /* Interrupt, panic and restart stack. */ 102 __u64 async_stack; /* 0x0328 */ 103 __u64 panic_stack; /* 0x0330 */ 104 __u64 restart_stack; /* 0x0338 */ 105 106 /* Restart function and parameter. */ 107 __u64 restart_fn; /* 0x0340 */ 108 __u64 restart_data; /* 0x0348 */ 109 __u64 restart_source; /* 0x0350 */ 110 111 /* Address space pointer. */ 112 __u64 kernel_asce; /* 0x0358 */ 113 __u64 user_asce; /* 0x0360 */ 114 115 /* 116 * The lpp and current_pid fields form a 117 * 64-bit value that is set as program 118 * parameter with the LPP instruction. 119 */ 120 __u32 lpp; /* 0x0368 */ 121 __u32 current_pid; /* 0x036c */ 122 123 /* SMP info area */ 124 __u32 cpu_nr; /* 0x0370 */ 125 __u32 softirq_pending; /* 0x0374 */ 126 __u64 percpu_offset; /* 0x0378 */ 127 __u64 vdso_per_cpu_data; /* 0x0380 */ 128 __u64 machine_flags; /* 0x0388 */ 129 __u8 pad_0x0390[0x0398-0x0390]; /* 0x0390 */ 130 __u64 gmap; /* 0x0398 */ 131 __u32 spinlock_lockval; /* 0x03a0 */ 132 __u8 pad_0x03a0[0x0400-0x03a4]; /* 0x03a4 */ 133 134 /* Per cpu primary space access list */ 135 __u32 paste[16]; /* 0x0400 */ 136 137 __u8 pad_0x04c0[0x0e00-0x0440]; /* 0x0440 */ 138 139 /* 140 * 0xe00 contains the address of the IPL Parameter Information 141 * block. Dump tools need IPIB for IPL after dump. 142 * Note: do not change the position of any fields in 0x0e00-0x0f00 143 */ 144 __u64 ipib; /* 0x0e00 */ 145 __u32 ipib_checksum; /* 0x0e08 */ 146 __u64 vmcore_info; /* 0x0e0c */ 147 __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */ 148 __u64 os_info; /* 0x0e18 */ 149 __u8 pad_0x0e20[0x0f00-0x0e20]; /* 0x0e20 */ 150 151 /* Extended facility list */ 152 __u64 stfle_fac_list[32]; /* 0x0f00 */ 153 __u8 pad_0x1000[0x11b0-0x1000]; /* 0x1000 */ 154 155 /* Pointer to vector register save area */ 156 __u64 vector_save_area_addr; /* 0x11b0 */ 157 158 /* 64 bit extparam used for pfault/diag 250: defined by architecture */ 159 __u64 ext_params2; /* 0x11B8 */ 160 __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */ 161 162 /* CPU register save area: defined by architecture */ 163 __u64 floating_pt_save_area[16]; /* 0x1200 */ 164 __u64 gpregs_save_area[16]; /* 0x1280 */ 165 psw_t psw_save_area; /* 0x1300 */ 166 __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ 167 __u32 prefixreg_save_area; /* 0x1318 */ 168 __u32 fpt_creg_save_area; /* 0x131c */ 169 __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */ 170 __u32 tod_progreg_save_area; /* 0x1324 */ 171 __u32 cpu_timer_save_area[2]; /* 0x1328 */ 172 __u32 clock_comp_save_area[2]; /* 0x1330 */ 173 __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */ 174 __u32 access_regs_save_area[16]; /* 0x1340 */ 175 __u64 cregs_save_area[16]; /* 0x1380 */ 176 __u8 pad_0x1400[0x1800-0x1400]; /* 0x1400 */ 177 178 /* Transaction abort diagnostic block */ 179 __u8 pgm_tdb[256]; /* 0x1800 */ 180 __u8 pad_0x1900[0x1c00-0x1900]; /* 0x1900 */ 181 182 /* Software defined save area for vector registers */ 183 __u8 vector_save_area[1024]; /* 0x1c00 */ 184 } __packed; 185 186 #define S390_lowcore (*((struct lowcore *) 0)) 187 188 extern struct lowcore *lowcore_ptr[]; 189 190 static inline void set_prefix(__u32 address) 191 { 192 asm volatile("spx %0" : : "m" (address) : "memory"); 193 } 194 195 static inline __u32 store_prefix(void) 196 { 197 __u32 address; 198 199 asm volatile("stpx %0" : "=m" (address)); 200 return address; 201 } 202 203 #endif /* _ASM_S390_LOWCORE_H */ 204