xref: /openbmc/linux/arch/s390/include/asm/kvm_host.h (revision 15e3ae36)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * definition for kernel virtual machines on s390
4  *
5  * Copyright IBM Corp. 2008, 2018
6  *
7  *    Author(s): Carsten Otte <cotte@de.ibm.com>
8  */
9 
10 
11 #ifndef ASM_KVM_HOST_H
12 #define ASM_KVM_HOST_H
13 
14 #include <linux/types.h>
15 #include <linux/hrtimer.h>
16 #include <linux/interrupt.h>
17 #include <linux/kvm_types.h>
18 #include <linux/kvm_host.h>
19 #include <linux/kvm.h>
20 #include <linux/seqlock.h>
21 #include <linux/module.h>
22 #include <asm/debug.h>
23 #include <asm/cpu.h>
24 #include <asm/fpu/api.h>
25 #include <asm/isc.h>
26 #include <asm/guarded_storage.h>
27 
28 #define KVM_S390_BSCA_CPU_SLOTS 64
29 #define KVM_S390_ESCA_CPU_SLOTS 248
30 #define KVM_MAX_VCPUS 255
31 #define KVM_USER_MEM_SLOTS 32
32 
33 /*
34  * These seem to be used for allocating ->chip in the routing table,
35  * which we don't use. 4096 is an out-of-thin-air value. If we need
36  * to look at ->chip later on, we'll need to revisit this.
37  */
38 #define KVM_NR_IRQCHIPS 1
39 #define KVM_IRQCHIP_NUM_PINS 4096
40 #define KVM_HALT_POLL_NS_DEFAULT 50000
41 
42 /* s390-specific vcpu->requests bit members */
43 #define KVM_REQ_ENABLE_IBS	KVM_ARCH_REQ(0)
44 #define KVM_REQ_DISABLE_IBS	KVM_ARCH_REQ(1)
45 #define KVM_REQ_ICPT_OPEREXC	KVM_ARCH_REQ(2)
46 #define KVM_REQ_START_MIGRATION KVM_ARCH_REQ(3)
47 #define KVM_REQ_STOP_MIGRATION  KVM_ARCH_REQ(4)
48 #define KVM_REQ_VSIE_RESTART	KVM_ARCH_REQ(5)
49 
50 #define SIGP_CTRL_C		0x80
51 #define SIGP_CTRL_SCN_MASK	0x3f
52 
53 union bsca_sigp_ctrl {
54 	__u8 value;
55 	struct {
56 		__u8 c : 1;
57 		__u8 r : 1;
58 		__u8 scn : 6;
59 	};
60 };
61 
62 union esca_sigp_ctrl {
63 	__u16 value;
64 	struct {
65 		__u8 c : 1;
66 		__u8 reserved: 7;
67 		__u8 scn;
68 	};
69 };
70 
71 struct esca_entry {
72 	union esca_sigp_ctrl sigp_ctrl;
73 	__u16   reserved1[3];
74 	__u64   sda;
75 	__u64   reserved2[6];
76 };
77 
78 struct bsca_entry {
79 	__u8	reserved0;
80 	union bsca_sigp_ctrl	sigp_ctrl;
81 	__u16	reserved[3];
82 	__u64	sda;
83 	__u64	reserved2[2];
84 };
85 
86 union ipte_control {
87 	unsigned long val;
88 	struct {
89 		unsigned long k  : 1;
90 		unsigned long kh : 31;
91 		unsigned long kg : 32;
92 	};
93 };
94 
95 struct bsca_block {
96 	union ipte_control ipte_control;
97 	__u64	reserved[5];
98 	__u64	mcn;
99 	__u64	reserved2;
100 	struct bsca_entry cpu[KVM_S390_BSCA_CPU_SLOTS];
101 };
102 
103 struct esca_block {
104 	union ipte_control ipte_control;
105 	__u64   reserved1[7];
106 	__u64   mcn[4];
107 	__u64   reserved2[20];
108 	struct esca_entry cpu[KVM_S390_ESCA_CPU_SLOTS];
109 };
110 
111 /*
112  * This struct is used to store some machine check info from lowcore
113  * for machine checks that happen while the guest is running.
114  * This info in host's lowcore might be overwritten by a second machine
115  * check from host when host is in the machine check's high-level handling.
116  * The size is 24 bytes.
117  */
118 struct mcck_volatile_info {
119 	__u64 mcic;
120 	__u64 failing_storage_address;
121 	__u32 ext_damage_code;
122 	__u32 reserved;
123 };
124 
125 #define CR0_INITIAL_MASK (CR0_UNUSED_56 | CR0_INTERRUPT_KEY_SUBMASK | \
126 			  CR0_MEASUREMENT_ALERT_SUBMASK)
127 #define CR14_INITIAL_MASK (CR14_UNUSED_32 | CR14_UNUSED_33 | \
128 			   CR14_EXTERNAL_DAMAGE_SUBMASK)
129 
130 #define SIDAD_SIZE_MASK		0xff
131 #define sida_origin(sie_block) \
132 	((sie_block)->sidad & PAGE_MASK)
133 #define sida_size(sie_block) \
134 	((((sie_block)->sidad & SIDAD_SIZE_MASK) + 1) * PAGE_SIZE)
135 
136 #define CPUSTAT_STOPPED    0x80000000
137 #define CPUSTAT_WAIT       0x10000000
138 #define CPUSTAT_ECALL_PEND 0x08000000
139 #define CPUSTAT_STOP_INT   0x04000000
140 #define CPUSTAT_IO_INT     0x02000000
141 #define CPUSTAT_EXT_INT    0x01000000
142 #define CPUSTAT_RUNNING    0x00800000
143 #define CPUSTAT_RETAINED   0x00400000
144 #define CPUSTAT_TIMING_SUB 0x00020000
145 #define CPUSTAT_SIE_SUB    0x00010000
146 #define CPUSTAT_RRF        0x00008000
147 #define CPUSTAT_SLSV       0x00004000
148 #define CPUSTAT_SLSR       0x00002000
149 #define CPUSTAT_ZARCH      0x00000800
150 #define CPUSTAT_MCDS       0x00000100
151 #define CPUSTAT_KSS        0x00000200
152 #define CPUSTAT_SM         0x00000080
153 #define CPUSTAT_IBS        0x00000040
154 #define CPUSTAT_GED2       0x00000010
155 #define CPUSTAT_G          0x00000008
156 #define CPUSTAT_GED        0x00000004
157 #define CPUSTAT_J          0x00000002
158 #define CPUSTAT_P          0x00000001
159 
160 struct kvm_s390_sie_block {
161 	atomic_t cpuflags;		/* 0x0000 */
162 	__u32 : 1;			/* 0x0004 */
163 	__u32 prefix : 18;
164 	__u32 : 1;
165 	__u32 ibc : 12;
166 	__u8	reserved08[4];		/* 0x0008 */
167 #define PROG_IN_SIE (1<<0)
168 	__u32	prog0c;			/* 0x000c */
169 	union {
170 		__u8	reserved10[16];		/* 0x0010 */
171 		struct {
172 			__u64	pv_handle_cpu;
173 			__u64	pv_handle_config;
174 		};
175 	};
176 #define PROG_BLOCK_SIE	(1<<0)
177 #define PROG_REQUEST	(1<<1)
178 	atomic_t prog20;		/* 0x0020 */
179 	__u8	reserved24[4];		/* 0x0024 */
180 	__u64	cputm;			/* 0x0028 */
181 	__u64	ckc;			/* 0x0030 */
182 	__u64	epoch;			/* 0x0038 */
183 	__u32	svcc;			/* 0x0040 */
184 #define LCTL_CR0	0x8000
185 #define LCTL_CR6	0x0200
186 #define LCTL_CR9	0x0040
187 #define LCTL_CR10	0x0020
188 #define LCTL_CR11	0x0010
189 #define LCTL_CR14	0x0002
190 	__u16   lctl;			/* 0x0044 */
191 	__s16	icpua;			/* 0x0046 */
192 #define ICTL_OPEREXC	0x80000000
193 #define ICTL_PINT	0x20000000
194 #define ICTL_LPSW	0x00400000
195 #define ICTL_STCTL	0x00040000
196 #define ICTL_ISKE	0x00004000
197 #define ICTL_SSKE	0x00002000
198 #define ICTL_RRBE	0x00001000
199 #define ICTL_TPROT	0x00000200
200 	__u32	ictl;			/* 0x0048 */
201 #define ECA_CEI		0x80000000
202 #define ECA_IB		0x40000000
203 #define ECA_SIGPI	0x10000000
204 #define ECA_MVPGI	0x01000000
205 #define ECA_AIV		0x00200000
206 #define ECA_VX		0x00020000
207 #define ECA_PROTEXCI	0x00002000
208 #define ECA_APIE	0x00000008
209 #define ECA_SII		0x00000001
210 	__u32	eca;			/* 0x004c */
211 #define ICPT_INST	0x04
212 #define ICPT_PROGI	0x08
213 #define ICPT_INSTPROGI	0x0C
214 #define ICPT_EXTREQ	0x10
215 #define ICPT_EXTINT	0x14
216 #define ICPT_IOREQ	0x18
217 #define ICPT_WAIT	0x1c
218 #define ICPT_VALIDITY	0x20
219 #define ICPT_STOP	0x28
220 #define ICPT_OPEREXC	0x2C
221 #define ICPT_PARTEXEC	0x38
222 #define ICPT_IOINST	0x40
223 #define ICPT_KSS	0x5c
224 #define ICPT_MCHKREQ	0x60
225 #define ICPT_INT_ENABLE	0x64
226 #define ICPT_PV_INSTR	0x68
227 #define ICPT_PV_NOTIFY	0x6c
228 #define ICPT_PV_PREF	0x70
229 	__u8	icptcode;		/* 0x0050 */
230 	__u8	icptstatus;		/* 0x0051 */
231 	__u16	ihcpu;			/* 0x0052 */
232 	__u8	reserved54;		/* 0x0054 */
233 #define IICTL_CODE_NONE		 0x00
234 #define IICTL_CODE_MCHK		 0x01
235 #define IICTL_CODE_EXT		 0x02
236 #define IICTL_CODE_IO		 0x03
237 #define IICTL_CODE_RESTART	 0x04
238 #define IICTL_CODE_SPECIFICATION 0x10
239 #define IICTL_CODE_OPERAND	 0x11
240 	__u8	iictl;			/* 0x0055 */
241 	__u16	ipa;			/* 0x0056 */
242 	__u32	ipb;			/* 0x0058 */
243 	__u32	scaoh;			/* 0x005c */
244 #define FPF_BPBC 	0x20
245 	__u8	fpf;			/* 0x0060 */
246 #define ECB_GS		0x40
247 #define ECB_TE		0x10
248 #define ECB_SRSI	0x04
249 #define ECB_HOSTPROTINT	0x02
250 	__u8	ecb;			/* 0x0061 */
251 #define ECB2_CMMA	0x80
252 #define ECB2_IEP	0x20
253 #define ECB2_PFMFI	0x08
254 #define ECB2_ESCA	0x04
255 	__u8    ecb2;                   /* 0x0062 */
256 #define ECB3_DEA 0x08
257 #define ECB3_AES 0x04
258 #define ECB3_RI  0x01
259 	__u8    ecb3;			/* 0x0063 */
260 	__u32	scaol;			/* 0x0064 */
261 	__u8	sdf;			/* 0x0068 */
262 	__u8    epdx;			/* 0x0069 */
263 	__u8    reserved6a[2];		/* 0x006a */
264 	__u32	todpr;			/* 0x006c */
265 #define GISA_FORMAT1 0x00000001
266 	__u32	gd;			/* 0x0070 */
267 	__u8	reserved74[12];		/* 0x0074 */
268 	__u64	mso;			/* 0x0080 */
269 	__u64	msl;			/* 0x0088 */
270 	psw_t	gpsw;			/* 0x0090 */
271 	__u64	gg14;			/* 0x00a0 */
272 	__u64	gg15;			/* 0x00a8 */
273 	__u8	reservedb0[8];		/* 0x00b0 */
274 #define HPID_KVM	0x4
275 #define HPID_VSIE	0x5
276 	__u8	hpid;			/* 0x00b8 */
277 	__u8	reservedb9[7];		/* 0x00b9 */
278 	union {
279 		struct {
280 			__u32	eiparams;	/* 0x00c0 */
281 			__u16	extcpuaddr;	/* 0x00c4 */
282 			__u16	eic;		/* 0x00c6 */
283 		};
284 		__u64	mcic;			/* 0x00c0 */
285 	} __packed;
286 	__u32	reservedc8;		/* 0x00c8 */
287 	union {
288 		struct {
289 			__u16	pgmilc;		/* 0x00cc */
290 			__u16	iprcc;		/* 0x00ce */
291 		};
292 		__u32	edc;			/* 0x00cc */
293 	} __packed;
294 	union {
295 		struct {
296 			__u32	dxc;		/* 0x00d0 */
297 			__u16	mcn;		/* 0x00d4 */
298 			__u8	perc;		/* 0x00d6 */
299 			__u8	peratmid;	/* 0x00d7 */
300 		};
301 		__u64	faddr;			/* 0x00d0 */
302 	} __packed;
303 	__u64	peraddr;		/* 0x00d8 */
304 	__u8	eai;			/* 0x00e0 */
305 	__u8	peraid;			/* 0x00e1 */
306 	__u8	oai;			/* 0x00e2 */
307 	__u8	armid;			/* 0x00e3 */
308 	__u8	reservede4[4];		/* 0x00e4 */
309 	union {
310 		__u64	tecmc;		/* 0x00e8 */
311 		struct {
312 			__u16	subchannel_id;	/* 0x00e8 */
313 			__u16	subchannel_nr;	/* 0x00ea */
314 			__u32	io_int_parm;	/* 0x00ec */
315 			__u32	io_int_word;	/* 0x00f0 */
316 		};
317 	} __packed;
318 	__u8	reservedf4[8];		/* 0x00f4 */
319 #define CRYCB_FORMAT_MASK 0x00000003
320 #define CRYCB_FORMAT0 0x00000000
321 #define CRYCB_FORMAT1 0x00000001
322 #define CRYCB_FORMAT2 0x00000003
323 	__u32	crycbd;			/* 0x00fc */
324 	__u64	gcr[16];		/* 0x0100 */
325 	union {
326 		__u64	gbea;		/* 0x0180 */
327 		__u64	sidad;
328 	};
329 	__u8    reserved188[8];		/* 0x0188 */
330 	__u64   sdnxo;			/* 0x0190 */
331 	__u8    reserved198[8];		/* 0x0198 */
332 	__u32	fac;			/* 0x01a0 */
333 	__u8	reserved1a4[20];	/* 0x01a4 */
334 	__u64	cbrlo;			/* 0x01b8 */
335 	__u8	reserved1c0[8];		/* 0x01c0 */
336 #define ECD_HOSTREGMGMT	0x20000000
337 #define ECD_MEF		0x08000000
338 #define ECD_ETOKENF	0x02000000
339 #define ECD_ECC		0x00200000
340 	__u32	ecd;			/* 0x01c8 */
341 	__u8	reserved1cc[18];	/* 0x01cc */
342 	__u64	pp;			/* 0x01de */
343 	__u8	reserved1e6[2];		/* 0x01e6 */
344 	__u64	itdba;			/* 0x01e8 */
345 	__u64   riccbd;			/* 0x01f0 */
346 	__u64	gvrd;			/* 0x01f8 */
347 } __packed __aligned(512);
348 
349 struct kvm_s390_itdb {
350 	__u8	data[256];
351 };
352 
353 struct sie_page {
354 	struct kvm_s390_sie_block sie_block;
355 	struct mcck_volatile_info mcck_info;	/* 0x0200 */
356 	__u8 reserved218[360];		/* 0x0218 */
357 	__u64 pv_grregs[16];		/* 0x0380 */
358 	__u8 reserved400[512];		/* 0x0400 */
359 	struct kvm_s390_itdb itdb;	/* 0x0600 */
360 	__u8 reserved700[2304];		/* 0x0700 */
361 };
362 
363 struct kvm_vcpu_stat {
364 	u64 exit_userspace;
365 	u64 exit_null;
366 	u64 exit_external_request;
367 	u64 exit_io_request;
368 	u64 exit_external_interrupt;
369 	u64 exit_stop_request;
370 	u64 exit_validity;
371 	u64 exit_instruction;
372 	u64 exit_pei;
373 	u64 halt_successful_poll;
374 	u64 halt_attempted_poll;
375 	u64 halt_poll_invalid;
376 	u64 halt_no_poll_steal;
377 	u64 halt_wakeup;
378 	u64 instruction_lctl;
379 	u64 instruction_lctlg;
380 	u64 instruction_stctl;
381 	u64 instruction_stctg;
382 	u64 exit_program_interruption;
383 	u64 exit_instr_and_program;
384 	u64 exit_operation_exception;
385 	u64 deliver_ckc;
386 	u64 deliver_cputm;
387 	u64 deliver_external_call;
388 	u64 deliver_emergency_signal;
389 	u64 deliver_service_signal;
390 	u64 deliver_virtio;
391 	u64 deliver_stop_signal;
392 	u64 deliver_prefix_signal;
393 	u64 deliver_restart_signal;
394 	u64 deliver_program;
395 	u64 deliver_io;
396 	u64 deliver_machine_check;
397 	u64 exit_wait_state;
398 	u64 inject_ckc;
399 	u64 inject_cputm;
400 	u64 inject_external_call;
401 	u64 inject_emergency_signal;
402 	u64 inject_mchk;
403 	u64 inject_pfault_init;
404 	u64 inject_program;
405 	u64 inject_restart;
406 	u64 inject_set_prefix;
407 	u64 inject_stop_signal;
408 	u64 instruction_epsw;
409 	u64 instruction_gs;
410 	u64 instruction_io_other;
411 	u64 instruction_lpsw;
412 	u64 instruction_lpswe;
413 	u64 instruction_pfmf;
414 	u64 instruction_ptff;
415 	u64 instruction_sck;
416 	u64 instruction_sckpf;
417 	u64 instruction_stidp;
418 	u64 instruction_spx;
419 	u64 instruction_stpx;
420 	u64 instruction_stap;
421 	u64 instruction_iske;
422 	u64 instruction_ri;
423 	u64 instruction_rrbe;
424 	u64 instruction_sske;
425 	u64 instruction_ipte_interlock;
426 	u64 instruction_stsi;
427 	u64 instruction_stfl;
428 	u64 instruction_tb;
429 	u64 instruction_tpi;
430 	u64 instruction_tprot;
431 	u64 instruction_tsch;
432 	u64 instruction_sie;
433 	u64 instruction_essa;
434 	u64 instruction_sthyi;
435 	u64 instruction_sigp_sense;
436 	u64 instruction_sigp_sense_running;
437 	u64 instruction_sigp_external_call;
438 	u64 instruction_sigp_emergency;
439 	u64 instruction_sigp_cond_emergency;
440 	u64 instruction_sigp_start;
441 	u64 instruction_sigp_stop;
442 	u64 instruction_sigp_stop_store_status;
443 	u64 instruction_sigp_store_status;
444 	u64 instruction_sigp_store_adtl_status;
445 	u64 instruction_sigp_arch;
446 	u64 instruction_sigp_prefix;
447 	u64 instruction_sigp_restart;
448 	u64 instruction_sigp_init_cpu_reset;
449 	u64 instruction_sigp_cpu_reset;
450 	u64 instruction_sigp_unknown;
451 	u64 diagnose_10;
452 	u64 diagnose_44;
453 	u64 diagnose_9c;
454 	u64 diagnose_9c_ignored;
455 	u64 diagnose_258;
456 	u64 diagnose_308;
457 	u64 diagnose_500;
458 	u64 diagnose_other;
459 };
460 
461 #define PGM_OPERATION			0x01
462 #define PGM_PRIVILEGED_OP		0x02
463 #define PGM_EXECUTE			0x03
464 #define PGM_PROTECTION			0x04
465 #define PGM_ADDRESSING			0x05
466 #define PGM_SPECIFICATION		0x06
467 #define PGM_DATA			0x07
468 #define PGM_FIXED_POINT_OVERFLOW	0x08
469 #define PGM_FIXED_POINT_DIVIDE		0x09
470 #define PGM_DECIMAL_OVERFLOW		0x0a
471 #define PGM_DECIMAL_DIVIDE		0x0b
472 #define PGM_HFP_EXPONENT_OVERFLOW	0x0c
473 #define PGM_HFP_EXPONENT_UNDERFLOW	0x0d
474 #define PGM_HFP_SIGNIFICANCE		0x0e
475 #define PGM_HFP_DIVIDE			0x0f
476 #define PGM_SEGMENT_TRANSLATION		0x10
477 #define PGM_PAGE_TRANSLATION		0x11
478 #define PGM_TRANSLATION_SPEC		0x12
479 #define PGM_SPECIAL_OPERATION		0x13
480 #define PGM_OPERAND			0x15
481 #define PGM_TRACE_TABEL			0x16
482 #define PGM_VECTOR_PROCESSING		0x1b
483 #define PGM_SPACE_SWITCH		0x1c
484 #define PGM_HFP_SQUARE_ROOT		0x1d
485 #define PGM_PC_TRANSLATION_SPEC		0x1f
486 #define PGM_AFX_TRANSLATION		0x20
487 #define PGM_ASX_TRANSLATION		0x21
488 #define PGM_LX_TRANSLATION		0x22
489 #define PGM_EX_TRANSLATION		0x23
490 #define PGM_PRIMARY_AUTHORITY		0x24
491 #define PGM_SECONDARY_AUTHORITY		0x25
492 #define PGM_LFX_TRANSLATION		0x26
493 #define PGM_LSX_TRANSLATION		0x27
494 #define PGM_ALET_SPECIFICATION		0x28
495 #define PGM_ALEN_TRANSLATION		0x29
496 #define PGM_ALE_SEQUENCE		0x2a
497 #define PGM_ASTE_VALIDITY		0x2b
498 #define PGM_ASTE_SEQUENCE		0x2c
499 #define PGM_EXTENDED_AUTHORITY		0x2d
500 #define PGM_LSTE_SEQUENCE		0x2e
501 #define PGM_ASTE_INSTANCE		0x2f
502 #define PGM_STACK_FULL			0x30
503 #define PGM_STACK_EMPTY			0x31
504 #define PGM_STACK_SPECIFICATION		0x32
505 #define PGM_STACK_TYPE			0x33
506 #define PGM_STACK_OPERATION		0x34
507 #define PGM_ASCE_TYPE			0x38
508 #define PGM_REGION_FIRST_TRANS		0x39
509 #define PGM_REGION_SECOND_TRANS		0x3a
510 #define PGM_REGION_THIRD_TRANS		0x3b
511 #define PGM_MONITOR			0x40
512 #define PGM_PER				0x80
513 #define PGM_CRYPTO_OPERATION		0x119
514 
515 /* irq types in ascend order of priorities */
516 enum irq_types {
517 	IRQ_PEND_SET_PREFIX = 0,
518 	IRQ_PEND_RESTART,
519 	IRQ_PEND_SIGP_STOP,
520 	IRQ_PEND_IO_ISC_7,
521 	IRQ_PEND_IO_ISC_6,
522 	IRQ_PEND_IO_ISC_5,
523 	IRQ_PEND_IO_ISC_4,
524 	IRQ_PEND_IO_ISC_3,
525 	IRQ_PEND_IO_ISC_2,
526 	IRQ_PEND_IO_ISC_1,
527 	IRQ_PEND_IO_ISC_0,
528 	IRQ_PEND_VIRTIO,
529 	IRQ_PEND_PFAULT_DONE,
530 	IRQ_PEND_PFAULT_INIT,
531 	IRQ_PEND_EXT_HOST,
532 	IRQ_PEND_EXT_SERVICE,
533 	IRQ_PEND_EXT_SERVICE_EV,
534 	IRQ_PEND_EXT_TIMING,
535 	IRQ_PEND_EXT_CPU_TIMER,
536 	IRQ_PEND_EXT_CLOCK_COMP,
537 	IRQ_PEND_EXT_EXTERNAL,
538 	IRQ_PEND_EXT_EMERGENCY,
539 	IRQ_PEND_EXT_MALFUNC,
540 	IRQ_PEND_EXT_IRQ_KEY,
541 	IRQ_PEND_MCHK_REP,
542 	IRQ_PEND_PROG,
543 	IRQ_PEND_SVC,
544 	IRQ_PEND_MCHK_EX,
545 	IRQ_PEND_COUNT
546 };
547 
548 /* We have 2M for virtio device descriptor pages. Smallest amount of
549  * memory per page is 24 bytes (1 queue), so (2048*1024) / 24 = 87381
550  */
551 #define KVM_S390_MAX_VIRTIO_IRQS 87381
552 
553 /*
554  * Repressible (non-floating) machine check interrupts
555  * subclass bits in MCIC
556  */
557 #define MCHK_EXTD_BIT 58
558 #define MCHK_DEGR_BIT 56
559 #define MCHK_WARN_BIT 55
560 #define MCHK_REP_MASK ((1UL << MCHK_DEGR_BIT) | \
561 		       (1UL << MCHK_EXTD_BIT) | \
562 		       (1UL << MCHK_WARN_BIT))
563 
564 /* Exigent machine check interrupts subclass bits in MCIC */
565 #define MCHK_SD_BIT 63
566 #define MCHK_PD_BIT 62
567 #define MCHK_EX_MASK ((1UL << MCHK_SD_BIT) | (1UL << MCHK_PD_BIT))
568 
569 #define IRQ_PEND_EXT_MASK ((1UL << IRQ_PEND_EXT_IRQ_KEY)    | \
570 			   (1UL << IRQ_PEND_EXT_CLOCK_COMP) | \
571 			   (1UL << IRQ_PEND_EXT_CPU_TIMER)  | \
572 			   (1UL << IRQ_PEND_EXT_MALFUNC)    | \
573 			   (1UL << IRQ_PEND_EXT_EMERGENCY)  | \
574 			   (1UL << IRQ_PEND_EXT_EXTERNAL)   | \
575 			   (1UL << IRQ_PEND_EXT_TIMING)     | \
576 			   (1UL << IRQ_PEND_EXT_HOST)       | \
577 			   (1UL << IRQ_PEND_EXT_SERVICE)    | \
578 			   (1UL << IRQ_PEND_EXT_SERVICE_EV) | \
579 			   (1UL << IRQ_PEND_VIRTIO)         | \
580 			   (1UL << IRQ_PEND_PFAULT_INIT)    | \
581 			   (1UL << IRQ_PEND_PFAULT_DONE))
582 
583 #define IRQ_PEND_IO_MASK ((1UL << IRQ_PEND_IO_ISC_0) | \
584 			  (1UL << IRQ_PEND_IO_ISC_1) | \
585 			  (1UL << IRQ_PEND_IO_ISC_2) | \
586 			  (1UL << IRQ_PEND_IO_ISC_3) | \
587 			  (1UL << IRQ_PEND_IO_ISC_4) | \
588 			  (1UL << IRQ_PEND_IO_ISC_5) | \
589 			  (1UL << IRQ_PEND_IO_ISC_6) | \
590 			  (1UL << IRQ_PEND_IO_ISC_7))
591 
592 #define IRQ_PEND_MCHK_MASK ((1UL << IRQ_PEND_MCHK_REP) | \
593 			    (1UL << IRQ_PEND_MCHK_EX))
594 
595 #define IRQ_PEND_EXT_II_MASK ((1UL << IRQ_PEND_EXT_CPU_TIMER)  | \
596 			      (1UL << IRQ_PEND_EXT_CLOCK_COMP) | \
597 			      (1UL << IRQ_PEND_EXT_EMERGENCY)  | \
598 			      (1UL << IRQ_PEND_EXT_EXTERNAL)   | \
599 			      (1UL << IRQ_PEND_EXT_SERVICE)    | \
600 			      (1UL << IRQ_PEND_EXT_SERVICE_EV))
601 
602 struct kvm_s390_interrupt_info {
603 	struct list_head list;
604 	u64	type;
605 	union {
606 		struct kvm_s390_io_info io;
607 		struct kvm_s390_ext_info ext;
608 		struct kvm_s390_pgm_info pgm;
609 		struct kvm_s390_emerg_info emerg;
610 		struct kvm_s390_extcall_info extcall;
611 		struct kvm_s390_prefix_info prefix;
612 		struct kvm_s390_stop_info stop;
613 		struct kvm_s390_mchk_info mchk;
614 	};
615 };
616 
617 struct kvm_s390_irq_payload {
618 	struct kvm_s390_io_info io;
619 	struct kvm_s390_ext_info ext;
620 	struct kvm_s390_pgm_info pgm;
621 	struct kvm_s390_emerg_info emerg;
622 	struct kvm_s390_extcall_info extcall;
623 	struct kvm_s390_prefix_info prefix;
624 	struct kvm_s390_stop_info stop;
625 	struct kvm_s390_mchk_info mchk;
626 };
627 
628 struct kvm_s390_local_interrupt {
629 	spinlock_t lock;
630 	DECLARE_BITMAP(sigp_emerg_pending, KVM_MAX_VCPUS);
631 	struct kvm_s390_irq_payload irq;
632 	unsigned long pending_irqs;
633 };
634 
635 #define FIRQ_LIST_IO_ISC_0 0
636 #define FIRQ_LIST_IO_ISC_1 1
637 #define FIRQ_LIST_IO_ISC_2 2
638 #define FIRQ_LIST_IO_ISC_3 3
639 #define FIRQ_LIST_IO_ISC_4 4
640 #define FIRQ_LIST_IO_ISC_5 5
641 #define FIRQ_LIST_IO_ISC_6 6
642 #define FIRQ_LIST_IO_ISC_7 7
643 #define FIRQ_LIST_PFAULT   8
644 #define FIRQ_LIST_VIRTIO   9
645 #define FIRQ_LIST_COUNT   10
646 #define FIRQ_CNTR_IO       0
647 #define FIRQ_CNTR_SERVICE  1
648 #define FIRQ_CNTR_VIRTIO   2
649 #define FIRQ_CNTR_PFAULT   3
650 #define FIRQ_MAX_COUNT     4
651 
652 /* mask the AIS mode for a given ISC */
653 #define AIS_MODE_MASK(isc) (0x80 >> isc)
654 
655 #define KVM_S390_AIS_MODE_ALL    0
656 #define KVM_S390_AIS_MODE_SINGLE 1
657 
658 struct kvm_s390_float_interrupt {
659 	unsigned long pending_irqs;
660 	unsigned long masked_irqs;
661 	spinlock_t lock;
662 	struct list_head lists[FIRQ_LIST_COUNT];
663 	int counters[FIRQ_MAX_COUNT];
664 	struct kvm_s390_mchk_info mchk;
665 	struct kvm_s390_ext_info srv_signal;
666 	int next_rr_cpu;
667 	struct mutex ais_lock;
668 	u8 simm;
669 	u8 nimm;
670 };
671 
672 struct kvm_hw_wp_info_arch {
673 	unsigned long addr;
674 	unsigned long phys_addr;
675 	int len;
676 	char *old_data;
677 };
678 
679 struct kvm_hw_bp_info_arch {
680 	unsigned long addr;
681 	int len;
682 };
683 
684 /*
685  * Only the upper 16 bits of kvm_guest_debug->control are arch specific.
686  * Further KVM_GUESTDBG flags which an be used from userspace can be found in
687  * arch/s390/include/uapi/asm/kvm.h
688  */
689 #define KVM_GUESTDBG_EXIT_PENDING 0x10000000
690 
691 #define guestdbg_enabled(vcpu) \
692 		(vcpu->guest_debug & KVM_GUESTDBG_ENABLE)
693 #define guestdbg_sstep_enabled(vcpu) \
694 		(vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
695 #define guestdbg_hw_bp_enabled(vcpu) \
696 		(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
697 #define guestdbg_exit_pending(vcpu) (guestdbg_enabled(vcpu) && \
698 		(vcpu->guest_debug & KVM_GUESTDBG_EXIT_PENDING))
699 
700 struct kvm_guestdbg_info_arch {
701 	unsigned long cr0;
702 	unsigned long cr9;
703 	unsigned long cr10;
704 	unsigned long cr11;
705 	struct kvm_hw_bp_info_arch *hw_bp_info;
706 	struct kvm_hw_wp_info_arch *hw_wp_info;
707 	int nr_hw_bp;
708 	int nr_hw_wp;
709 	unsigned long last_bp;
710 };
711 
712 struct kvm_s390_pv_vcpu {
713 	u64 handle;
714 	unsigned long stor_base;
715 };
716 
717 struct kvm_vcpu_arch {
718 	struct kvm_s390_sie_block *sie_block;
719 	/* if vsie is active, currently executed shadow sie control block */
720 	struct kvm_s390_sie_block *vsie_block;
721 	unsigned int      host_acrs[NUM_ACRS];
722 	struct gs_cb      *host_gscb;
723 	struct fpu	  host_fpregs;
724 	struct kvm_s390_local_interrupt local_int;
725 	struct hrtimer    ckc_timer;
726 	struct kvm_s390_pgm_info pgm;
727 	struct gmap *gmap;
728 	/* backup location for the currently enabled gmap when scheduled out */
729 	struct gmap *enabled_gmap;
730 	struct kvm_guestdbg_info_arch guestdbg;
731 	unsigned long pfault_token;
732 	unsigned long pfault_select;
733 	unsigned long pfault_compare;
734 	bool cputm_enabled;
735 	/*
736 	 * The seqcount protects updates to cputm_start and sie_block.cputm,
737 	 * this way we can have non-blocking reads with consistent values.
738 	 * Only the owning VCPU thread (vcpu->cpu) is allowed to change these
739 	 * values and to start/stop/enable/disable cpu timer accounting.
740 	 */
741 	seqcount_t cputm_seqcount;
742 	__u64 cputm_start;
743 	bool gs_enabled;
744 	bool skey_enabled;
745 	struct kvm_s390_pv_vcpu pv;
746 };
747 
748 struct kvm_vm_stat {
749 	u64 inject_io;
750 	u64 inject_float_mchk;
751 	u64 inject_pfault_done;
752 	u64 inject_service_signal;
753 	u64 inject_virtio;
754 	u64 remote_tlb_flush;
755 };
756 
757 struct kvm_arch_memory_slot {
758 };
759 
760 struct s390_map_info {
761 	struct list_head list;
762 	__u64 guest_addr;
763 	__u64 addr;
764 	struct page *page;
765 };
766 
767 struct s390_io_adapter {
768 	unsigned int id;
769 	int isc;
770 	bool maskable;
771 	bool masked;
772 	bool swap;
773 	bool suppressible;
774 };
775 
776 #define MAX_S390_IO_ADAPTERS ((MAX_ISC + 1) * 8)
777 #define MAX_S390_ADAPTER_MAPS 256
778 
779 /* maximum size of facilities and facility mask is 2k bytes */
780 #define S390_ARCH_FAC_LIST_SIZE_BYTE (1<<11)
781 #define S390_ARCH_FAC_LIST_SIZE_U64 \
782 	(S390_ARCH_FAC_LIST_SIZE_BYTE / sizeof(u64))
783 #define S390_ARCH_FAC_MASK_SIZE_BYTE S390_ARCH_FAC_LIST_SIZE_BYTE
784 #define S390_ARCH_FAC_MASK_SIZE_U64 \
785 	(S390_ARCH_FAC_MASK_SIZE_BYTE / sizeof(u64))
786 
787 struct kvm_s390_cpu_model {
788 	/* facility mask supported by kvm & hosting machine */
789 	__u64 fac_mask[S390_ARCH_FAC_LIST_SIZE_U64];
790 	struct kvm_s390_vm_cpu_subfunc subfuncs;
791 	/* facility list requested by guest (in dma page) */
792 	__u64 *fac_list;
793 	u64 cpuid;
794 	unsigned short ibc;
795 };
796 
797 struct kvm_s390_module_hook {
798 	int (*hook)(struct kvm_vcpu *vcpu);
799 	struct module *owner;
800 };
801 
802 struct kvm_s390_crypto {
803 	struct kvm_s390_crypto_cb *crycb;
804 	struct kvm_s390_module_hook *pqap_hook;
805 	__u32 crycbd;
806 	__u8 aes_kw;
807 	__u8 dea_kw;
808 	__u8 apie;
809 };
810 
811 #define APCB0_MASK_SIZE 1
812 struct kvm_s390_apcb0 {
813 	__u64 apm[APCB0_MASK_SIZE];		/* 0x0000 */
814 	__u64 aqm[APCB0_MASK_SIZE];		/* 0x0008 */
815 	__u64 adm[APCB0_MASK_SIZE];		/* 0x0010 */
816 	__u64 reserved18;			/* 0x0018 */
817 };
818 
819 #define APCB1_MASK_SIZE 4
820 struct kvm_s390_apcb1 {
821 	__u64 apm[APCB1_MASK_SIZE];		/* 0x0000 */
822 	__u64 aqm[APCB1_MASK_SIZE];		/* 0x0020 */
823 	__u64 adm[APCB1_MASK_SIZE];		/* 0x0040 */
824 	__u64 reserved60[4];			/* 0x0060 */
825 };
826 
827 struct kvm_s390_crypto_cb {
828 	struct kvm_s390_apcb0 apcb0;		/* 0x0000 */
829 	__u8   reserved20[0x0048 - 0x0020];	/* 0x0020 */
830 	__u8   dea_wrapping_key_mask[24];	/* 0x0048 */
831 	__u8   aes_wrapping_key_mask[32];	/* 0x0060 */
832 	struct kvm_s390_apcb1 apcb1;		/* 0x0080 */
833 };
834 
835 struct kvm_s390_gisa {
836 	union {
837 		struct { /* common to all formats */
838 			u32 next_alert;
839 			u8  ipm;
840 			u8  reserved01[2];
841 			u8  iam;
842 		};
843 		struct { /* format 0 */
844 			u32 next_alert;
845 			u8  ipm;
846 			u8  reserved01;
847 			u8  : 6;
848 			u8  g : 1;
849 			u8  c : 1;
850 			u8  iam;
851 			u8  reserved02[4];
852 			u32 airq_count;
853 		} g0;
854 		struct { /* format 1 */
855 			u32 next_alert;
856 			u8  ipm;
857 			u8  simm;
858 			u8  nimm;
859 			u8  iam;
860 			u8  aism[8];
861 			u8  : 6;
862 			u8  g : 1;
863 			u8  c : 1;
864 			u8  reserved03[11];
865 			u32 airq_count;
866 		} g1;
867 		struct {
868 			u64 word[4];
869 		} u64;
870 	};
871 };
872 
873 struct kvm_s390_gib {
874 	u32 alert_list_origin;
875 	u32 reserved01;
876 	u8:5;
877 	u8  nisc:3;
878 	u8  reserved03[3];
879 	u32 reserved04[5];
880 };
881 
882 /*
883  * sie_page2 has to be allocated as DMA because fac_list, crycb and
884  * gisa need 31bit addresses in the sie control block.
885  */
886 struct sie_page2 {
887 	__u64 fac_list[S390_ARCH_FAC_LIST_SIZE_U64];	/* 0x0000 */
888 	struct kvm_s390_crypto_cb crycb;		/* 0x0800 */
889 	struct kvm_s390_gisa gisa;			/* 0x0900 */
890 	struct kvm *kvm;				/* 0x0920 */
891 	u8 reserved928[0x1000 - 0x928];			/* 0x0928 */
892 };
893 
894 struct kvm_s390_vsie {
895 	struct mutex mutex;
896 	struct radix_tree_root addr_to_page;
897 	int page_count;
898 	int next;
899 	struct page *pages[KVM_MAX_VCPUS];
900 };
901 
902 struct kvm_s390_gisa_iam {
903 	u8 mask;
904 	spinlock_t ref_lock;
905 	u32 ref_count[MAX_ISC + 1];
906 };
907 
908 struct kvm_s390_gisa_interrupt {
909 	struct kvm_s390_gisa *origin;
910 	struct kvm_s390_gisa_iam alert;
911 	struct hrtimer timer;
912 	u64 expires;
913 	DECLARE_BITMAP(kicked_mask, KVM_MAX_VCPUS);
914 };
915 
916 struct kvm_s390_pv {
917 	u64 handle;
918 	u64 guest_len;
919 	unsigned long stor_base;
920 	void *stor_var;
921 };
922 
923 struct kvm_arch{
924 	void *sca;
925 	int use_esca;
926 	rwlock_t sca_lock;
927 	debug_info_t *dbf;
928 	struct kvm_s390_float_interrupt float_int;
929 	struct kvm_device *flic;
930 	struct gmap *gmap;
931 	unsigned long mem_limit;
932 	int css_support;
933 	int use_irqchip;
934 	int use_cmma;
935 	int use_pfmfi;
936 	int use_skf;
937 	int user_cpu_state_ctrl;
938 	int user_sigp;
939 	int user_stsi;
940 	int user_instr0;
941 	struct s390_io_adapter *adapters[MAX_S390_IO_ADAPTERS];
942 	wait_queue_head_t ipte_wq;
943 	int ipte_lock_count;
944 	struct mutex ipte_mutex;
945 	spinlock_t start_stop_lock;
946 	struct sie_page2 *sie_page2;
947 	struct kvm_s390_cpu_model model;
948 	struct kvm_s390_crypto crypto;
949 	struct kvm_s390_vsie vsie;
950 	u8 epdx;
951 	u64 epoch;
952 	int migration_mode;
953 	atomic64_t cmma_dirty_pages;
954 	/* subset of available cpu features enabled by user space */
955 	DECLARE_BITMAP(cpu_feat, KVM_S390_VM_CPU_FEAT_NR_BITS);
956 	DECLARE_BITMAP(idle_mask, KVM_MAX_VCPUS);
957 	struct kvm_s390_gisa_interrupt gisa_int;
958 	struct kvm_s390_pv pv;
959 };
960 
961 #define KVM_HVA_ERR_BAD		(-1UL)
962 #define KVM_HVA_ERR_RO_BAD	(-2UL)
963 
964 static inline bool kvm_is_error_hva(unsigned long addr)
965 {
966 	return IS_ERR_VALUE(addr);
967 }
968 
969 #define ASYNC_PF_PER_VCPU	64
970 struct kvm_arch_async_pf {
971 	unsigned long pfault_token;
972 };
973 
974 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
975 
976 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
977 			       struct kvm_async_pf *work);
978 
979 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
980 				     struct kvm_async_pf *work);
981 
982 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
983 				 struct kvm_async_pf *work);
984 
985 void kvm_arch_crypto_clear_masks(struct kvm *kvm);
986 void kvm_arch_crypto_set_masks(struct kvm *kvm, unsigned long *apm,
987 			       unsigned long *aqm, unsigned long *adm);
988 
989 extern int sie64a(struct kvm_s390_sie_block *, u64 *);
990 extern char sie_exit;
991 
992 extern int kvm_s390_gisc_register(struct kvm *kvm, u32 gisc);
993 extern int kvm_s390_gisc_unregister(struct kvm *kvm, u32 gisc);
994 
995 static inline void kvm_arch_hardware_disable(void) {}
996 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
997 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
998 static inline void kvm_arch_free_memslot(struct kvm *kvm,
999 					 struct kvm_memory_slot *slot) {}
1000 static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
1001 static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
1002 static inline void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
1003 		struct kvm_memory_slot *slot) {}
1004 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
1005 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
1006 
1007 void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu);
1008 
1009 #endif
1010