1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * CPU-measurement facilities 4 * 5 * Copyright IBM Corp. 2012 6 * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com> 7 * Jan Glauber <jang@linux.vnet.ibm.com> 8 */ 9 #ifndef _ASM_S390_CPU_MF_H 10 #define _ASM_S390_CPU_MF_H 11 12 #include <linux/errno.h> 13 #include <asm/facility.h> 14 15 #define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */ 16 #define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */ 17 #define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */ 18 #define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */ 19 #define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */ 20 #define CPU_MF_INT_CF_MTDA (1 << 15) /* loss of MT ctr. data alert */ 21 #define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */ 22 #define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */ 23 #define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \ 24 CPU_MF_INT_CF_LCDA) 25 #define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \ 26 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \ 27 CPU_MF_INT_SF_LSDA) 28 29 /* CPU measurement facility support */ 30 static inline int cpum_cf_avail(void) 31 { 32 return test_facility(40) && test_facility(67); 33 } 34 35 static inline int cpum_sf_avail(void) 36 { 37 return test_facility(40) && test_facility(68); 38 } 39 40 41 struct cpumf_ctr_info { 42 u16 cfvn; 43 u16 auth_ctl; 44 u16 enable_ctl; 45 u16 act_ctl; 46 u16 max_cpu; 47 u16 csvn; 48 u16 max_cg; 49 u16 reserved1; 50 u32 reserved2[12]; 51 } __packed; 52 53 /* QUERY SAMPLING INFORMATION block */ 54 struct hws_qsi_info_block { /* Bit(s) */ 55 unsigned int b0_13:14; /* 0-13: zeros */ 56 unsigned int as:1; /* 14: basic-sampling authorization */ 57 unsigned int ad:1; /* 15: diag-sampling authorization */ 58 unsigned int b16_21:6; /* 16-21: zeros */ 59 unsigned int es:1; /* 22: basic-sampling enable control */ 60 unsigned int ed:1; /* 23: diag-sampling enable control */ 61 unsigned int b24_29:6; /* 24-29: zeros */ 62 unsigned int cs:1; /* 30: basic-sampling activation control */ 63 unsigned int cd:1; /* 31: diag-sampling activation control */ 64 unsigned int bsdes:16; /* 4-5: size of basic sampling entry */ 65 unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */ 66 unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */ 67 unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/ 68 unsigned long tear; /* 24-31: TEAR contents */ 69 unsigned long dear; /* 32-39: DEAR contents */ 70 unsigned int rsvrd0; /* 40-43: reserved */ 71 unsigned int cpu_speed; /* 44-47: CPU speed */ 72 unsigned long long rsvrd1; /* 48-55: reserved */ 73 unsigned long long rsvrd2; /* 56-63: reserved */ 74 } __packed; 75 76 /* SET SAMPLING CONTROLS request block */ 77 struct hws_lsctl_request_block { 78 unsigned int s:1; /* 0: maximum buffer indicator */ 79 unsigned int h:1; /* 1: part. level reserved for VM use*/ 80 unsigned long long b2_53:52;/* 2-53: zeros */ 81 unsigned int es:1; /* 54: basic-sampling enable control */ 82 unsigned int ed:1; /* 55: diag-sampling enable control */ 83 unsigned int b56_61:6; /* 56-61: - zeros */ 84 unsigned int cs:1; /* 62: basic-sampling activation control */ 85 unsigned int cd:1; /* 63: diag-sampling activation control */ 86 unsigned long interval; /* 8-15: sampling interval */ 87 unsigned long tear; /* 16-23: TEAR contents */ 88 unsigned long dear; /* 24-31: DEAR contents */ 89 /* 32-63: */ 90 unsigned long rsvrd1; /* reserved */ 91 unsigned long rsvrd2; /* reserved */ 92 unsigned long rsvrd3; /* reserved */ 93 unsigned long rsvrd4; /* reserved */ 94 } __packed; 95 96 struct hws_basic_entry { 97 unsigned int def:16; /* 0-15 Data Entry Format */ 98 unsigned int R:4; /* 16-19 reserved */ 99 unsigned int U:4; /* 20-23 Number of unique instruct. */ 100 unsigned int z:2; /* zeros */ 101 unsigned int T:1; /* 26 PSW DAT mode */ 102 unsigned int W:1; /* 27 PSW wait state */ 103 unsigned int P:1; /* 28 PSW Problem state */ 104 unsigned int AS:2; /* 29-30 PSW address-space control */ 105 unsigned int I:1; /* 31 entry valid or invalid */ 106 unsigned int CL:2; /* 32-33 Configuration Level */ 107 unsigned int:14; 108 unsigned int prim_asn:16; /* primary ASN */ 109 unsigned long long ia; /* Instruction Address */ 110 unsigned long long gpp; /* Guest Program Parameter */ 111 unsigned long long hpp; /* Host Program Parameter */ 112 } __packed; 113 114 struct hws_diag_entry { 115 unsigned int def:16; /* 0-15 Data Entry Format */ 116 unsigned int R:14; /* 16-19 and 20-30 reserved */ 117 unsigned int I:1; /* 31 entry valid or invalid */ 118 u8 data[]; /* Machine-dependent sample data */ 119 } __packed; 120 121 struct hws_combined_entry { 122 struct hws_basic_entry basic; /* Basic-sampling data entry */ 123 struct hws_diag_entry diag; /* Diagnostic-sampling data entry */ 124 } __packed; 125 126 struct hws_trailer_entry { 127 union { 128 struct { 129 unsigned int f:1; /* 0 - Block Full Indicator */ 130 unsigned int a:1; /* 1 - Alert request control */ 131 unsigned int t:1; /* 2 - Timestamp format */ 132 unsigned long long:61; /* 3 - 63: Reserved */ 133 }; 134 unsigned long long flags; /* 0 - 63: All indicators */ 135 }; 136 unsigned long long overflow; /* 64 - sample Overflow count */ 137 unsigned char timestamp[16]; /* 16 - 31 timestamp */ 138 unsigned long long reserved1; /* 32 -Reserved */ 139 unsigned long long reserved2; /* */ 140 unsigned long long progusage1; /* 48 - reserved for programming use */ 141 unsigned long long progusage2; /* */ 142 } __packed; 143 144 /* Load program parameter */ 145 static inline void lpp(void *pp) 146 { 147 asm volatile(".insn s,0xb2800000,0(%0)\n":: "a" (pp) : "memory"); 148 } 149 150 /* Query counter information */ 151 static inline int qctri(struct cpumf_ctr_info *info) 152 { 153 int rc = -EINVAL; 154 155 asm volatile ( 156 "0: .insn s,0xb28e0000,%1\n" 157 "1: lhi %0,0\n" 158 "2:\n" 159 EX_TABLE(1b, 2b) 160 : "+d" (rc), "=Q" (*info)); 161 return rc; 162 } 163 164 /* Load CPU-counter-set controls */ 165 static inline int lcctl(u64 ctl) 166 { 167 int cc; 168 169 asm volatile ( 170 " .insn s,0xb2840000,%1\n" 171 " ipm %0\n" 172 " srl %0,28\n" 173 : "=d" (cc) : "Q" (ctl) : "cc"); 174 return cc; 175 } 176 177 /* Extract CPU counter */ 178 static inline int __ecctr(u64 ctr, u64 *content) 179 { 180 u64 _content; 181 int cc; 182 183 asm volatile ( 184 " .insn rre,0xb2e40000,%0,%2\n" 185 " ipm %1\n" 186 " srl %1,28\n" 187 : "=d" (_content), "=d" (cc) : "d" (ctr) : "cc"); 188 *content = _content; 189 return cc; 190 } 191 192 /* Extract CPU counter */ 193 static inline int ecctr(u64 ctr, u64 *val) 194 { 195 u64 content; 196 int cc; 197 198 cc = __ecctr(ctr, &content); 199 if (!cc) 200 *val = content; 201 return cc; 202 } 203 204 /* Store CPU counter multiple for the MT utilization counter set */ 205 static inline int stcctm5(u64 num, u64 *val) 206 { 207 int cc; 208 209 asm volatile ( 210 " .insn rsy,0xeb0000000017,%2,5,%1\n" 211 " ipm %0\n" 212 " srl %0,28\n" 213 : "=d" (cc) 214 : "Q" (*val), "d" (num) 215 : "cc", "memory"); 216 return cc; 217 } 218 219 /* Query sampling information */ 220 static inline int qsi(struct hws_qsi_info_block *info) 221 { 222 int cc = 1; 223 224 asm volatile( 225 "0: .insn s,0xb2860000,%1\n" 226 "1: lhi %0,0\n" 227 "2:\n" 228 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) 229 : "+d" (cc), "+Q" (*info)); 230 return cc ? -EINVAL : 0; 231 } 232 233 /* Load sampling controls */ 234 static inline int lsctl(struct hws_lsctl_request_block *req) 235 { 236 int cc; 237 238 cc = 1; 239 asm volatile( 240 "0: .insn s,0xb2870000,0(%1)\n" 241 "1: ipm %0\n" 242 " srl %0,28\n" 243 "2:\n" 244 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) 245 : "+d" (cc), "+a" (req) 246 : "m" (*req) 247 : "cc", "memory"); 248 249 return cc ? -EINVAL : 0; 250 } 251 252 /* Sampling control helper functions */ 253 254 #include <linux/time.h> 255 256 static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi, 257 unsigned long freq) 258 { 259 return (USEC_PER_SEC / freq) * qsi->cpu_speed; 260 } 261 262 static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi, 263 unsigned long rate) 264 { 265 return USEC_PER_SEC * qsi->cpu_speed / rate; 266 } 267 268 #define SDB_TE_ALERT_REQ_MASK 0x4000000000000000UL 269 #define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL 270 271 /* Return TOD timestamp contained in an trailer entry */ 272 static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te) 273 { 274 /* TOD in STCKE format */ 275 if (te->t) 276 return *((unsigned long long *) &te->timestamp[1]); 277 278 /* TOD in STCK format */ 279 return *((unsigned long long *) &te->timestamp[0]); 280 } 281 282 /* Return pointer to trailer entry of an sample data block */ 283 static inline unsigned long *trailer_entry_ptr(unsigned long v) 284 { 285 void *ret; 286 287 ret = (void *) v; 288 ret += PAGE_SIZE; 289 ret -= sizeof(struct hws_trailer_entry); 290 291 return (unsigned long *) ret; 292 } 293 294 /* Return if the entry in the sample data block table (sdbt) 295 * is a link to the next sdbt */ 296 static inline int is_link_entry(unsigned long *s) 297 { 298 return *s & 0x1ul ? 1 : 0; 299 } 300 301 /* Return pointer to the linked sdbt */ 302 static inline unsigned long *get_next_sdbt(unsigned long *s) 303 { 304 return (unsigned long *) (*s & ~0x1ul); 305 } 306 #endif /* _ASM_S390_CPU_MF_H */ 307