1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * CPU-measurement facilities 4 * 5 * Copyright IBM Corp. 2012, 2018 6 * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com> 7 * Jan Glauber <jang@linux.vnet.ibm.com> 8 */ 9 #ifndef _ASM_S390_CPU_MF_H 10 #define _ASM_S390_CPU_MF_H 11 12 #include <linux/errno.h> 13 #include <asm/facility.h> 14 15 asm(".include \"asm/cpu_mf-insn.h\"\n"); 16 17 #define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */ 18 #define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */ 19 #define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */ 20 #define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */ 21 #define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */ 22 #define CPU_MF_INT_CF_MTDA (1 << 15) /* loss of MT ctr. data alert */ 23 #define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */ 24 #define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */ 25 #define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \ 26 CPU_MF_INT_CF_LCDA) 27 #define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \ 28 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \ 29 CPU_MF_INT_SF_LSDA) 30 31 /* CPU measurement facility support */ 32 static inline int cpum_cf_avail(void) 33 { 34 return test_facility(40) && test_facility(67); 35 } 36 37 static inline int cpum_sf_avail(void) 38 { 39 return test_facility(40) && test_facility(68); 40 } 41 42 43 struct cpumf_ctr_info { 44 u16 cfvn; 45 u16 auth_ctl; 46 u16 enable_ctl; 47 u16 act_ctl; 48 u16 max_cpu; 49 u16 csvn; 50 u16 max_cg; 51 u16 reserved1; 52 u32 reserved2[12]; 53 } __packed; 54 55 /* QUERY SAMPLING INFORMATION block */ 56 struct hws_qsi_info_block { /* Bit(s) */ 57 unsigned int b0_13:14; /* 0-13: zeros */ 58 unsigned int as:1; /* 14: basic-sampling authorization */ 59 unsigned int ad:1; /* 15: diag-sampling authorization */ 60 unsigned int b16_21:6; /* 16-21: zeros */ 61 unsigned int es:1; /* 22: basic-sampling enable control */ 62 unsigned int ed:1; /* 23: diag-sampling enable control */ 63 unsigned int b24_29:6; /* 24-29: zeros */ 64 unsigned int cs:1; /* 30: basic-sampling activation control */ 65 unsigned int cd:1; /* 31: diag-sampling activation control */ 66 unsigned int bsdes:16; /* 4-5: size of basic sampling entry */ 67 unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */ 68 unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */ 69 unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/ 70 unsigned long tear; /* 24-31: TEAR contents */ 71 unsigned long dear; /* 32-39: DEAR contents */ 72 unsigned int rsvrd0; /* 40-43: reserved */ 73 unsigned int cpu_speed; /* 44-47: CPU speed */ 74 unsigned long long rsvrd1; /* 48-55: reserved */ 75 unsigned long long rsvrd2; /* 56-63: reserved */ 76 } __packed; 77 78 /* SET SAMPLING CONTROLS request block */ 79 struct hws_lsctl_request_block { 80 unsigned int s:1; /* 0: maximum buffer indicator */ 81 unsigned int h:1; /* 1: part. level reserved for VM use*/ 82 unsigned long long b2_53:52;/* 2-53: zeros */ 83 unsigned int es:1; /* 54: basic-sampling enable control */ 84 unsigned int ed:1; /* 55: diag-sampling enable control */ 85 unsigned int b56_61:6; /* 56-61: - zeros */ 86 unsigned int cs:1; /* 62: basic-sampling activation control */ 87 unsigned int cd:1; /* 63: diag-sampling activation control */ 88 unsigned long interval; /* 8-15: sampling interval */ 89 unsigned long tear; /* 16-23: TEAR contents */ 90 unsigned long dear; /* 24-31: DEAR contents */ 91 /* 32-63: */ 92 unsigned long rsvrd1; /* reserved */ 93 unsigned long rsvrd2; /* reserved */ 94 unsigned long rsvrd3; /* reserved */ 95 unsigned long rsvrd4; /* reserved */ 96 } __packed; 97 98 struct hws_basic_entry { 99 unsigned int def:16; /* 0-15 Data Entry Format */ 100 unsigned int R:4; /* 16-19 reserved */ 101 unsigned int U:4; /* 20-23 Number of unique instruct. */ 102 unsigned int z:2; /* zeros */ 103 unsigned int T:1; /* 26 PSW DAT mode */ 104 unsigned int W:1; /* 27 PSW wait state */ 105 unsigned int P:1; /* 28 PSW Problem state */ 106 unsigned int AS:2; /* 29-30 PSW address-space control */ 107 unsigned int I:1; /* 31 entry valid or invalid */ 108 unsigned int CL:2; /* 32-33 Configuration Level */ 109 unsigned int:14; 110 unsigned int prim_asn:16; /* primary ASN */ 111 unsigned long long ia; /* Instruction Address */ 112 unsigned long long gpp; /* Guest Program Parameter */ 113 unsigned long long hpp; /* Host Program Parameter */ 114 } __packed; 115 116 struct hws_diag_entry { 117 unsigned int def:16; /* 0-15 Data Entry Format */ 118 unsigned int R:15; /* 16-19 and 20-30 reserved */ 119 unsigned int I:1; /* 31 entry valid or invalid */ 120 u8 data[]; /* Machine-dependent sample data */ 121 } __packed; 122 123 struct hws_combined_entry { 124 struct hws_basic_entry basic; /* Basic-sampling data entry */ 125 struct hws_diag_entry diag; /* Diagnostic-sampling data entry */ 126 } __packed; 127 128 struct hws_trailer_entry { 129 union { 130 struct { 131 unsigned int f:1; /* 0 - Block Full Indicator */ 132 unsigned int a:1; /* 1 - Alert request control */ 133 unsigned int t:1; /* 2 - Timestamp format */ 134 unsigned int :29; /* 3 - 31: Reserved */ 135 unsigned int bsdes:16; /* 32-47: size of basic SDE */ 136 unsigned int dsdes:16; /* 48-63: size of diagnostic SDE */ 137 }; 138 unsigned long long flags; /* 0 - 63: All indicators */ 139 }; 140 unsigned long long overflow; /* 64 - sample Overflow count */ 141 unsigned char timestamp[16]; /* 16 - 31 timestamp */ 142 unsigned long long reserved1; /* 32 -Reserved */ 143 unsigned long long reserved2; /* */ 144 union { /* 48 - reserved for programming use */ 145 struct { 146 unsigned int clock_base:1; /* in progusage2 */ 147 unsigned long long progusage1:63; 148 unsigned long long progusage2; 149 }; 150 unsigned long long progusage[2]; 151 }; 152 } __packed; 153 154 /* Load program parameter */ 155 static inline void lpp(void *pp) 156 { 157 asm volatile(".insn s,0xb2800000,0(%0)\n":: "a" (pp) : "memory"); 158 } 159 160 /* Query counter information */ 161 static inline int qctri(struct cpumf_ctr_info *info) 162 { 163 int rc = -EINVAL; 164 165 asm volatile ( 166 "0: .insn s,0xb28e0000,%1\n" 167 "1: lhi %0,0\n" 168 "2:\n" 169 EX_TABLE(1b, 2b) 170 : "+d" (rc), "=Q" (*info)); 171 return rc; 172 } 173 174 /* Load CPU-counter-set controls */ 175 static inline int lcctl(u64 ctl) 176 { 177 int cc; 178 179 asm volatile ( 180 " .insn s,0xb2840000,%1\n" 181 " ipm %0\n" 182 " srl %0,28\n" 183 : "=d" (cc) : "Q" (ctl) : "cc"); 184 return cc; 185 } 186 187 /* Extract CPU counter */ 188 static inline int __ecctr(u64 ctr, u64 *content) 189 { 190 u64 _content; 191 int cc; 192 193 asm volatile ( 194 " .insn rre,0xb2e40000,%0,%2\n" 195 " ipm %1\n" 196 " srl %1,28\n" 197 : "=d" (_content), "=d" (cc) : "d" (ctr) : "cc"); 198 *content = _content; 199 return cc; 200 } 201 202 /* Extract CPU counter */ 203 static inline int ecctr(u64 ctr, u64 *val) 204 { 205 u64 content; 206 int cc; 207 208 cc = __ecctr(ctr, &content); 209 if (!cc) 210 *val = content; 211 return cc; 212 } 213 214 /* Store CPU counter multiple for a particular counter set */ 215 enum stcctm_ctr_set { 216 EXTENDED = 0, 217 BASIC = 1, 218 PROBLEM_STATE = 2, 219 CRYPTO_ACTIVITY = 3, 220 MT_DIAG = 5, 221 MT_DIAG_CLEARING = 9, /* clears loss-of-MT-ctr-data alert */ 222 }; 223 static inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest) 224 { 225 int cc; 226 227 asm volatile ( 228 " STCCTM %2,%3,%1\n" 229 " ipm %0\n" 230 " srl %0,28\n" 231 : "=d" (cc) 232 : "Q" (*dest), "d" (range), "i" (set) 233 : "cc", "memory"); 234 return cc; 235 } 236 237 /* Query sampling information */ 238 static inline int qsi(struct hws_qsi_info_block *info) 239 { 240 int cc = 1; 241 242 asm volatile( 243 "0: .insn s,0xb2860000,%1\n" 244 "1: lhi %0,0\n" 245 "2:\n" 246 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) 247 : "+d" (cc), "+Q" (*info)); 248 return cc ? -EINVAL : 0; 249 } 250 251 /* Load sampling controls */ 252 static inline int lsctl(struct hws_lsctl_request_block *req) 253 { 254 int cc; 255 256 cc = 1; 257 asm volatile( 258 "0: .insn s,0xb2870000,0(%1)\n" 259 "1: ipm %0\n" 260 " srl %0,28\n" 261 "2:\n" 262 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) 263 : "+d" (cc), "+a" (req) 264 : "m" (*req) 265 : "cc", "memory"); 266 267 return cc ? -EINVAL : 0; 268 } 269 270 /* Sampling control helper functions */ 271 272 #include <linux/time.h> 273 274 static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi, 275 unsigned long freq) 276 { 277 return (USEC_PER_SEC / freq) * qsi->cpu_speed; 278 } 279 280 static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi, 281 unsigned long rate) 282 { 283 return USEC_PER_SEC * qsi->cpu_speed / rate; 284 } 285 286 #define SDB_TE_ALERT_REQ_MASK 0x4000000000000000UL 287 #define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL 288 289 /* Return TOD timestamp contained in an trailer entry */ 290 static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te) 291 { 292 /* TOD in STCKE format */ 293 if (te->t) 294 return *((unsigned long long *) &te->timestamp[1]); 295 296 /* TOD in STCK format */ 297 return *((unsigned long long *) &te->timestamp[0]); 298 } 299 300 /* Return pointer to trailer entry of an sample data block */ 301 static inline unsigned long *trailer_entry_ptr(unsigned long v) 302 { 303 void *ret; 304 305 ret = (void *) v; 306 ret += PAGE_SIZE; 307 ret -= sizeof(struct hws_trailer_entry); 308 309 return (unsigned long *) ret; 310 } 311 312 /* Return if the entry in the sample data block table (sdbt) 313 * is a link to the next sdbt */ 314 static inline int is_link_entry(unsigned long *s) 315 { 316 return *s & 0x1ul ? 1 : 0; 317 } 318 319 /* Return pointer to the linked sdbt */ 320 static inline unsigned long *get_next_sdbt(unsigned long *s) 321 { 322 return (unsigned long *) (*s & ~0x1ul); 323 } 324 #endif /* _ASM_S390_CPU_MF_H */ 325