1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright IBM Corp. 1999, 2010 4 * 5 * Author(s): Hartmut Penner <hp@de.ibm.com> 6 * Martin Schwidefsky <schwidefsky@de.ibm.com> 7 * Rob van der Heij <rvdhei@iae.nl> 8 * Heiko Carstens <heiko.carstens@de.ibm.com> 9 * 10 * There are 5 different IPL methods 11 * 1) load the image directly into ram at address 0 and do an PSW restart 12 * 2) linload will load the image from address 0x10000 to memory 0x10000 13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated) 14 * 3) generate the tape ipl header, store the generated image on a tape 15 * and ipl from it 16 * In case of SL tape you need to IPL 5 times to get past VOL1 etc 17 * 4) generate the vm reader ipl header, move the generated image to the 18 * VM reader (use option NOH!) and do a ipl from reader (VM only) 19 * 5) direct call of start by the SALIPL loader 20 * We use the cpuid to distinguish between VM and native ipl 21 * params for kernel are pushed to 0x10400 (see setup.h) 22 * 23 */ 24 25#include <linux/init.h> 26#include <linux/linkage.h> 27#include <asm/asm-offsets.h> 28#include <asm/page.h> 29#include <asm/ptrace.h> 30#include <asm/sclp.h> 31 32#define ARCH_OFFSET 4 33 34__HEAD 35 36#define IPL_BS 0x730 37 .org 0 38 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded 39 .long 0x02000018,0x60000050 # by ipl to addresses 0-23. 40 .long 0x02000068,0x60000050 # (a PSW and two CCWs). 41 .fill 80-24,1,0x40 # bytes 24-79 are discarded !! 42 .long 0x020000f0,0x60000050 # The next 160 byte are loaded 43 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7 44 .long 0x02000190,0x60000050 # They form the continuation 45 .long 0x020001e0,0x60000050 # of the CCW program started 46 .long 0x02000230,0x60000050 # by ipl and load the range 47 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image 48 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730 49 .long 0x02000320,0x60000050 # in memory. At the end of 50 .long 0x02000370,0x60000050 # the channel program the PSW 51 .long 0x020003c0,0x60000050 # at location 0 is loaded. 52 .long 0x02000410,0x60000050 # Initial processing starts 53 .long 0x02000460,0x60000050 # at 0x200 = iplstart. 54 .long 0x020004b0,0x60000050 55 .long 0x02000500,0x60000050 56 .long 0x02000550,0x60000050 57 .long 0x020005a0,0x60000050 58 .long 0x020005f0,0x60000050 59 .long 0x02000640,0x60000050 60 .long 0x02000690,0x60000050 61 .long 0x020006e0,0x20000050 62 63 .org __LC_RST_NEW_PSW # 0x1a0 64 .quad 0,iplstart 65 .org __LC_EXT_NEW_PSW # 0x1b0 66 .quad 0x0002000180000000,0x1b0 # disabled wait 67 .org __LC_PGM_NEW_PSW # 0x1d0 68 .quad 0x0000000180000000,startup_pgm_check_handler 69 .org __LC_IO_NEW_PSW # 0x1f0 70 .quad 0x0002000180000000,0x1f0 # disabled wait 71 72 .org 0x200 73 74# 75# subroutine to wait for end I/O 76# 77.Lirqwait: 78 mvc __LC_IO_NEW_PSW(16),.Lnewpsw # set up IO interrupt psw 79 lpsw .Lwaitpsw 80.Lioint: 81 br %r14 82 .align 8 83.Lnewpsw: 84 .quad 0x0000000080000000,.Lioint 85.Lwaitpsw: 86 .long 0x020a0000,0x80000000+.Lioint 87 88# 89# subroutine for loading cards from the reader 90# 91.Lloader: 92 la %r4,0(%r14) 93 la %r3,.Lorb # r2 = address of orb into r2 94 la %r5,.Lirb # r4 = address of irb 95 la %r6,.Lccws 96 la %r7,20 97.Linit: 98 st %r2,4(%r6) # initialize CCW data addresses 99 la %r2,0x50(%r2) 100 la %r6,8(%r6) 101 bct 7,.Linit 102 103 lctl %c6,%c6,.Lcr6 # set IO subclass mask 104 slr %r2,%r2 105.Lldlp: 106 ssch 0(%r3) # load chunk of 1600 bytes 107 bnz .Llderr 108.Lwait4irq: 109 bas %r14,.Lirqwait 110 c %r1,__LC_SUBCHANNEL_ID # compare subchannel number 111 bne .Lwait4irq 112 tsch 0(%r5) 113 114 slr %r0,%r0 115 ic %r0,8(%r5) # get device status 116 chi %r0,8 # channel end ? 117 be .Lcont 118 chi %r0,12 # channel end + device end ? 119 be .Lcont 120 121 l %r0,4(%r5) 122 s %r0,8(%r3) # r0/8 = number of ccws executed 123 mhi %r0,10 # *10 = number of bytes in ccws 124 lh %r3,10(%r5) # get residual count 125 sr %r0,%r3 # #ccws*80-residual=#bytes read 126 ar %r2,%r0 127 128 br %r4 # r2 contains the total size 129 130.Lcont: 131 ahi %r2,0x640 # add 0x640 to total size 132 la %r6,.Lccws 133 la %r7,20 134.Lincr: 135 l %r0,4(%r6) # update CCW data addresses 136 ahi %r0,0x640 137 st %r0,4(%r6) 138 ahi %r6,8 139 bct 7,.Lincr 140 141 b .Lldlp 142.Llderr: 143 lpsw .Lcrash 144 145 .align 8 146.Lorb: .long 0x00000000,0x0080ff00,.Lccws 147.Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 148.Lcr6: .long 0xff000000 149.Lloadp:.long 0,0 150 .align 8 151.Lcrash:.long 0x000a0000,0x00000000 152 153 .align 8 154.Lccws: .rept 19 155 .long 0x02600050,0x00000000 156 .endr 157 .long 0x02200050,0x00000000 158 159iplstart: 160 mvi __LC_AR_MODE_ID,1 # set esame flag 161 slr %r0,%r0 # set cpuid to zero 162 lhi %r1,2 # mode 2 = esame (dump) 163 sigp %r1,%r0,0x12 # switch to esame mode 164 bras %r13,0f 165 .fill 16,4,0x0 1660: lmh %r0,%r15,0(%r13) # clear high-order half of gprs 167 sam31 # switch to 31 bit addressing mode 168 lh %r1,__LC_SUBCHANNEL_ID # test if subchannel number 169 bct %r1,.Lnoload # is valid 170 l %r1,__LC_SUBCHANNEL_ID # load ipl subchannel number 171 la %r2,IPL_BS # load start address 172 bas %r14,.Lloader # load rest of ipl image 173 l %r12,.Lparm # pointer to parameter area 174 st %r1,IPL_DEVICE+ARCH_OFFSET-PARMAREA(%r12) # save ipl device number 175 176# 177# load parameter file from ipl device 178# 179.Lagain1: 180 l %r2,.Linitrd # ramdisk loc. is temp 181 bas %r14,.Lloader # load parameter file 182 ltr %r2,%r2 # got anything ? 183 bz .Lnopf 184 chi %r2,895 185 bnh .Lnotrunc 186 la %r2,895 187.Lnotrunc: 188 l %r4,.Linitrd 189 clc 0(3,%r4),.L_hdr # if it is HDRx 190 bz .Lagain1 # skip dataset header 191 clc 0(3,%r4),.L_eof # if it is EOFx 192 bz .Lagain1 # skip dateset trailer 193 la %r5,0(%r4,%r2) 194 lr %r3,%r2 195 la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line 196 mvc 0(256,%r3),0(%r4) 197 mvc 256(256,%r3),256(%r4) 198 mvc 512(256,%r3),512(%r4) 199 mvc 768(122,%r3),768(%r4) 200 slr %r0,%r0 201 b .Lcntlp 202.Ldelspc: 203 ic %r0,0(%r2,%r3) 204 chi %r0,0x20 # is it a space ? 205 be .Lcntlp 206 ahi %r2,1 207 b .Leolp 208.Lcntlp: 209 brct %r2,.Ldelspc 210.Leolp: 211 slr %r0,%r0 212 stc %r0,0(%r2,%r3) # terminate buffer 213.Lnopf: 214 215# 216# load ramdisk from ipl device 217# 218.Lagain2: 219 l %r2,.Linitrd # addr of ramdisk 220 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) 221 bas %r14,.Lloader # load ramdisk 222 st %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd 223 ltr %r2,%r2 224 bnz .Lrdcont 225 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found 226.Lrdcont: 227 l %r2,.Linitrd 228 229 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx 230 bz .Lagain2 231 clc 0(3,%r2),.L_eof 232 bz .Lagain2 233 234# 235# reset files in VM reader 236# 237 stidp .Lcpuid # store cpuid 238 tm .Lcpuid,0xff # running VM ? 239 bno .Lnoreset 240 la %r2,.Lreset 241 lhi %r3,26 242 diag %r2,%r3,8 243 la %r5,.Lirb 244 stsch 0(%r5) # check if irq is pending 245 tm 30(%r5),0x0f # by verifying if any of the 246 bnz .Lwaitforirq # activity or status control 247 tm 31(%r5),0xff # bits is set in the schib 248 bz .Lnoreset 249.Lwaitforirq: 250 bas %r14,.Lirqwait # wait for IO interrupt 251 c %r1,__LC_SUBCHANNEL_ID # compare subchannel number 252 bne .Lwaitforirq 253 la %r5,.Lirb 254 tsch 0(%r5) 255.Lnoreset: 256 b .Lnoload 257 258# 259# everything loaded, go for it 260# 261.Lnoload: 262 l %r1,.Lstartup 263 br %r1 264 265.Linitrd:.long _end # default address of initrd 266.Lparm: .long PARMAREA 267.Lstartup: .long startup 268.Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40 269 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6 270 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold" 271.L_eof: .long 0xc5d6c600 /* C'EOF' */ 272.L_hdr: .long 0xc8c4d900 /* C'HDR' */ 273 .align 8 274.Lcpuid:.fill 8,1,0 275 276# 277# normal startup-code, running in absolute addressing mode 278# this is called either by the ipl loader or directly by PSW restart 279# or linload or SALIPL 280# 281 .org STARTUP_NORMAL_OFFSET 282SYM_CODE_START(startup) 283 j startup_normal 284 .org EP_OFFSET 285# 286# This is a list of s390 kernel entry points. At address 0x1000f the number of 287# valid entry points is stored. 288# 289# IMPORTANT: Do not change this table, it is s390 kernel ABI! 290# 291 .ascii EP_STRING 292 .byte 0x00,0x01 293# 294# kdump startup-code, running in 64 bit absolute addressing mode 295# 296 .org STARTUP_KDUMP_OFFSET 297 j startup_kdump 298SYM_CODE_END(startup) 299SYM_CODE_START_LOCAL(startup_normal) 300 mvi __LC_AR_MODE_ID,1 # set esame flag 301 slr %r0,%r0 # set cpuid to zero 302 lhi %r1,2 # mode 2 = esame (dump) 303 sigp %r1,%r0,0x12 # switch to esame mode 304 bras %r13,0f 305 .fill 16,4,0x0 3060: lmh %r0,%r15,0(%r13) # clear high-order half of gprs 307 sam64 # switch to 64 bit addressing mode 308 basr %r13,0 # get base 309.LPG0: 310 mvc __LC_EXT_NEW_PSW(16),.Lext_new_psw-.LPG0(%r13) 311 mvc __LC_PGM_NEW_PSW(16),.Lpgm_new_psw-.LPG0(%r13) 312 mvc __LC_IO_NEW_PSW(16),.Lio_new_psw-.LPG0(%r13) 313 xc 0x200(256),0x200 # partially clear lowcore 314 xc 0x300(256),0x300 315 xc 0xe00(256),0xe00 316 xc 0xf00(256),0xf00 317 lctlg %c0,%c15,.Lctl-.LPG0(%r13) # load control registers 318 stcke __LC_BOOT_CLOCK 319 mvc __LC_LAST_UPDATE_CLOCK(8),__LC_BOOT_CLOCK+1 320 spt 6f-.LPG0(%r13) 321 mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13) 322 larl %r15,_stack_end-STACK_FRAME_OVERHEAD 323 brasl %r14,verify_facilities 324 brasl %r14,startup_kernel 325SYM_CODE_END(startup_normal) 326 327 .align 8 3286: .long 0x7fffffff,0xffffffff 329.Lext_new_psw: 330 .quad 0x0002000180000000,0x1b0 # disabled wait 331.Lpgm_new_psw: 332 .quad 0x0000000180000000,startup_pgm_check_handler 333.Lio_new_psw: 334 .quad 0x0002000180000000,0x1f0 # disabled wait 335.Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space 336 .quad 0 # cr1: primary space segment table 337 .quad .Lduct # cr2: dispatchable unit control table 338 .quad 0 # cr3: instruction authorization 339 .quad 0xffff # cr4: instruction authorization 340 .quad .Lduct # cr5: primary-aste origin 341 .quad 0 # cr6: I/O interrupts 342 .quad 0 # cr7: secondary space segment table 343 .quad 0x0000000000008000 # cr8: access registers translation 344 .quad 0 # cr9: tracing off 345 .quad 0 # cr10: tracing off 346 .quad 0 # cr11: tracing off 347 .quad 0 # cr12: tracing off 348 .quad 0 # cr13: home space segment table 349 .quad 0xc0000000 # cr14: machine check handling off 350 .quad .Llinkage_stack # cr15: linkage stack operations 351 352 .section .dma.data,"aw",@progbits 353.Lduct: .long 0,.Laste,.Laste,0,.Lduald,0,0,0 354 .long 0,0,0,0,0,0,0,0 355.Llinkage_stack: 356 .long 0,0,0x89000000,0,0,0,0x8a000000,0 357 .align 64 358.Laste: .quad 0,0xffffffffffffffff,0,0,0,0,0,0 359 .align 128 360.Lduald:.rept 8 361 .long 0x80000000,0,0,0 # invalid access-list entries 362 .endr 363 .previous 364 365#include "head_kdump.S" 366 367# 368# This program check is active immediately after kernel start 369# and until early_pgm_check_handler is set in kernel/early.c 370# It simply saves general/control registers and psw in 371# the save area and does disabled wait with a faulty address. 372# 373SYM_CODE_START_LOCAL(startup_pgm_check_handler) 374 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 375 la %r8,4095 376 stctg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r8) 377 stmg %r0,%r7,__LC_GPREGS_SAVE_AREA-4095(%r8) 378 mvc __LC_GPREGS_SAVE_AREA-4095+64(64,%r8),__LC_SAVE_AREA_SYNC 379 mvc __LC_PSW_SAVE_AREA-4095(16,%r8),__LC_PGM_OLD_PSW 380 mvc __LC_RETURN_PSW(16),__LC_PGM_OLD_PSW 381 ni __LC_RETURN_PSW,0xfc # remove IO and EX bits 382 ni __LC_RETURN_PSW+1,0xfb # remove MCHK bit 383 oi __LC_RETURN_PSW+1,0x2 # set wait state bit 384 larl %r9,.Lold_psw_disabled_wait 385 stg %r9,__LC_PGM_NEW_PSW+8 386 larl %r15,_dump_info_stack_end-STACK_FRAME_OVERHEAD 387 brasl %r14,print_pgm_check_info 388.Lold_psw_disabled_wait: 389 la %r8,4095 390 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r8) 391 lpswe __LC_RETURN_PSW # disabled wait 392SYM_CODE_END(startup_pgm_check_handler) 393 394# 395# params at 10400 (setup.h) 396# Must be keept in sync with struct parmarea in setup.h 397# 398 .org PARMAREA 399SYM_DATA_START(parmarea) 400 .quad 0 # IPL_DEVICE 401 .quad 0 # INITRD_START 402 .quad 0 # INITRD_SIZE 403 .quad 0 # OLDMEM_BASE 404 .quad 0 # OLDMEM_SIZE 405 .quad kernel_version # points to kernel version string 406 407 .org COMMAND_LINE 408 .byte "root=/dev/ram0 ro" 409 .byte 0 410 .org PARMAREA+__PARMAREA_SIZE 411SYM_DATA_END(parmarea) 412 413 .org EARLY_SCCB_OFFSET 414 .fill EXT_SCCB_READ_SCP 415 416 .org HEAD_END 417