1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright IBM Corp. 1999, 2010 4 * 5 * Author(s): Hartmut Penner <hp@de.ibm.com> 6 * Martin Schwidefsky <schwidefsky@de.ibm.com> 7 * Rob van der Heij <rvdhei@iae.nl> 8 * Heiko Carstens <heiko.carstens@de.ibm.com> 9 * 10 * There are 5 different IPL methods 11 * 1) load the image directly into ram at address 0 and do an PSW restart 12 * 2) linload will load the image from address 0x10000 to memory 0x10000 13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated) 14 * 3) generate the tape ipl header, store the generated image on a tape 15 * and ipl from it 16 * In case of SL tape you need to IPL 5 times to get past VOL1 etc 17 * 4) generate the vm reader ipl header, move the generated image to the 18 * VM reader (use option NOH!) and do a ipl from reader (VM only) 19 * 5) direct call of start by the SALIPL loader 20 * We use the cpuid to distinguish between VM and native ipl 21 * params for kernel are pushed to 0x10400 (see setup.h) 22 * 23 */ 24 25#include <linux/init.h> 26#include <linux/linkage.h> 27#include <asm/asm-offsets.h> 28#include <asm/page.h> 29#include <asm/ptrace.h> 30#include <asm/sclp.h> 31 32#define ARCH_OFFSET 4 33 34#define EP_OFFSET 0x10008 35#define EP_STRING "S390EP" 36 37__HEAD 38 39#define IPL_BS 0x730 40 .org 0 41 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded 42 .long 0x02000018,0x60000050 # by ipl to addresses 0-23. 43 .long 0x02000068,0x60000050 # (a PSW and two CCWs). 44 .fill 80-24,1,0x40 # bytes 24-79 are discarded !! 45 .long 0x020000f0,0x60000050 # The next 160 byte are loaded 46 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7 47 .long 0x02000190,0x60000050 # They form the continuation 48 .long 0x020001e0,0x60000050 # of the CCW program started 49 .long 0x02000230,0x60000050 # by ipl and load the range 50 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image 51 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730 52 .long 0x02000320,0x60000050 # in memory. At the end of 53 .long 0x02000370,0x60000050 # the channel program the PSW 54 .long 0x020003c0,0x60000050 # at location 0 is loaded. 55 .long 0x02000410,0x60000050 # Initial processing starts 56 .long 0x02000460,0x60000050 # at 0x200 = iplstart. 57 .long 0x020004b0,0x60000050 58 .long 0x02000500,0x60000050 59 .long 0x02000550,0x60000050 60 .long 0x020005a0,0x60000050 61 .long 0x020005f0,0x60000050 62 .long 0x02000640,0x60000050 63 .long 0x02000690,0x60000050 64 .long 0x020006e0,0x20000050 65 66 .org __LC_RST_NEW_PSW # 0x1a0 67 .quad 0,iplstart 68 .org __LC_EXT_NEW_PSW # 0x1b0 69 .quad 0x0002000180000000,0x1b0 # disabled wait 70 .org __LC_PGM_NEW_PSW # 0x1d0 71 .quad 0x0000000180000000,startup_pgm_check_handler 72 .org __LC_IO_NEW_PSW # 0x1f0 73 .quad 0x0002000180000000,0x1f0 # disabled wait 74 75 .org 0x200 76 77# 78# subroutine to wait for end I/O 79# 80.Lirqwait: 81 mvc __LC_IO_NEW_PSW(16),.Lnewpsw # set up IO interrupt psw 82 lpsw .Lwaitpsw 83.Lioint: 84 br %r14 85 .align 8 86.Lnewpsw: 87 .quad 0x0000000080000000,.Lioint 88.Lwaitpsw: 89 .long 0x020a0000,0x80000000+.Lioint 90 91# 92# subroutine for loading cards from the reader 93# 94.Lloader: 95 la %r4,0(%r14) 96 la %r3,.Lorb # r2 = address of orb into r2 97 la %r5,.Lirb # r4 = address of irb 98 la %r6,.Lccws 99 la %r7,20 100.Linit: 101 st %r2,4(%r6) # initialize CCW data addresses 102 la %r2,0x50(%r2) 103 la %r6,8(%r6) 104 bct 7,.Linit 105 106 lctl %c6,%c6,.Lcr6 # set IO subclass mask 107 slr %r2,%r2 108.Lldlp: 109 ssch 0(%r3) # load chunk of 1600 bytes 110 bnz .Llderr 111.Lwait4irq: 112 bas %r14,.Lirqwait 113 c %r1,__LC_SUBCHANNEL_ID # compare subchannel number 114 bne .Lwait4irq 115 tsch 0(%r5) 116 117 slr %r0,%r0 118 ic %r0,8(%r5) # get device status 119 chi %r0,8 # channel end ? 120 be .Lcont 121 chi %r0,12 # channel end + device end ? 122 be .Lcont 123 124 l %r0,4(%r5) 125 s %r0,8(%r3) # r0/8 = number of ccws executed 126 mhi %r0,10 # *10 = number of bytes in ccws 127 lh %r3,10(%r5) # get residual count 128 sr %r0,%r3 # #ccws*80-residual=#bytes read 129 ar %r2,%r0 130 131 br %r4 # r2 contains the total size 132 133.Lcont: 134 ahi %r2,0x640 # add 0x640 to total size 135 la %r6,.Lccws 136 la %r7,20 137.Lincr: 138 l %r0,4(%r6) # update CCW data addresses 139 ahi %r0,0x640 140 st %r0,4(%r6) 141 ahi %r6,8 142 bct 7,.Lincr 143 144 b .Lldlp 145.Llderr: 146 lpsw .Lcrash 147 148 .align 8 149.Lorb: .long 0x00000000,0x0080ff00,.Lccws 150.Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 151.Lcr6: .long 0xff000000 152.Lloadp:.long 0,0 153 .align 8 154.Lcrash:.long 0x000a0000,0x00000000 155 156 .align 8 157.Lccws: .rept 19 158 .long 0x02600050,0x00000000 159 .endr 160 .long 0x02200050,0x00000000 161 162iplstart: 163 mvi __LC_AR_MODE_ID,1 # set esame flag 164 slr %r0,%r0 # set cpuid to zero 165 lhi %r1,2 # mode 2 = esame (dump) 166 sigp %r1,%r0,0x12 # switch to esame mode 167 bras %r13,0f 168 .fill 16,4,0x0 1690: lmh %r0,%r15,0(%r13) # clear high-order half of gprs 170 sam31 # switch to 31 bit addressing mode 171 lh %r1,__LC_SUBCHANNEL_ID # test if subchannel number 172 bct %r1,.Lnoload # is valid 173 l %r1,__LC_SUBCHANNEL_ID # load ipl subchannel number 174 la %r2,IPL_BS # load start address 175 bas %r14,.Lloader # load rest of ipl image 176 l %r12,.Lparm # pointer to parameter area 177 st %r1,IPL_DEVICE+ARCH_OFFSET-PARMAREA(%r12) # save ipl device number 178 179# 180# load parameter file from ipl device 181# 182.Lagain1: 183 l %r2,.Linitrd # ramdisk loc. is temp 184 bas %r14,.Lloader # load parameter file 185 ltr %r2,%r2 # got anything ? 186 bz .Lnopf 187 chi %r2,895 188 bnh .Lnotrunc 189 la %r2,895 190.Lnotrunc: 191 l %r4,.Linitrd 192 clc 0(3,%r4),.L_hdr # if it is HDRx 193 bz .Lagain1 # skip dataset header 194 clc 0(3,%r4),.L_eof # if it is EOFx 195 bz .Lagain1 # skip dateset trailer 196 la %r5,0(%r4,%r2) 197 lr %r3,%r2 198 la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line 199 mvc 0(256,%r3),0(%r4) 200 mvc 256(256,%r3),256(%r4) 201 mvc 512(256,%r3),512(%r4) 202 mvc 768(122,%r3),768(%r4) 203 slr %r0,%r0 204 b .Lcntlp 205.Ldelspc: 206 ic %r0,0(%r2,%r3) 207 chi %r0,0x20 # is it a space ? 208 be .Lcntlp 209 ahi %r2,1 210 b .Leolp 211.Lcntlp: 212 brct %r2,.Ldelspc 213.Leolp: 214 slr %r0,%r0 215 stc %r0,0(%r2,%r3) # terminate buffer 216.Lnopf: 217 218# 219# load ramdisk from ipl device 220# 221.Lagain2: 222 l %r2,.Linitrd # addr of ramdisk 223 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) 224 bas %r14,.Lloader # load ramdisk 225 st %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd 226 ltr %r2,%r2 227 bnz .Lrdcont 228 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found 229.Lrdcont: 230 l %r2,.Linitrd 231 232 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx 233 bz .Lagain2 234 clc 0(3,%r2),.L_eof 235 bz .Lagain2 236 237# 238# reset files in VM reader 239# 240 stidp .Lcpuid # store cpuid 241 tm .Lcpuid,0xff # running VM ? 242 bno .Lnoreset 243 la %r2,.Lreset 244 lhi %r3,26 245 diag %r2,%r3,8 246 la %r5,.Lirb 247 stsch 0(%r5) # check if irq is pending 248 tm 30(%r5),0x0f # by verifying if any of the 249 bnz .Lwaitforirq # activity or status control 250 tm 31(%r5),0xff # bits is set in the schib 251 bz .Lnoreset 252.Lwaitforirq: 253 bas %r14,.Lirqwait # wait for IO interrupt 254 c %r1,__LC_SUBCHANNEL_ID # compare subchannel number 255 bne .Lwaitforirq 256 la %r5,.Lirb 257 tsch 0(%r5) 258.Lnoreset: 259 b .Lnoload 260 261# 262# everything loaded, go for it 263# 264.Lnoload: 265 l %r1,.Lstartup 266 br %r1 267 268.Linitrd:.long _end # default address of initrd 269.Lparm: .long PARMAREA 270.Lstartup: .long startup 271.Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40 272 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6 273 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold" 274.L_eof: .long 0xc5d6c600 /* C'EOF' */ 275.L_hdr: .long 0xc8c4d900 /* C'HDR' */ 276 .align 8 277.Lcpuid:.fill 8,1,0 278 279# 280# normal startup-code, running in absolute addressing mode 281# this is called either by the ipl loader or directly by PSW restart 282# or linload or SALIPL 283# 284 .org STARTUP_NORMAL_OFFSET 285SYM_CODE_START(startup) 286 j startup_normal 287 .org EP_OFFSET 288# 289# This is a list of s390 kernel entry points. At address 0x1000f the number of 290# valid entry points is stored. 291# 292# IMPORTANT: Do not change this table, it is s390 kernel ABI! 293# 294 .ascii EP_STRING 295 .byte 0x00,0x01 296# 297# kdump startup-code, running in 64 bit absolute addressing mode 298# 299 .org STARTUP_KDUMP_OFFSET 300 j startup_kdump 301SYM_CODE_END(startup) 302SYM_CODE_START_LOCAL(startup_normal) 303 mvi __LC_AR_MODE_ID,1 # set esame flag 304 slr %r0,%r0 # set cpuid to zero 305 lhi %r1,2 # mode 2 = esame (dump) 306 sigp %r1,%r0,0x12 # switch to esame mode 307 bras %r13,0f 308 .fill 16,4,0x0 3090: lmh %r0,%r15,0(%r13) # clear high-order half of gprs 310 sam64 # switch to 64 bit addressing mode 311 basr %r13,0 # get base 312.LPG0: 313 mvc __LC_EXT_NEW_PSW(16),.Lext_new_psw-.LPG0(%r13) 314 mvc __LC_PGM_NEW_PSW(16),.Lpgm_new_psw-.LPG0(%r13) 315 mvc __LC_IO_NEW_PSW(16),.Lio_new_psw-.LPG0(%r13) 316 xc 0x200(256),0x200 # partially clear lowcore 317 xc 0x300(256),0x300 318 xc 0xe00(256),0xe00 319 xc 0xf00(256),0xf00 320 lctlg %c0,%c15,.Lctl-.LPG0(%r13) # load control registers 321 stcke __LC_BOOT_CLOCK 322 mvc __LC_LAST_UPDATE_CLOCK(8),__LC_BOOT_CLOCK+1 323 spt 6f-.LPG0(%r13) 324 mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13) 325 larl %r15,_stack_end-STACK_FRAME_OVERHEAD 326 brasl %r14,sclp_early_setup_buffer 327 brasl %r14,verify_facilities 328 brasl %r14,startup_kernel 329SYM_CODE_END(startup_normal) 330 331 .align 8 3326: .long 0x7fffffff,0xffffffff 333.Lext_new_psw: 334 .quad 0x0002000180000000,0x1b0 # disabled wait 335.Lpgm_new_psw: 336 .quad 0x0000000180000000,startup_pgm_check_handler 337.Lio_new_psw: 338 .quad 0x0002000180000000,0x1f0 # disabled wait 339.Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space 340 .quad 0 # cr1: primary space segment table 341 .quad .Lduct # cr2: dispatchable unit control table 342 .quad 0 # cr3: instruction authorization 343 .quad 0xffff # cr4: instruction authorization 344 .quad .Lduct # cr5: primary-aste origin 345 .quad 0 # cr6: I/O interrupts 346 .quad 0 # cr7: secondary space segment table 347 .quad 0x0000000000008000 # cr8: access registers translation 348 .quad 0 # cr9: tracing off 349 .quad 0 # cr10: tracing off 350 .quad 0 # cr11: tracing off 351 .quad 0 # cr12: tracing off 352 .quad 0 # cr13: home space segment table 353 .quad 0xc0000000 # cr14: machine check handling off 354 .quad .Llinkage_stack # cr15: linkage stack operations 355 356 .section .dma.data,"aw",@progbits 357.Lduct: .long 0,.Laste,.Laste,0,.Lduald,0,0,0 358 .long 0,0,0,0,0,0,0,0 359.Llinkage_stack: 360 .long 0,0,0x89000000,0,0,0,0x8a000000,0 361 .align 64 362.Laste: .quad 0,0xffffffffffffffff,0,0,0,0,0,0 363 .align 128 364.Lduald:.rept 8 365 .long 0x80000000,0,0,0 # invalid access-list entries 366 .endr 367 .previous 368 369#include "head_kdump.S" 370 371# 372# This program check is active immediately after kernel start 373# and until early_pgm_check_handler is set in kernel/early.c 374# It simply saves general/control registers and psw in 375# the save area and does disabled wait with a faulty address. 376# 377SYM_CODE_START_LOCAL(startup_pgm_check_handler) 378 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 379 la %r8,4095 380 stctg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r8) 381 stmg %r0,%r7,__LC_GPREGS_SAVE_AREA-4095(%r8) 382 mvc __LC_GPREGS_SAVE_AREA-4095+64(64,%r8),__LC_SAVE_AREA_SYNC 383 mvc __LC_PSW_SAVE_AREA-4095(16,%r8),__LC_PGM_OLD_PSW 384 mvc __LC_RETURN_PSW(16),__LC_PGM_OLD_PSW 385 ni __LC_RETURN_PSW,0xfc # remove IO and EX bits 386 ni __LC_RETURN_PSW+1,0xfb # remove MCHK bit 387 oi __LC_RETURN_PSW+1,0x2 # set wait state bit 388 larl %r9,.Lold_psw_disabled_wait 389 stg %r9,__LC_PGM_NEW_PSW+8 390 larl %r15,_dump_info_stack_end-STACK_FRAME_OVERHEAD 391 brasl %r14,print_pgm_check_info 392.Lold_psw_disabled_wait: 393 la %r8,4095 394 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r8) 395 lpswe __LC_RETURN_PSW # disabled wait 396SYM_CODE_END(startup_pgm_check_handler) 397 398# 399# params at 10400 (setup.h) 400# Must be keept in sync with struct parmarea in setup.h 401# 402 .org PARMAREA 403SYM_DATA_START(parmarea) 404 .quad 0 # IPL_DEVICE 405 .quad 0 # INITRD_START 406 .quad 0 # INITRD_SIZE 407 .quad 0 # OLDMEM_BASE 408 .quad 0 # OLDMEM_SIZE 409 .quad kernel_version # points to kernel version string 410 411 .org COMMAND_LINE 412 .byte "root=/dev/ram0 ro" 413 .byte 0 414 .org PARMAREA+__PARMAREA_SIZE 415SYM_DATA_END(parmarea) 416 417 .org HEAD_END 418