1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright IBM Corp. 1999, 2010 4 * 5 * Author(s): Hartmut Penner <hp@de.ibm.com> 6 * Martin Schwidefsky <schwidefsky@de.ibm.com> 7 * Rob van der Heij <rvdhei@iae.nl> 8 * Heiko Carstens <heiko.carstens@de.ibm.com> 9 * 10 * There are 5 different IPL methods 11 * 1) load the image directly into ram at address 0 and do an PSW restart 12 * 2) linload will load the image from address 0x10000 to memory 0x10000 13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated) 14 * 3) generate the tape ipl header, store the generated image on a tape 15 * and ipl from it 16 * In case of SL tape you need to IPL 5 times to get past VOL1 etc 17 * 4) generate the vm reader ipl header, move the generated image to the 18 * VM reader (use option NOH!) and do a ipl from reader (VM only) 19 * 5) direct call of start by the SALIPL loader 20 * We use the cpuid to distinguish between VM and native ipl 21 * params for kernel are pushed to 0x10400 (see setup.h) 22 * 23 */ 24 25#include <linux/init.h> 26#include <linux/linkage.h> 27#include <asm/asm-offsets.h> 28#include <asm/page.h> 29#include <asm/ptrace.h> 30 31#define ARCH_OFFSET 4 32 33__HEAD 34 35#define IPL_BS 0x730 36 .org 0 37 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded 38 .long 0x02000018,0x60000050 # by ipl to addresses 0-23. 39 .long 0x02000068,0x60000050 # (a PSW and two CCWs). 40 .fill 80-24,1,0x40 # bytes 24-79 are discarded !! 41 .long 0x020000f0,0x60000050 # The next 160 byte are loaded 42 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7 43 .long 0x02000190,0x60000050 # They form the continuation 44 .long 0x020001e0,0x60000050 # of the CCW program started 45 .long 0x02000230,0x60000050 # by ipl and load the range 46 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image 47 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730 48 .long 0x02000320,0x60000050 # in memory. At the end of 49 .long 0x02000370,0x60000050 # the channel program the PSW 50 .long 0x020003c0,0x60000050 # at location 0 is loaded. 51 .long 0x02000410,0x60000050 # Initial processing starts 52 .long 0x02000460,0x60000050 # at 0x200 = iplstart. 53 .long 0x020004b0,0x60000050 54 .long 0x02000500,0x60000050 55 .long 0x02000550,0x60000050 56 .long 0x020005a0,0x60000050 57 .long 0x020005f0,0x60000050 58 .long 0x02000640,0x60000050 59 .long 0x02000690,0x60000050 60 .long 0x020006e0,0x20000050 61 62 .org __LC_RST_NEW_PSW # 0x1a0 63 .quad 0,iplstart 64 .org __LC_EXT_NEW_PSW # 0x1b0 65 .quad 0x0002000180000000,0x1b0 # disabled wait 66 .org __LC_PGM_NEW_PSW # 0x1d0 67 .quad 0x0000000180000000,startup_pgm_check_handler 68 .org __LC_IO_NEW_PSW # 0x1f0 69 .quad 0x0002000180000000,0x1f0 # disabled wait 70 71 .org 0x200 72 73# 74# subroutine to wait for end I/O 75# 76.Lirqwait: 77 mvc __LC_IO_NEW_PSW(16),.Lnewpsw # set up IO interrupt psw 78 lpsw .Lwaitpsw 79.Lioint: 80 br %r14 81 .align 8 82.Lnewpsw: 83 .quad 0x0000000080000000,.Lioint 84.Lwaitpsw: 85 .long 0x020a0000,0x80000000+.Lioint 86 87# 88# subroutine for loading cards from the reader 89# 90.Lloader: 91 la %r4,0(%r14) 92 la %r3,.Lorb # r2 = address of orb into r2 93 la %r5,.Lirb # r4 = address of irb 94 la %r6,.Lccws 95 la %r7,20 96.Linit: 97 st %r2,4(%r6) # initialize CCW data addresses 98 la %r2,0x50(%r2) 99 la %r6,8(%r6) 100 bct 7,.Linit 101 102 lctl %c6,%c6,.Lcr6 # set IO subclass mask 103 slr %r2,%r2 104.Lldlp: 105 ssch 0(%r3) # load chunk of 1600 bytes 106 bnz .Llderr 107.Lwait4irq: 108 bas %r14,.Lirqwait 109 c %r1,__LC_SUBCHANNEL_ID # compare subchannel number 110 bne .Lwait4irq 111 tsch 0(%r5) 112 113 slr %r0,%r0 114 ic %r0,8(%r5) # get device status 115 chi %r0,8 # channel end ? 116 be .Lcont 117 chi %r0,12 # channel end + device end ? 118 be .Lcont 119 120 l %r0,4(%r5) 121 s %r0,8(%r3) # r0/8 = number of ccws executed 122 mhi %r0,10 # *10 = number of bytes in ccws 123 lh %r3,10(%r5) # get residual count 124 sr %r0,%r3 # #ccws*80-residual=#bytes read 125 ar %r2,%r0 126 127 br %r4 # r2 contains the total size 128 129.Lcont: 130 ahi %r2,0x640 # add 0x640 to total size 131 la %r6,.Lccws 132 la %r7,20 133.Lincr: 134 l %r0,4(%r6) # update CCW data addresses 135 ahi %r0,0x640 136 st %r0,4(%r6) 137 ahi %r6,8 138 bct 7,.Lincr 139 140 b .Lldlp 141.Llderr: 142 lpsw .Lcrash 143 144 .align 8 145.Lorb: .long 0x00000000,0x0080ff00,.Lccws 146.Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 147.Lcr6: .long 0xff000000 148.Lloadp:.long 0,0 149 .align 8 150.Lcrash:.long 0x000a0000,0x00000000 151 152 .align 8 153.Lccws: .rept 19 154 .long 0x02600050,0x00000000 155 .endr 156 .long 0x02200050,0x00000000 157 158iplstart: 159 mvi __LC_AR_MODE_ID,1 # set esame flag 160 slr %r0,%r0 # set cpuid to zero 161 lhi %r1,2 # mode 2 = esame (dump) 162 sigp %r1,%r0,0x12 # switch to esame mode 163 bras %r13,0f 164 .fill 16,4,0x0 1650: lmh %r0,%r15,0(%r13) # clear high-order half of gprs 166 sam31 # switch to 31 bit addressing mode 167 lh %r1,__LC_SUBCHANNEL_ID # test if subchannel number 168 bct %r1,.Lnoload # is valid 169 l %r1,__LC_SUBCHANNEL_ID # load ipl subchannel number 170 la %r2,IPL_BS # load start address 171 bas %r14,.Lloader # load rest of ipl image 172 l %r12,.Lparm # pointer to parameter area 173 st %r1,IPL_DEVICE+ARCH_OFFSET-PARMAREA(%r12) # save ipl device number 174 175# 176# load parameter file from ipl device 177# 178.Lagain1: 179 l %r2,.Linitrd # ramdisk loc. is temp 180 bas %r14,.Lloader # load parameter file 181 ltr %r2,%r2 # got anything ? 182 bz .Lnopf 183 chi %r2,895 184 bnh .Lnotrunc 185 la %r2,895 186.Lnotrunc: 187 l %r4,.Linitrd 188 clc 0(3,%r4),.L_hdr # if it is HDRx 189 bz .Lagain1 # skip dataset header 190 clc 0(3,%r4),.L_eof # if it is EOFx 191 bz .Lagain1 # skip dateset trailer 192 la %r5,0(%r4,%r2) 193 lr %r3,%r2 194 la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line 195 mvc 0(256,%r3),0(%r4) 196 mvc 256(256,%r3),256(%r4) 197 mvc 512(256,%r3),512(%r4) 198 mvc 768(122,%r3),768(%r4) 199 slr %r0,%r0 200 b .Lcntlp 201.Ldelspc: 202 ic %r0,0(%r2,%r3) 203 chi %r0,0x20 # is it a space ? 204 be .Lcntlp 205 ahi %r2,1 206 b .Leolp 207.Lcntlp: 208 brct %r2,.Ldelspc 209.Leolp: 210 slr %r0,%r0 211 stc %r0,0(%r2,%r3) # terminate buffer 212.Lnopf: 213 214# 215# load ramdisk from ipl device 216# 217.Lagain2: 218 l %r2,.Linitrd # addr of ramdisk 219 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) 220 bas %r14,.Lloader # load ramdisk 221 st %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd 222 ltr %r2,%r2 223 bnz .Lrdcont 224 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found 225.Lrdcont: 226 l %r2,.Linitrd 227 228 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx 229 bz .Lagain2 230 clc 0(3,%r2),.L_eof 231 bz .Lagain2 232 233# 234# reset files in VM reader 235# 236 stidp .Lcpuid # store cpuid 237 tm .Lcpuid,0xff # running VM ? 238 bno .Lnoreset 239 la %r2,.Lreset 240 lhi %r3,26 241 diag %r2,%r3,8 242 la %r5,.Lirb 243 stsch 0(%r5) # check if irq is pending 244 tm 30(%r5),0x0f # by verifying if any of the 245 bnz .Lwaitforirq # activity or status control 246 tm 31(%r5),0xff # bits is set in the schib 247 bz .Lnoreset 248.Lwaitforirq: 249 bas %r14,.Lirqwait # wait for IO interrupt 250 c %r1,__LC_SUBCHANNEL_ID # compare subchannel number 251 bne .Lwaitforirq 252 la %r5,.Lirb 253 tsch 0(%r5) 254.Lnoreset: 255 b .Lnoload 256 257# 258# everything loaded, go for it 259# 260.Lnoload: 261 l %r1,.Lstartup 262 br %r1 263 264.Linitrd:.long _end # default address of initrd 265.Lparm: .long PARMAREA 266.Lstartup: .long startup 267.Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40 268 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6 269 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold" 270.L_eof: .long 0xc5d6c600 /* C'EOF' */ 271.L_hdr: .long 0xc8c4d900 /* C'HDR' */ 272 .align 8 273.Lcpuid:.fill 8,1,0 274 275# 276# startup-code at 0x10000, running in absolute addressing mode 277# this is called either by the ipl loader or directly by PSW restart 278# or linload or SALIPL 279# 280 .org 0x10000 281SYM_CODE_START(startup) 282 j startup_normal 283 .org EP_OFFSET 284# 285# This is a list of s390 kernel entry points. At address 0x1000f the number of 286# valid entry points is stored. 287# 288# IMPORTANT: Do not change this table, it is s390 kernel ABI! 289# 290 .ascii EP_STRING 291 .byte 0x00,0x01 292# 293# kdump startup-code at 0x10010, running in 64 bit absolute addressing mode 294# 295 .org 0x10010 296 j startup_kdump 297SYM_CODE_END(startup) 298SYM_CODE_START_LOCAL(startup_normal) 299 mvi __LC_AR_MODE_ID,1 # set esame flag 300 slr %r0,%r0 # set cpuid to zero 301 lhi %r1,2 # mode 2 = esame (dump) 302 sigp %r1,%r0,0x12 # switch to esame mode 303 bras %r13,0f 304 .fill 16,4,0x0 3050: lmh %r0,%r15,0(%r13) # clear high-order half of gprs 306 sam64 # switch to 64 bit addressing mode 307 basr %r13,0 # get base 308.LPG0: 309 mvc __LC_EXT_NEW_PSW(16),.Lext_new_psw-.LPG0(%r13) 310 mvc __LC_PGM_NEW_PSW(16),.Lpgm_new_psw-.LPG0(%r13) 311 mvc __LC_IO_NEW_PSW(16),.Lio_new_psw-.LPG0(%r13) 312 xc 0x200(256),0x200 # partially clear lowcore 313 xc 0x300(256),0x300 314 xc 0xe00(256),0xe00 315 xc 0xf00(256),0xf00 316 lctlg %c0,%c15,.Lctl-.LPG0(%r13) # load control registers 317 stcke __LC_BOOT_CLOCK 318 mvc __LC_LAST_UPDATE_CLOCK(8),__LC_BOOT_CLOCK+1 319 spt 6f-.LPG0(%r13) 320 mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13) 321 larl %r15,_stack_end-STACK_FRAME_OVERHEAD 322 brasl %r14,verify_facilities 323 brasl %r14,startup_kernel 324SYM_CODE_END(startup_normal) 325 326 .align 8 3276: .long 0x7fffffff,0xffffffff 328.Lext_new_psw: 329 .quad 0x0002000180000000,0x1b0 # disabled wait 330.Lpgm_new_psw: 331 .quad 0x0000000180000000,startup_pgm_check_handler 332.Lio_new_psw: 333 .quad 0x0002000180000000,0x1f0 # disabled wait 334.Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space 335 .quad 0 # cr1: primary space segment table 336 .quad .Lduct # cr2: dispatchable unit control table 337 .quad 0 # cr3: instruction authorization 338 .quad 0xffff # cr4: instruction authorization 339 .quad .Lduct # cr5: primary-aste origin 340 .quad 0 # cr6: I/O interrupts 341 .quad 0 # cr7: secondary space segment table 342 .quad 0x0000000000008000 # cr8: access registers translation 343 .quad 0 # cr9: tracing off 344 .quad 0 # cr10: tracing off 345 .quad 0 # cr11: tracing off 346 .quad 0 # cr12: tracing off 347 .quad 0 # cr13: home space segment table 348 .quad 0xc0000000 # cr14: machine check handling off 349 .quad .Llinkage_stack # cr15: linkage stack operations 350 351 .section .dma.data,"aw",@progbits 352.Lduct: .long 0,.Laste,.Laste,0,.Lduald,0,0,0 353 .long 0,0,0,0,0,0,0,0 354.Llinkage_stack: 355 .long 0,0,0x89000000,0,0,0,0x8a000000,0 356 .align 64 357.Laste: .quad 0,0xffffffffffffffff,0,0,0,0,0,0 358 .align 128 359.Lduald:.rept 8 360 .long 0x80000000,0,0,0 # invalid access-list entries 361 .endr 362 .previous 363 364#include "head_kdump.S" 365 366# 367# This program check is active immediately after kernel start 368# and until early_pgm_check_handler is set in kernel/early.c 369# It simply saves general/control registers and psw in 370# the save area and does disabled wait with a faulty address. 371# 372SYM_CODE_START_LOCAL(startup_pgm_check_handler) 373 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 374 la %r8,4095 375 stctg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r8) 376 stmg %r0,%r7,__LC_GPREGS_SAVE_AREA-4095(%r8) 377 mvc __LC_GPREGS_SAVE_AREA-4095+64(64,%r8),__LC_SAVE_AREA_SYNC 378 mvc __LC_PSW_SAVE_AREA-4095(16,%r8),__LC_PGM_OLD_PSW 379 mvc __LC_RETURN_PSW(16),__LC_PGM_OLD_PSW 380 ni __LC_RETURN_PSW,0xfc # remove IO and EX bits 381 ni __LC_RETURN_PSW+1,0xfb # remove MCHK bit 382 oi __LC_RETURN_PSW+1,0x2 # set wait state bit 383 larl %r9,.Lold_psw_disabled_wait 384 stg %r9,__LC_PGM_NEW_PSW+8 385 larl %r15,_dump_info_stack_end-STACK_FRAME_OVERHEAD 386 brasl %r14,print_pgm_check_info 387.Lold_psw_disabled_wait: 388 la %r8,4095 389 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r8) 390 lpswe __LC_RETURN_PSW # disabled wait 391SYM_CODE_END(startup_pgm_check_handler) 392 393# 394# params at 10400 (setup.h) 395# Must be keept in sync with struct parmarea in setup.h 396# 397 .org PARMAREA 398SYM_DATA_START(parmarea) 399 .quad 0 # IPL_DEVICE 400 .quad 0 # INITRD_START 401 .quad 0 # INITRD_SIZE 402 .quad 0 # OLDMEM_BASE 403 .quad 0 # OLDMEM_SIZE 404 .quad kernel_version # points to kernel version string 405 406 .org COMMAND_LINE 407 .byte "root=/dev/ram0 ro" 408 .byte 0 409 .org PARMAREA+__PARMAREA_SIZE 410SYM_DATA_END(parmarea) 411 412 .org EARLY_SCCB_OFFSET 413 .fill 4096 414 415 .org HEAD_END 416