xref: /openbmc/linux/arch/riscv/mm/init.c (revision e53d2818)
150acfb2bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
276d2a049SPalmer Dabbelt /*
376d2a049SPalmer Dabbelt  * Copyright (C) 2012 Regents of the University of California
4671f9a3eSAnup Patel  * Copyright (C) 2019 Western Digital Corporation or its affiliates.
5*e53d2818SNick Kossifidis  * Copyright (C) 2020 FORTH-ICS/CARV
6*e53d2818SNick Kossifidis  *  Nick Kossifidis <mick@ics.forth.gr>
776d2a049SPalmer Dabbelt  */
876d2a049SPalmer Dabbelt 
976d2a049SPalmer Dabbelt #include <linux/init.h>
1076d2a049SPalmer Dabbelt #include <linux/mm.h>
1176d2a049SPalmer Dabbelt #include <linux/memblock.h>
1257c8a661SMike Rapoport #include <linux/initrd.h>
1376d2a049SPalmer Dabbelt #include <linux/swap.h>
145ec9c4ffSChristoph Hellwig #include <linux/sizes.h>
150651c263SAnup Patel #include <linux/of_fdt.h>
16922b0375SAlbert Ou #include <linux/libfdt.h>
17d27c3c90SZong Li #include <linux/set_memory.h>
18da815582SKefeng Wang #include <linux/dma-map-ops.h>
19*e53d2818SNick Kossifidis #include <linux/crash_dump.h>
2076d2a049SPalmer Dabbelt 
21f2c17aabSAnup Patel #include <asm/fixmap.h>
2276d2a049SPalmer Dabbelt #include <asm/tlbflush.h>
2376d2a049SPalmer Dabbelt #include <asm/sections.h>
242d268251SPalmer Dabbelt #include <asm/soc.h>
2576d2a049SPalmer Dabbelt #include <asm/io.h>
26b422d28bSZong Li #include <asm/ptdump.h>
274f0e8eefSAtish Patra #include <asm/numa.h>
2876d2a049SPalmer Dabbelt 
29ffaee272SPaul Walmsley #include "../kernel/head.h"
30ffaee272SPaul Walmsley 
312bfc6cd8SAlexandre Ghiti unsigned long kernel_virt_addr = KERNEL_LINK_ADDR;
322bfc6cd8SAlexandre Ghiti EXPORT_SYMBOL(kernel_virt_addr);
332bfc6cd8SAlexandre Ghiti 
34387181dcSAnup Patel unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
35387181dcSAnup Patel 							__page_aligned_bss;
36387181dcSAnup Patel EXPORT_SYMBOL(empty_zero_page);
37387181dcSAnup Patel 
38d90d45d7SAnup Patel extern char _start[];
398f3a2b4aSAnup Patel #define DTB_EARLY_BASE_VA      PGDIR_SIZE
408f3a2b4aSAnup Patel void *dtb_early_va __initdata;
418f3a2b4aSAnup Patel uintptr_t dtb_early_pa __initdata;
42d90d45d7SAnup Patel 
43e8dcb61fSAtish Patra struct pt_alloc_ops {
44e8dcb61fSAtish Patra 	pte_t *(*get_pte_virt)(phys_addr_t pa);
45e8dcb61fSAtish Patra 	phys_addr_t (*alloc_pte)(uintptr_t va);
46e8dcb61fSAtish Patra #ifndef __PAGETABLE_PMD_FOLDED
47e8dcb61fSAtish Patra 	pmd_t *(*get_pmd_virt)(phys_addr_t pa);
48e8dcb61fSAtish Patra 	phys_addr_t (*alloc_pmd)(uintptr_t va);
49e8dcb61fSAtish Patra #endif
50e8dcb61fSAtish Patra };
5176d2a049SPalmer Dabbelt 
52da815582SKefeng Wang static phys_addr_t dma32_phys_limit __ro_after_init;
53da815582SKefeng Wang 
5476d2a049SPalmer Dabbelt static void __init zone_sizes_init(void)
5576d2a049SPalmer Dabbelt {
565ec9c4ffSChristoph Hellwig 	unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
5776d2a049SPalmer Dabbelt 
58d5fad48cSZong Li #ifdef CONFIG_ZONE_DMA32
59da815582SKefeng Wang 	max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
60d5fad48cSZong Li #endif
615ec9c4ffSChristoph Hellwig 	max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
625ec9c4ffSChristoph Hellwig 
639691a071SMike Rapoport 	free_area_init(max_zone_pfns);
6476d2a049SPalmer Dabbelt }
6576d2a049SPalmer Dabbelt 
661987501bSJisheng Zhang static void __init setup_zero_page(void)
6776d2a049SPalmer Dabbelt {
6876d2a049SPalmer Dabbelt 	memset((void *)empty_zero_page, 0, PAGE_SIZE);
6976d2a049SPalmer Dabbelt }
7076d2a049SPalmer Dabbelt 
718fa3cdffSKefeng Wang #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
722cc6c4a0SYash Shah static inline void print_mlk(char *name, unsigned long b, unsigned long t)
732cc6c4a0SYash Shah {
742cc6c4a0SYash Shah 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld kB)\n", name, b, t,
752cc6c4a0SYash Shah 		  (((t) - (b)) >> 10));
762cc6c4a0SYash Shah }
772cc6c4a0SYash Shah 
782cc6c4a0SYash Shah static inline void print_mlm(char *name, unsigned long b, unsigned long t)
792cc6c4a0SYash Shah {
802cc6c4a0SYash Shah 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld MB)\n", name, b, t,
812cc6c4a0SYash Shah 		  (((t) - (b)) >> 20));
822cc6c4a0SYash Shah }
832cc6c4a0SYash Shah 
841987501bSJisheng Zhang static void __init print_vm_layout(void)
852cc6c4a0SYash Shah {
862cc6c4a0SYash Shah 	pr_notice("Virtual kernel memory layout:\n");
872cc6c4a0SYash Shah 	print_mlk("fixmap", (unsigned long)FIXADDR_START,
882cc6c4a0SYash Shah 		  (unsigned long)FIXADDR_TOP);
892cc6c4a0SYash Shah 	print_mlm("pci io", (unsigned long)PCI_IO_START,
902cc6c4a0SYash Shah 		  (unsigned long)PCI_IO_END);
912cc6c4a0SYash Shah 	print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
922cc6c4a0SYash Shah 		  (unsigned long)VMEMMAP_END);
932cc6c4a0SYash Shah 	print_mlm("vmalloc", (unsigned long)VMALLOC_START,
942cc6c4a0SYash Shah 		  (unsigned long)VMALLOC_END);
952cc6c4a0SYash Shah 	print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
962cc6c4a0SYash Shah 		  (unsigned long)high_memory);
972bfc6cd8SAlexandre Ghiti #ifdef CONFIG_64BIT
982bfc6cd8SAlexandre Ghiti 	print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR,
992bfc6cd8SAlexandre Ghiti 		  (unsigned long)ADDRESS_SPACE_END);
1002bfc6cd8SAlexandre Ghiti #endif
1012cc6c4a0SYash Shah }
1022cc6c4a0SYash Shah #else
1032cc6c4a0SYash Shah static void print_vm_layout(void) { }
1042cc6c4a0SYash Shah #endif /* CONFIG_DEBUG_VM */
1052cc6c4a0SYash Shah 
10676d2a049SPalmer Dabbelt void __init mem_init(void)
10776d2a049SPalmer Dabbelt {
10876d2a049SPalmer Dabbelt #ifdef CONFIG_FLATMEM
10976d2a049SPalmer Dabbelt 	BUG_ON(!mem_map);
11076d2a049SPalmer Dabbelt #endif /* CONFIG_FLATMEM */
11176d2a049SPalmer Dabbelt 
11276d2a049SPalmer Dabbelt 	high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
113c6ffc5caSMike Rapoport 	memblock_free_all();
11476d2a049SPalmer Dabbelt 
11576d2a049SPalmer Dabbelt 	mem_init_print_info(NULL);
1162cc6c4a0SYash Shah 	print_vm_layout();
11776d2a049SPalmer Dabbelt }
11876d2a049SPalmer Dabbelt 
1190651c263SAnup Patel void __init setup_bootmem(void)
1200651c263SAnup Patel {
121ac51e005SZong Li 	phys_addr_t vmlinux_end = __pa_symbol(&_end);
122ac51e005SZong Li 	phys_addr_t vmlinux_start = __pa_symbol(&_start);
123dd2d082bSKefeng Wang 	phys_addr_t dram_end = memblock_end_of_DRAM();
124abb8e86bSAtish Patra 	phys_addr_t max_mapped_addr = __pa(~(ulong)0);
1250651c263SAnup Patel 
126dd2d082bSKefeng Wang 	/* The maximal physical memory size is -PAGE_OFFSET. */
127de043da0SAtish Patra 	memblock_enforce_memory_limit(-PAGE_OFFSET);
1280651c263SAnup Patel 
1292bfc6cd8SAlexandre Ghiti 	/*
1302bfc6cd8SAlexandre Ghiti 	 * Reserve from the start of the kernel to the end of the kernel
1312bfc6cd8SAlexandre Ghiti 	 * and make sure we align the reservation on PMD_SIZE since we will
1322bfc6cd8SAlexandre Ghiti 	 * map the kernel in the linear mapping as read-only: we do not want
1332bfc6cd8SAlexandre Ghiti 	 * any allocation to happen between _end and the next pmd aligned page.
1342bfc6cd8SAlexandre Ghiti 	 */
1352bfc6cd8SAlexandre Ghiti 	memblock_reserve(vmlinux_start, (vmlinux_end - vmlinux_start + PMD_SIZE - 1) & PMD_MASK);
136d90d45d7SAnup Patel 
137abb8e86bSAtish Patra 	/*
138abb8e86bSAtish Patra 	 * memblock allocator is not aware of the fact that last 4K bytes of
139abb8e86bSAtish Patra 	 * the addressable memory can not be mapped because of IS_ERR_VALUE
140abb8e86bSAtish Patra 	 * macro. Make sure that last 4k bytes are not usable by memblock
141abb8e86bSAtish Patra 	 * if end of dram is equal to maximum addressable memory.
142abb8e86bSAtish Patra 	 */
143abb8e86bSAtish Patra 	if (max_mapped_addr == (dram_end - 1))
144abb8e86bSAtish Patra 		memblock_set_current_limit(max_mapped_addr - 4096);
145abb8e86bSAtish Patra 
146f6e5aedfSKefeng Wang 	min_low_pfn = PFN_UP(memblock_start_of_DRAM());
147f6e5aedfSKefeng Wang 	max_low_pfn = max_pfn = PFN_DOWN(dram_end);
148f6e5aedfSKefeng Wang 
149da815582SKefeng Wang 	dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
150336e8eb2SGuo Ren 	set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
1510651c263SAnup Patel 
152aec33b54SKefeng Wang 	reserve_initrd_mem();
153922b0375SAlbert Ou 	/*
154f105aa94SVitaly Wool 	 * If DTB is built in, no need to reserve its memblock.
155f105aa94SVitaly Wool 	 * Otherwise, do reserve it but avoid using
156f105aa94SVitaly Wool 	 * early_init_fdt_reserve_self() since __pa() does
157922b0375SAlbert Ou 	 * not work for DTB pointers that are fixmap addresses
158922b0375SAlbert Ou 	 */
159f105aa94SVitaly Wool 	if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
160922b0375SAlbert Ou 		memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
161922b0375SAlbert Ou 
1620651c263SAnup Patel 	early_init_fdt_scan_reserved_mem();
163da815582SKefeng Wang 	dma_contiguous_reserve(dma32_phys_limit);
1640651c263SAnup Patel 	memblock_allow_resize();
1650651c263SAnup Patel }
1666f1e9e94SAnup Patel 
1676bd33e1eSChristoph Hellwig #ifdef CONFIG_MMU
168de31ea4aSJisheng Zhang static struct pt_alloc_ops pt_ops __ro_after_init;
169e8dcb61fSAtish Patra 
1702bfc6cd8SAlexandre Ghiti /* Offset between linear mapping virtual address and kernel load address */
171de31ea4aSJisheng Zhang unsigned long va_pa_offset __ro_after_init;
172387181dcSAnup Patel EXPORT_SYMBOL(va_pa_offset);
1732bfc6cd8SAlexandre Ghiti #ifdef CONFIG_64BIT
1742bfc6cd8SAlexandre Ghiti /* Offset between kernel mapping virtual address and kernel load address */
1752bfc6cd8SAlexandre Ghiti unsigned long va_kernel_pa_offset;
1762bfc6cd8SAlexandre Ghiti EXPORT_SYMBOL(va_kernel_pa_offset);
1772bfc6cd8SAlexandre Ghiti #endif
178de31ea4aSJisheng Zhang unsigned long pfn_base __ro_after_init;
179387181dcSAnup Patel EXPORT_SYMBOL(pfn_base);
180387181dcSAnup Patel 
1816f1e9e94SAnup Patel pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
182671f9a3eSAnup Patel pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
183f2c17aabSAnup Patel pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
184671f9a3eSAnup Patel 
185671f9a3eSAnup Patel pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
186f2c17aabSAnup Patel 
187f2c17aabSAnup Patel void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
188f2c17aabSAnup Patel {
189f2c17aabSAnup Patel 	unsigned long addr = __fix_to_virt(idx);
190f2c17aabSAnup Patel 	pte_t *ptep;
191f2c17aabSAnup Patel 
192f2c17aabSAnup Patel 	BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
193f2c17aabSAnup Patel 
194f2c17aabSAnup Patel 	ptep = &fixmap_pte[pte_index(addr)];
195f2c17aabSAnup Patel 
19621190b74SGreentime Hu 	if (pgprot_val(prot))
197f2c17aabSAnup Patel 		set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
19821190b74SGreentime Hu 	else
199f2c17aabSAnup Patel 		pte_clear(&init_mm, addr, ptep);
200f2c17aabSAnup Patel 	local_flush_tlb_page(addr);
201f2c17aabSAnup Patel }
202f2c17aabSAnup Patel 
203e8dcb61fSAtish Patra static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
204671f9a3eSAnup Patel {
205671f9a3eSAnup Patel 	return (pte_t *)((uintptr_t)pa);
206671f9a3eSAnup Patel }
207e8dcb61fSAtish Patra 
208e8dcb61fSAtish Patra static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
209e8dcb61fSAtish Patra {
210e8dcb61fSAtish Patra 	clear_fixmap(FIX_PTE);
211e8dcb61fSAtish Patra 	return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
212671f9a3eSAnup Patel }
213671f9a3eSAnup Patel 
214e8dcb61fSAtish Patra static inline pte_t *get_pte_virt_late(phys_addr_t pa)
215e8dcb61fSAtish Patra {
216e8dcb61fSAtish Patra 	return (pte_t *) __va(pa);
217e8dcb61fSAtish Patra }
218e8dcb61fSAtish Patra 
219e8dcb61fSAtish Patra static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
220671f9a3eSAnup Patel {
221671f9a3eSAnup Patel 	/*
222671f9a3eSAnup Patel 	 * We only create PMD or PGD early mappings so we
223671f9a3eSAnup Patel 	 * should never reach here with MMU disabled.
224671f9a3eSAnup Patel 	 */
225e8dcb61fSAtish Patra 	BUG();
226e8dcb61fSAtish Patra }
227671f9a3eSAnup Patel 
228e8dcb61fSAtish Patra static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
229e8dcb61fSAtish Patra {
230671f9a3eSAnup Patel 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
231671f9a3eSAnup Patel }
232671f9a3eSAnup Patel 
233e8dcb61fSAtish Patra static phys_addr_t alloc_pte_late(uintptr_t va)
234e8dcb61fSAtish Patra {
235e8dcb61fSAtish Patra 	unsigned long vaddr;
236e8dcb61fSAtish Patra 
237e8dcb61fSAtish Patra 	vaddr = __get_free_page(GFP_KERNEL);
238e75e6bf4Szhouchuangao 	BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
239e75e6bf4Szhouchuangao 
240e8dcb61fSAtish Patra 	return __pa(vaddr);
241e8dcb61fSAtish Patra }
242e8dcb61fSAtish Patra 
243671f9a3eSAnup Patel static void __init create_pte_mapping(pte_t *ptep,
244671f9a3eSAnup Patel 				      uintptr_t va, phys_addr_t pa,
245671f9a3eSAnup Patel 				      phys_addr_t sz, pgprot_t prot)
246671f9a3eSAnup Patel {
247974b9b2cSMike Rapoport 	uintptr_t pte_idx = pte_index(va);
248671f9a3eSAnup Patel 
249671f9a3eSAnup Patel 	BUG_ON(sz != PAGE_SIZE);
250671f9a3eSAnup Patel 
251974b9b2cSMike Rapoport 	if (pte_none(ptep[pte_idx]))
252974b9b2cSMike Rapoport 		ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
253671f9a3eSAnup Patel }
254671f9a3eSAnup Patel 
255671f9a3eSAnup Patel #ifndef __PAGETABLE_PMD_FOLDED
256671f9a3eSAnup Patel 
257671f9a3eSAnup Patel pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
258671f9a3eSAnup Patel pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
2590f02de44SAlexandre Ghiti pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
2601074dd44SAnup Patel pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
261671f9a3eSAnup Patel 
262e8dcb61fSAtish Patra static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
263671f9a3eSAnup Patel {
264e8dcb61fSAtish Patra 	/* Before MMU is enabled */
265671f9a3eSAnup Patel 	return (pmd_t *)((uintptr_t)pa);
266671f9a3eSAnup Patel }
267e8dcb61fSAtish Patra 
268e8dcb61fSAtish Patra static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
269e8dcb61fSAtish Patra {
270e8dcb61fSAtish Patra 	clear_fixmap(FIX_PMD);
271e8dcb61fSAtish Patra 	return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
272671f9a3eSAnup Patel }
273671f9a3eSAnup Patel 
274e8dcb61fSAtish Patra static pmd_t *get_pmd_virt_late(phys_addr_t pa)
275e8dcb61fSAtish Patra {
276e8dcb61fSAtish Patra 	return (pmd_t *) __va(pa);
277e8dcb61fSAtish Patra }
278e8dcb61fSAtish Patra 
279e8dcb61fSAtish Patra static phys_addr_t __init alloc_pmd_early(uintptr_t va)
280671f9a3eSAnup Patel {
2812bfc6cd8SAlexandre Ghiti 	BUG_ON((va - kernel_virt_addr) >> PGDIR_SHIFT);
282671f9a3eSAnup Patel 
2830f02de44SAlexandre Ghiti 	return (uintptr_t)early_pmd;
284671f9a3eSAnup Patel }
285671f9a3eSAnup Patel 
286e8dcb61fSAtish Patra static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
287e8dcb61fSAtish Patra {
288e8dcb61fSAtish Patra 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
289e8dcb61fSAtish Patra }
290e8dcb61fSAtish Patra 
291e8dcb61fSAtish Patra static phys_addr_t alloc_pmd_late(uintptr_t va)
292e8dcb61fSAtish Patra {
293e8dcb61fSAtish Patra 	unsigned long vaddr;
294e8dcb61fSAtish Patra 
295e8dcb61fSAtish Patra 	vaddr = __get_free_page(GFP_KERNEL);
296e8dcb61fSAtish Patra 	BUG_ON(!vaddr);
297e8dcb61fSAtish Patra 	return __pa(vaddr);
298e8dcb61fSAtish Patra }
299e8dcb61fSAtish Patra 
300671f9a3eSAnup Patel static void __init create_pmd_mapping(pmd_t *pmdp,
301671f9a3eSAnup Patel 				      uintptr_t va, phys_addr_t pa,
302671f9a3eSAnup Patel 				      phys_addr_t sz, pgprot_t prot)
303671f9a3eSAnup Patel {
304671f9a3eSAnup Patel 	pte_t *ptep;
305671f9a3eSAnup Patel 	phys_addr_t pte_phys;
306974b9b2cSMike Rapoport 	uintptr_t pmd_idx = pmd_index(va);
307671f9a3eSAnup Patel 
308671f9a3eSAnup Patel 	if (sz == PMD_SIZE) {
309974b9b2cSMike Rapoport 		if (pmd_none(pmdp[pmd_idx]))
310974b9b2cSMike Rapoport 			pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
311671f9a3eSAnup Patel 		return;
312671f9a3eSAnup Patel 	}
313671f9a3eSAnup Patel 
314974b9b2cSMike Rapoport 	if (pmd_none(pmdp[pmd_idx])) {
315e8dcb61fSAtish Patra 		pte_phys = pt_ops.alloc_pte(va);
316974b9b2cSMike Rapoport 		pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
317e8dcb61fSAtish Patra 		ptep = pt_ops.get_pte_virt(pte_phys);
318671f9a3eSAnup Patel 		memset(ptep, 0, PAGE_SIZE);
319671f9a3eSAnup Patel 	} else {
320974b9b2cSMike Rapoport 		pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
321e8dcb61fSAtish Patra 		ptep = pt_ops.get_pte_virt(pte_phys);
322671f9a3eSAnup Patel 	}
323671f9a3eSAnup Patel 
324671f9a3eSAnup Patel 	create_pte_mapping(ptep, va, pa, sz, prot);
325671f9a3eSAnup Patel }
326671f9a3eSAnup Patel 
327671f9a3eSAnup Patel #define pgd_next_t		pmd_t
328e8dcb61fSAtish Patra #define alloc_pgd_next(__va)	pt_ops.alloc_pmd(__va)
329e8dcb61fSAtish Patra #define get_pgd_next_virt(__pa)	pt_ops.get_pmd_virt(__pa)
330671f9a3eSAnup Patel #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot)	\
331671f9a3eSAnup Patel 	create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
332671f9a3eSAnup Patel #define fixmap_pgd_next		fixmap_pmd
333671f9a3eSAnup Patel #else
334671f9a3eSAnup Patel #define pgd_next_t		pte_t
335e8dcb61fSAtish Patra #define alloc_pgd_next(__va)	pt_ops.alloc_pte(__va)
336e8dcb61fSAtish Patra #define get_pgd_next_virt(__pa)	pt_ops.get_pte_virt(__pa)
337671f9a3eSAnup Patel #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot)	\
338671f9a3eSAnup Patel 	create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
339671f9a3eSAnup Patel #define fixmap_pgd_next		fixmap_pte
340671f9a3eSAnup Patel #endif
341671f9a3eSAnup Patel 
342b91540d5SAtish Patra void __init create_pgd_mapping(pgd_t *pgdp,
343671f9a3eSAnup Patel 				      uintptr_t va, phys_addr_t pa,
344671f9a3eSAnup Patel 				      phys_addr_t sz, pgprot_t prot)
345671f9a3eSAnup Patel {
346671f9a3eSAnup Patel 	pgd_next_t *nextp;
347671f9a3eSAnup Patel 	phys_addr_t next_phys;
348974b9b2cSMike Rapoport 	uintptr_t pgd_idx = pgd_index(va);
349671f9a3eSAnup Patel 
350671f9a3eSAnup Patel 	if (sz == PGDIR_SIZE) {
351974b9b2cSMike Rapoport 		if (pgd_val(pgdp[pgd_idx]) == 0)
352974b9b2cSMike Rapoport 			pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
353671f9a3eSAnup Patel 		return;
354671f9a3eSAnup Patel 	}
355671f9a3eSAnup Patel 
356974b9b2cSMike Rapoport 	if (pgd_val(pgdp[pgd_idx]) == 0) {
357671f9a3eSAnup Patel 		next_phys = alloc_pgd_next(va);
358974b9b2cSMike Rapoport 		pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
359671f9a3eSAnup Patel 		nextp = get_pgd_next_virt(next_phys);
360671f9a3eSAnup Patel 		memset(nextp, 0, PAGE_SIZE);
361671f9a3eSAnup Patel 	} else {
362974b9b2cSMike Rapoport 		next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
363671f9a3eSAnup Patel 		nextp = get_pgd_next_virt(next_phys);
364671f9a3eSAnup Patel 	}
365671f9a3eSAnup Patel 
366671f9a3eSAnup Patel 	create_pgd_next_mapping(nextp, va, pa, sz, prot);
367671f9a3eSAnup Patel }
368671f9a3eSAnup Patel 
369671f9a3eSAnup Patel static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
370671f9a3eSAnup Patel {
3710fdc636cSZong Li 	/* Upgrade to PMD_SIZE mappings whenever possible */
3720fdc636cSZong Li 	if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
3730fdc636cSZong Li 		return PAGE_SIZE;
374671f9a3eSAnup Patel 
3750fdc636cSZong Li 	return PMD_SIZE;
376671f9a3eSAnup Patel }
377671f9a3eSAnup Patel 
378387181dcSAnup Patel /*
379387181dcSAnup Patel  * setup_vm() is called from head.S with MMU-off.
380387181dcSAnup Patel  *
381387181dcSAnup Patel  * Following requirements should be honoured for setup_vm() to work
382387181dcSAnup Patel  * correctly:
383387181dcSAnup Patel  * 1) It should use PC-relative addressing for accessing kernel symbols.
384387181dcSAnup Patel  *    To achieve this we always use GCC cmodel=medany.
385387181dcSAnup Patel  * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
386387181dcSAnup Patel  *    so disable compiler instrumentation when FTRACE is enabled.
387387181dcSAnup Patel  *
388387181dcSAnup Patel  * Currently, the above requirements are honoured by using custom CFLAGS
389387181dcSAnup Patel  * for init.o in mm/Makefile.
390387181dcSAnup Patel  */
391387181dcSAnup Patel 
392387181dcSAnup Patel #ifndef __riscv_cmodel_medany
3936a527b67SPaul Walmsley #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
394387181dcSAnup Patel #endif
395387181dcSAnup Patel 
3962bfc6cd8SAlexandre Ghiti uintptr_t load_pa, load_sz;
3972bfc6cd8SAlexandre Ghiti 
3982bfc6cd8SAlexandre Ghiti static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size)
3992bfc6cd8SAlexandre Ghiti {
4002bfc6cd8SAlexandre Ghiti 	uintptr_t va, end_va;
4012bfc6cd8SAlexandre Ghiti 
4022bfc6cd8SAlexandre Ghiti 	end_va = kernel_virt_addr + load_sz;
4032bfc6cd8SAlexandre Ghiti 	for (va = kernel_virt_addr; va < end_va; va += map_size)
4042bfc6cd8SAlexandre Ghiti 		create_pgd_mapping(pgdir, va,
4052bfc6cd8SAlexandre Ghiti 				   load_pa + (va - kernel_virt_addr),
4062bfc6cd8SAlexandre Ghiti 				   map_size, PAGE_KERNEL_EXEC);
4072bfc6cd8SAlexandre Ghiti }
4082bfc6cd8SAlexandre Ghiti 
409671f9a3eSAnup Patel asmlinkage void __init setup_vm(uintptr_t dtb_pa)
4106f1e9e94SAnup Patel {
4112bfc6cd8SAlexandre Ghiti 	uintptr_t pa;
4120f02de44SAlexandre Ghiti 	uintptr_t map_size;
4136262f661SAtish Patra #ifndef __PAGETABLE_PMD_FOLDED
4146262f661SAtish Patra 	pmd_t fix_bmap_spmd, fix_bmap_epmd;
4156262f661SAtish Patra #endif
4162bfc6cd8SAlexandre Ghiti 	load_pa = (uintptr_t)(&_start);
4172bfc6cd8SAlexandre Ghiti 	load_sz = (uintptr_t)(&_end) - load_pa;
4186f1e9e94SAnup Patel 
419671f9a3eSAnup Patel 	va_pa_offset = PAGE_OFFSET - load_pa;
4202bfc6cd8SAlexandre Ghiti #ifdef CONFIG_64BIT
4212bfc6cd8SAlexandre Ghiti 	va_kernel_pa_offset = kernel_virt_addr - load_pa;
4222bfc6cd8SAlexandre Ghiti #endif
4232bfc6cd8SAlexandre Ghiti 
424671f9a3eSAnup Patel 	pfn_base = PFN_DOWN(load_pa);
425671f9a3eSAnup Patel 
426671f9a3eSAnup Patel 	/*
427671f9a3eSAnup Patel 	 * Enforce boot alignment requirements of RV32 and
428671f9a3eSAnup Patel 	 * RV64 by only allowing PMD or PGD mappings.
429671f9a3eSAnup Patel 	 */
4300f02de44SAlexandre Ghiti 	map_size = PMD_SIZE;
4316f1e9e94SAnup Patel 
4326f1e9e94SAnup Patel 	/* Sanity check alignment and size */
4336f1e9e94SAnup Patel 	BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
434671f9a3eSAnup Patel 	BUG_ON((load_pa % map_size) != 0);
435671f9a3eSAnup Patel 
436e8dcb61fSAtish Patra 	pt_ops.alloc_pte = alloc_pte_early;
437e8dcb61fSAtish Patra 	pt_ops.get_pte_virt = get_pte_virt_early;
438e8dcb61fSAtish Patra #ifndef __PAGETABLE_PMD_FOLDED
439e8dcb61fSAtish Patra 	pt_ops.alloc_pmd = alloc_pmd_early;
440e8dcb61fSAtish Patra 	pt_ops.get_pmd_virt = get_pmd_virt_early;
441e8dcb61fSAtish Patra #endif
442671f9a3eSAnup Patel 	/* Setup early PGD for fixmap */
443671f9a3eSAnup Patel 	create_pgd_mapping(early_pg_dir, FIXADDR_START,
444671f9a3eSAnup Patel 			   (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
4456f1e9e94SAnup Patel 
4466f1e9e94SAnup Patel #ifndef __PAGETABLE_PMD_FOLDED
447671f9a3eSAnup Patel 	/* Setup fixmap PMD */
448671f9a3eSAnup Patel 	create_pmd_mapping(fixmap_pmd, FIXADDR_START,
449671f9a3eSAnup Patel 			   (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
450671f9a3eSAnup Patel 	/* Setup trampoline PGD and PMD */
4512bfc6cd8SAlexandre Ghiti 	create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr,
452671f9a3eSAnup Patel 			   (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
4532bfc6cd8SAlexandre Ghiti 	create_pmd_mapping(trampoline_pmd, kernel_virt_addr,
454671f9a3eSAnup Patel 			   load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
4556f1e9e94SAnup Patel #else
456671f9a3eSAnup Patel 	/* Setup trampoline PGD */
4572bfc6cd8SAlexandre Ghiti 	create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr,
458671f9a3eSAnup Patel 			   load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
459671f9a3eSAnup Patel #endif
4606f1e9e94SAnup Patel 
461671f9a3eSAnup Patel 	/*
4622bfc6cd8SAlexandre Ghiti 	 * Setup early PGD covering entire kernel which will allow
463671f9a3eSAnup Patel 	 * us to reach paging_init(). We map all memory banks later
464671f9a3eSAnup Patel 	 * in setup_vm_final() below.
465671f9a3eSAnup Patel 	 */
4662bfc6cd8SAlexandre Ghiti 	create_kernel_page_table(early_pg_dir, map_size);
467f2c17aabSAnup Patel 
4681074dd44SAnup Patel #ifndef __PAGETABLE_PMD_FOLDED
4691074dd44SAnup Patel 	/* Setup early PMD for DTB */
4701074dd44SAnup Patel 	create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
4711074dd44SAnup Patel 			   (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE);
472f105aa94SVitaly Wool #ifndef CONFIG_BUILTIN_DTB
4731074dd44SAnup Patel 	/* Create two consecutive PMD mappings for FDT early scan */
4741074dd44SAnup Patel 	pa = dtb_pa & ~(PMD_SIZE - 1);
4751074dd44SAnup Patel 	create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
4761074dd44SAnup Patel 			   pa, PMD_SIZE, PAGE_KERNEL);
4771074dd44SAnup Patel 	create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
4781074dd44SAnup Patel 			   pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
4791074dd44SAnup Patel 	dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
480f105aa94SVitaly Wool #else /* CONFIG_BUILTIN_DTB */
4812bfc6cd8SAlexandre Ghiti #ifdef CONFIG_64BIT
4822bfc6cd8SAlexandre Ghiti 	/*
4832bfc6cd8SAlexandre Ghiti 	 * __va can't be used since it would return a linear mapping address
4842bfc6cd8SAlexandre Ghiti 	 * whereas dtb_early_va will be used before setup_vm_final installs
4852bfc6cd8SAlexandre Ghiti 	 * the linear mapping.
4862bfc6cd8SAlexandre Ghiti 	 */
4872bfc6cd8SAlexandre Ghiti 	dtb_early_va = kernel_mapping_pa_to_va(dtb_pa);
4882bfc6cd8SAlexandre Ghiti #else
489f105aa94SVitaly Wool 	dtb_early_va = __va(dtb_pa);
4902bfc6cd8SAlexandre Ghiti #endif /* CONFIG_64BIT */
491f105aa94SVitaly Wool #endif /* CONFIG_BUILTIN_DTB */
4921074dd44SAnup Patel #else
493f105aa94SVitaly Wool #ifndef CONFIG_BUILTIN_DTB
4948f3a2b4aSAnup Patel 	/* Create two consecutive PGD mappings for FDT early scan */
4958f3a2b4aSAnup Patel 	pa = dtb_pa & ~(PGDIR_SIZE - 1);
4968f3a2b4aSAnup Patel 	create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
4978f3a2b4aSAnup Patel 			   pa, PGDIR_SIZE, PAGE_KERNEL);
4988f3a2b4aSAnup Patel 	create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE,
4998f3a2b4aSAnup Patel 			   pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL);
5008f3a2b4aSAnup Patel 	dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1));
501f105aa94SVitaly Wool #else /* CONFIG_BUILTIN_DTB */
5022bfc6cd8SAlexandre Ghiti #ifdef CONFIG_64BIT
5032bfc6cd8SAlexandre Ghiti 	dtb_early_va = kernel_mapping_pa_to_va(dtb_pa);
5042bfc6cd8SAlexandre Ghiti #else
505f105aa94SVitaly Wool 	dtb_early_va = __va(dtb_pa);
5062bfc6cd8SAlexandre Ghiti #endif /* CONFIG_64BIT */
507f105aa94SVitaly Wool #endif /* CONFIG_BUILTIN_DTB */
5081074dd44SAnup Patel #endif
509922b0375SAlbert Ou 	dtb_early_pa = dtb_pa;
5106262f661SAtish Patra 
5116262f661SAtish Patra 	/*
5126262f661SAtish Patra 	 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
5136262f661SAtish Patra 	 * range can not span multiple pmds.
5146262f661SAtish Patra 	 */
5156262f661SAtish Patra 	BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
5166262f661SAtish Patra 		     != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
5176262f661SAtish Patra 
5186262f661SAtish Patra #ifndef __PAGETABLE_PMD_FOLDED
5196262f661SAtish Patra 	/*
5206262f661SAtish Patra 	 * Early ioremap fixmap is already created as it lies within first 2MB
5216262f661SAtish Patra 	 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
5226262f661SAtish Patra 	 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
5236262f661SAtish Patra 	 * the user if not.
5246262f661SAtish Patra 	 */
5256262f661SAtish Patra 	fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
5266262f661SAtish Patra 	fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
5276262f661SAtish Patra 	if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
5286262f661SAtish Patra 		WARN_ON(1);
5296262f661SAtish Patra 		pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
5306262f661SAtish Patra 			pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
5316262f661SAtish Patra 		pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
5326262f661SAtish Patra 			fix_to_virt(FIX_BTMAP_BEGIN));
5336262f661SAtish Patra 		pr_warn("fix_to_virt(FIX_BTMAP_END):   %08lx\n",
5346262f661SAtish Patra 			fix_to_virt(FIX_BTMAP_END));
5356262f661SAtish Patra 
5366262f661SAtish Patra 		pr_warn("FIX_BTMAP_END:       %d\n", FIX_BTMAP_END);
5376262f661SAtish Patra 		pr_warn("FIX_BTMAP_BEGIN:     %d\n", FIX_BTMAP_BEGIN);
5386262f661SAtish Patra 	}
5396262f661SAtish Patra #endif
5406f1e9e94SAnup Patel }
541f2c17aabSAnup Patel 
5422bfc6cd8SAlexandre Ghiti #ifdef CONFIG_64BIT
5432bfc6cd8SAlexandre Ghiti void protect_kernel_linear_mapping_text_rodata(void)
5442bfc6cd8SAlexandre Ghiti {
5452bfc6cd8SAlexandre Ghiti 	unsigned long text_start = (unsigned long)lm_alias(_start);
5462bfc6cd8SAlexandre Ghiti 	unsigned long init_text_start = (unsigned long)lm_alias(__init_text_begin);
5472bfc6cd8SAlexandre Ghiti 	unsigned long rodata_start = (unsigned long)lm_alias(__start_rodata);
5482bfc6cd8SAlexandre Ghiti 	unsigned long data_start = (unsigned long)lm_alias(_data);
5492bfc6cd8SAlexandre Ghiti 
5502bfc6cd8SAlexandre Ghiti 	set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
5512bfc6cd8SAlexandre Ghiti 	set_memory_nx(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
5522bfc6cd8SAlexandre Ghiti 
5532bfc6cd8SAlexandre Ghiti 	set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
5542bfc6cd8SAlexandre Ghiti 	set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
5552bfc6cd8SAlexandre Ghiti }
5562bfc6cd8SAlexandre Ghiti #endif
5572bfc6cd8SAlexandre Ghiti 
558671f9a3eSAnup Patel static void __init setup_vm_final(void)
559671f9a3eSAnup Patel {
560671f9a3eSAnup Patel 	uintptr_t va, map_size;
561671f9a3eSAnup Patel 	phys_addr_t pa, start, end;
562b10d6bcaSMike Rapoport 	u64 i;
563671f9a3eSAnup Patel 
564e8dcb61fSAtish Patra 	/**
565e8dcb61fSAtish Patra 	 * MMU is enabled at this point. But page table setup is not complete yet.
566e8dcb61fSAtish Patra 	 * fixmap page table alloc functions should be used at this point
567e8dcb61fSAtish Patra 	 */
568e8dcb61fSAtish Patra 	pt_ops.alloc_pte = alloc_pte_fixmap;
569e8dcb61fSAtish Patra 	pt_ops.get_pte_virt = get_pte_virt_fixmap;
570e8dcb61fSAtish Patra #ifndef __PAGETABLE_PMD_FOLDED
571e8dcb61fSAtish Patra 	pt_ops.alloc_pmd = alloc_pmd_fixmap;
572e8dcb61fSAtish Patra 	pt_ops.get_pmd_virt = get_pmd_virt_fixmap;
573e8dcb61fSAtish Patra #endif
574671f9a3eSAnup Patel 	/* Setup swapper PGD for fixmap */
575671f9a3eSAnup Patel 	create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
576ac51e005SZong Li 			   __pa_symbol(fixmap_pgd_next),
577671f9a3eSAnup Patel 			   PGDIR_SIZE, PAGE_TABLE);
578671f9a3eSAnup Patel 
5792bfc6cd8SAlexandre Ghiti 	/* Map all memory banks in the linear mapping */
580b10d6bcaSMike Rapoport 	for_each_mem_range(i, &start, &end) {
581671f9a3eSAnup Patel 		if (start >= end)
582671f9a3eSAnup Patel 			break;
583671f9a3eSAnup Patel 		if (start <= __pa(PAGE_OFFSET) &&
584671f9a3eSAnup Patel 		    __pa(PAGE_OFFSET) < end)
585671f9a3eSAnup Patel 			start = __pa(PAGE_OFFSET);
586671f9a3eSAnup Patel 
587671f9a3eSAnup Patel 		map_size = best_map_size(start, end - start);
588671f9a3eSAnup Patel 		for (pa = start; pa < end; pa += map_size) {
589671f9a3eSAnup Patel 			va = (uintptr_t)__va(pa);
590671f9a3eSAnup Patel 			create_pgd_mapping(swapper_pg_dir, va, pa,
5912bfc6cd8SAlexandre Ghiti 					   map_size,
5922bfc6cd8SAlexandre Ghiti #ifdef CONFIG_64BIT
5932bfc6cd8SAlexandre Ghiti 					   PAGE_KERNEL
5942bfc6cd8SAlexandre Ghiti #else
5952bfc6cd8SAlexandre Ghiti 					   PAGE_KERNEL_EXEC
5962bfc6cd8SAlexandre Ghiti #endif
5972bfc6cd8SAlexandre Ghiti 					);
5982bfc6cd8SAlexandre Ghiti 
599671f9a3eSAnup Patel 		}
600671f9a3eSAnup Patel 	}
601671f9a3eSAnup Patel 
6022bfc6cd8SAlexandre Ghiti #ifdef CONFIG_64BIT
6032bfc6cd8SAlexandre Ghiti 	/* Map the kernel */
6042bfc6cd8SAlexandre Ghiti 	create_kernel_page_table(swapper_pg_dir, PMD_SIZE);
6052bfc6cd8SAlexandre Ghiti #endif
6062bfc6cd8SAlexandre Ghiti 
607671f9a3eSAnup Patel 	/* Clear fixmap PTE and PMD mappings */
608671f9a3eSAnup Patel 	clear_fixmap(FIX_PTE);
609671f9a3eSAnup Patel 	clear_fixmap(FIX_PMD);
610671f9a3eSAnup Patel 
611671f9a3eSAnup Patel 	/* Move to swapper page table */
612ac51e005SZong Li 	csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
613671f9a3eSAnup Patel 	local_flush_tlb_all();
614e8dcb61fSAtish Patra 
615e8dcb61fSAtish Patra 	/* generic page allocation functions must be used to setup page table */
616e8dcb61fSAtish Patra 	pt_ops.alloc_pte = alloc_pte_late;
617e8dcb61fSAtish Patra 	pt_ops.get_pte_virt = get_pte_virt_late;
618e8dcb61fSAtish Patra #ifndef __PAGETABLE_PMD_FOLDED
619e8dcb61fSAtish Patra 	pt_ops.alloc_pmd = alloc_pmd_late;
620e8dcb61fSAtish Patra 	pt_ops.get_pmd_virt = get_pmd_virt_late;
621e8dcb61fSAtish Patra #endif
622671f9a3eSAnup Patel }
6236bd33e1eSChristoph Hellwig #else
6246bd33e1eSChristoph Hellwig asmlinkage void __init setup_vm(uintptr_t dtb_pa)
6256bd33e1eSChristoph Hellwig {
6266bd33e1eSChristoph Hellwig 	dtb_early_va = (void *)dtb_pa;
627a78c6f59SAtish Patra 	dtb_early_pa = dtb_pa;
6286bd33e1eSChristoph Hellwig }
6296bd33e1eSChristoph Hellwig 
6306bd33e1eSChristoph Hellwig static inline void setup_vm_final(void)
6316bd33e1eSChristoph Hellwig {
6326bd33e1eSChristoph Hellwig }
6336bd33e1eSChristoph Hellwig #endif /* CONFIG_MMU */
634671f9a3eSAnup Patel 
635d27c3c90SZong Li #ifdef CONFIG_STRICT_KERNEL_RWX
6361987501bSJisheng Zhang void __init protect_kernel_text_data(void)
637d27c3c90SZong Li {
63819a00869SAtish Patra 	unsigned long text_start = (unsigned long)_start;
63919a00869SAtish Patra 	unsigned long init_text_start = (unsigned long)__init_text_begin;
64019a00869SAtish Patra 	unsigned long init_data_start = (unsigned long)__init_data_begin;
641d27c3c90SZong Li 	unsigned long rodata_start = (unsigned long)__start_rodata;
642d27c3c90SZong Li 	unsigned long data_start = (unsigned long)_data;
643d27c3c90SZong Li 	unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
644d27c3c90SZong Li 
64519a00869SAtish Patra 	set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
64619a00869SAtish Patra 	set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT);
64719a00869SAtish Patra 	set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT);
64819a00869SAtish Patra 	/* rodata section is marked readonly in mark_rodata_ro */
649d27c3c90SZong Li 	set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
650d27c3c90SZong Li 	set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
65119a00869SAtish Patra }
65219a00869SAtish Patra 
65319a00869SAtish Patra void mark_rodata_ro(void)
65419a00869SAtish Patra {
65519a00869SAtish Patra 	unsigned long rodata_start = (unsigned long)__start_rodata;
65619a00869SAtish Patra 	unsigned long data_start = (unsigned long)_data;
65719a00869SAtish Patra 
65819a00869SAtish Patra 	set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
659b422d28bSZong Li 
660b422d28bSZong Li 	debug_checkwx();
661d27c3c90SZong Li }
662d27c3c90SZong Li #endif
663d27c3c90SZong Li 
664*e53d2818SNick Kossifidis #ifdef CONFIG_KEXEC_CORE
665*e53d2818SNick Kossifidis /*
666*e53d2818SNick Kossifidis  * reserve_crashkernel() - reserves memory for crash kernel
667*e53d2818SNick Kossifidis  *
668*e53d2818SNick Kossifidis  * This function reserves memory area given in "crashkernel=" kernel command
669*e53d2818SNick Kossifidis  * line parameter. The memory reserved is used by dump capture kernel when
670*e53d2818SNick Kossifidis  * primary kernel is crashing.
671*e53d2818SNick Kossifidis  */
672*e53d2818SNick Kossifidis static void __init reserve_crashkernel(void)
673*e53d2818SNick Kossifidis {
674*e53d2818SNick Kossifidis 	unsigned long long crash_base = 0;
675*e53d2818SNick Kossifidis 	unsigned long long crash_size = 0;
676*e53d2818SNick Kossifidis 	unsigned long search_start = memblock_start_of_DRAM();
677*e53d2818SNick Kossifidis 	unsigned long search_end = memblock_end_of_DRAM();
678*e53d2818SNick Kossifidis 
679*e53d2818SNick Kossifidis 	int ret = 0;
680*e53d2818SNick Kossifidis 
681*e53d2818SNick Kossifidis 	ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
682*e53d2818SNick Kossifidis 				&crash_size, &crash_base);
683*e53d2818SNick Kossifidis 	if (ret || !crash_size)
684*e53d2818SNick Kossifidis 		return;
685*e53d2818SNick Kossifidis 
686*e53d2818SNick Kossifidis 	crash_size = PAGE_ALIGN(crash_size);
687*e53d2818SNick Kossifidis 
688*e53d2818SNick Kossifidis 	if (crash_base == 0) {
689*e53d2818SNick Kossifidis 		/*
690*e53d2818SNick Kossifidis 		 * Current riscv boot protocol requires 2MB alignment for
691*e53d2818SNick Kossifidis 		 * RV64 and 4MB alignment for RV32 (hugepage size)
692*e53d2818SNick Kossifidis 		 */
693*e53d2818SNick Kossifidis 		crash_base = memblock_find_in_range(search_start, search_end,
694*e53d2818SNick Kossifidis 						    crash_size, PMD_SIZE);
695*e53d2818SNick Kossifidis 
696*e53d2818SNick Kossifidis 		if (crash_base == 0) {
697*e53d2818SNick Kossifidis 			pr_warn("crashkernel: couldn't allocate %lldKB\n",
698*e53d2818SNick Kossifidis 				crash_size >> 10);
699*e53d2818SNick Kossifidis 			return;
700*e53d2818SNick Kossifidis 		}
701*e53d2818SNick Kossifidis 	} else {
702*e53d2818SNick Kossifidis 		/* User specifies base address explicitly. */
703*e53d2818SNick Kossifidis 		if (!memblock_is_region_memory(crash_base, crash_size)) {
704*e53d2818SNick Kossifidis 			pr_warn("crashkernel: requested region is not memory\n");
705*e53d2818SNick Kossifidis 			return;
706*e53d2818SNick Kossifidis 		}
707*e53d2818SNick Kossifidis 
708*e53d2818SNick Kossifidis 		if (memblock_is_region_reserved(crash_base, crash_size)) {
709*e53d2818SNick Kossifidis 			pr_warn("crashkernel: requested region is reserved\n");
710*e53d2818SNick Kossifidis 			return;
711*e53d2818SNick Kossifidis 		}
712*e53d2818SNick Kossifidis 
713*e53d2818SNick Kossifidis 
714*e53d2818SNick Kossifidis 		if (!IS_ALIGNED(crash_base, PMD_SIZE)) {
715*e53d2818SNick Kossifidis 			pr_warn("crashkernel: requested region is misaligned\n");
716*e53d2818SNick Kossifidis 			return;
717*e53d2818SNick Kossifidis 		}
718*e53d2818SNick Kossifidis 	}
719*e53d2818SNick Kossifidis 	memblock_reserve(crash_base, crash_size);
720*e53d2818SNick Kossifidis 
721*e53d2818SNick Kossifidis 	pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
722*e53d2818SNick Kossifidis 		crash_base, crash_base + crash_size, crash_size >> 20);
723*e53d2818SNick Kossifidis 
724*e53d2818SNick Kossifidis 	crashk_res.start = crash_base;
725*e53d2818SNick Kossifidis 	crashk_res.end = crash_base + crash_size - 1;
726*e53d2818SNick Kossifidis }
727*e53d2818SNick Kossifidis #endif /* CONFIG_KEXEC_CORE */
728*e53d2818SNick Kossifidis 
729671f9a3eSAnup Patel void __init paging_init(void)
730671f9a3eSAnup Patel {
731671f9a3eSAnup Patel 	setup_vm_final();
732671f9a3eSAnup Patel 	setup_zero_page();
733cbd34f4bSAtish Patra }
734cbd34f4bSAtish Patra 
735cbd34f4bSAtish Patra void __init misc_mem_init(void)
736cbd34f4bSAtish Patra {
737f6e5aedfSKefeng Wang 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
7384f0e8eefSAtish Patra 	arch_numa_init();
739cbd34f4bSAtish Patra 	sparse_init();
740671f9a3eSAnup Patel 	zone_sizes_init();
741*e53d2818SNick Kossifidis #ifdef CONFIG_KEXEC_CORE
742*e53d2818SNick Kossifidis 	reserve_crashkernel();
743*e53d2818SNick Kossifidis #endif
7444f0e8eefSAtish Patra 	memblock_dump_all();
7456f1e9e94SAnup Patel }
746d95f1a54SLogan Gunthorpe 
7479fe57d8cSKefeng Wang #ifdef CONFIG_SPARSEMEM_VMEMMAP
748d95f1a54SLogan Gunthorpe int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
749d95f1a54SLogan Gunthorpe 			       struct vmem_altmap *altmap)
750d95f1a54SLogan Gunthorpe {
7511d9cfee7SAnshuman Khandual 	return vmemmap_populate_basepages(start, end, node, NULL);
752d95f1a54SLogan Gunthorpe }
753d95f1a54SLogan Gunthorpe #endif
754