1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP initialisation and IPI support 4 * Based on arch/arm64/kernel/smp.c 5 * 6 * Copyright (C) 2012 ARM Ltd. 7 * Copyright (C) 2015 Regents of the University of California 8 * Copyright (C) 2017 SiFive 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/arch_topology.h> 13 #include <linux/module.h> 14 #include <linux/init.h> 15 #include <linux/kernel.h> 16 #include <linux/mm.h> 17 #include <linux/sched.h> 18 #include <linux/kernel_stat.h> 19 #include <linux/notifier.h> 20 #include <linux/cpu.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/err.h> 24 #include <linux/irq.h> 25 #include <linux/of.h> 26 #include <linux/sched/task_stack.h> 27 #include <linux/sched/mm.h> 28 #include <asm/cpu_ops.h> 29 #include <asm/cpufeature.h> 30 #include <asm/irq.h> 31 #include <asm/mmu_context.h> 32 #include <asm/numa.h> 33 #include <asm/tlbflush.h> 34 #include <asm/sections.h> 35 #include <asm/smp.h> 36 #include <uapi/asm/hwcap.h> 37 #include <asm/vector.h> 38 39 #include "head.h" 40 41 static DECLARE_COMPLETION(cpu_running); 42 43 void __init smp_prepare_boot_cpu(void) 44 { 45 } 46 47 void __init smp_prepare_cpus(unsigned int max_cpus) 48 { 49 int cpuid; 50 int ret; 51 unsigned int curr_cpuid; 52 53 init_cpu_topology(); 54 55 curr_cpuid = smp_processor_id(); 56 store_cpu_topology(curr_cpuid); 57 numa_store_cpu_info(curr_cpuid); 58 numa_add_cpu(curr_cpuid); 59 60 /* This covers non-smp usecase mandated by "nosmp" option */ 61 if (max_cpus == 0) 62 return; 63 64 for_each_possible_cpu(cpuid) { 65 if (cpuid == curr_cpuid) 66 continue; 67 if (cpu_ops[cpuid]->cpu_prepare) { 68 ret = cpu_ops[cpuid]->cpu_prepare(cpuid); 69 if (ret) 70 continue; 71 } 72 set_cpu_present(cpuid, true); 73 numa_store_cpu_info(cpuid); 74 } 75 } 76 77 #ifdef CONFIG_ACPI 78 static unsigned int cpu_count = 1; 79 80 static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const unsigned long end) 81 { 82 unsigned long hart; 83 static bool found_boot_cpu; 84 struct acpi_madt_rintc *processor = (struct acpi_madt_rintc *)header; 85 86 /* 87 * Each RINTC structure in MADT will have a flag. If ACPI_MADT_ENABLED 88 * bit in the flag is not enabled, it means OS should not try to enable 89 * the cpu to which RINTC belongs. 90 */ 91 if (!(processor->flags & ACPI_MADT_ENABLED)) 92 return 0; 93 94 if (BAD_MADT_ENTRY(processor, end)) 95 return -EINVAL; 96 97 acpi_table_print_madt_entry(&header->common); 98 99 hart = processor->hart_id; 100 if (hart == INVALID_HARTID) { 101 pr_warn("Invalid hartid\n"); 102 return 0; 103 } 104 105 if (hart == cpuid_to_hartid_map(0)) { 106 BUG_ON(found_boot_cpu); 107 found_boot_cpu = true; 108 early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count)); 109 return 0; 110 } 111 112 if (cpu_count >= NR_CPUS) { 113 pr_warn("NR_CPUS is too small for the number of ACPI tables.\n"); 114 return 0; 115 } 116 117 cpuid_to_hartid_map(cpu_count) = hart; 118 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count)); 119 cpu_count++; 120 121 return 0; 122 } 123 124 static void __init acpi_parse_and_init_cpus(void) 125 { 126 int cpuid; 127 128 cpu_set_ops(0); 129 130 acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_rintc, 0); 131 132 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 133 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { 134 cpu_set_ops(cpuid); 135 set_cpu_possible(cpuid, true); 136 } 137 } 138 } 139 #else 140 #define acpi_parse_and_init_cpus(...) do { } while (0) 141 #endif 142 143 static void __init of_parse_and_init_cpus(void) 144 { 145 struct device_node *dn; 146 unsigned long hart; 147 bool found_boot_cpu = false; 148 int cpuid = 1; 149 int rc; 150 151 cpu_set_ops(0); 152 153 for_each_of_cpu_node(dn) { 154 rc = riscv_early_of_processor_hartid(dn, &hart); 155 if (rc < 0) 156 continue; 157 158 if (hart == cpuid_to_hartid_map(0)) { 159 BUG_ON(found_boot_cpu); 160 found_boot_cpu = 1; 161 early_map_cpu_to_node(0, of_node_to_nid(dn)); 162 continue; 163 } 164 if (cpuid >= NR_CPUS) { 165 pr_warn("Invalid cpuid [%d] for hartid [%lu]\n", 166 cpuid, hart); 167 continue; 168 } 169 170 cpuid_to_hartid_map(cpuid) = hart; 171 early_map_cpu_to_node(cpuid, of_node_to_nid(dn)); 172 cpuid++; 173 } 174 175 BUG_ON(!found_boot_cpu); 176 177 if (cpuid > nr_cpu_ids) 178 pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n", 179 cpuid, nr_cpu_ids); 180 181 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 182 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { 183 cpu_set_ops(cpuid); 184 set_cpu_possible(cpuid, true); 185 } 186 } 187 } 188 189 void __init setup_smp(void) 190 { 191 if (acpi_disabled) 192 of_parse_and_init_cpus(); 193 else 194 acpi_parse_and_init_cpus(); 195 } 196 197 static int start_secondary_cpu(int cpu, struct task_struct *tidle) 198 { 199 if (cpu_ops[cpu]->cpu_start) 200 return cpu_ops[cpu]->cpu_start(cpu, tidle); 201 202 return -EOPNOTSUPP; 203 } 204 205 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 206 { 207 int ret = 0; 208 tidle->thread_info.cpu = cpu; 209 210 ret = start_secondary_cpu(cpu, tidle); 211 if (!ret) { 212 wait_for_completion_timeout(&cpu_running, 213 msecs_to_jiffies(1000)); 214 215 if (!cpu_online(cpu)) { 216 pr_crit("CPU%u: failed to come online\n", cpu); 217 ret = -EIO; 218 } 219 } else { 220 pr_crit("CPU%u: failed to start\n", cpu); 221 } 222 223 return ret; 224 } 225 226 void __init smp_cpus_done(unsigned int max_cpus) 227 { 228 } 229 230 /* 231 * C entry point for a secondary processor. 232 */ 233 asmlinkage __visible void smp_callin(void) 234 { 235 struct mm_struct *mm = &init_mm; 236 unsigned int curr_cpuid = smp_processor_id(); 237 238 /* All kernel threads share the same mm context. */ 239 mmgrab(mm); 240 current->active_mm = mm; 241 242 store_cpu_topology(curr_cpuid); 243 notify_cpu_starting(curr_cpuid); 244 245 riscv_ipi_enable(); 246 247 numa_add_cpu(curr_cpuid); 248 set_cpu_online(curr_cpuid, 1); 249 check_unaligned_access(curr_cpuid); 250 251 if (has_vector()) { 252 if (riscv_v_setup_vsize()) 253 elf_hwcap &= ~COMPAT_HWCAP_ISA_V; 254 } 255 256 /* 257 * Remote TLB flushes are ignored while the CPU is offline, so emit 258 * a local TLB flush right now just in case. 259 */ 260 local_flush_tlb_all(); 261 complete(&cpu_running); 262 /* 263 * Disable preemption before enabling interrupts, so we don't try to 264 * schedule a CPU that hasn't actually started yet. 265 */ 266 local_irq_enable(); 267 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 268 } 269