1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP initialisation and IPI support 4 * Based on arch/arm64/kernel/smp.c 5 * 6 * Copyright (C) 2012 ARM Ltd. 7 * Copyright (C) 2015 Regents of the University of California 8 * Copyright (C) 2017 SiFive 9 */ 10 11 #include <linux/arch_topology.h> 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/kernel.h> 15 #include <linux/mm.h> 16 #include <linux/sched.h> 17 #include <linux/kernel_stat.h> 18 #include <linux/notifier.h> 19 #include <linux/cpu.h> 20 #include <linux/percpu.h> 21 #include <linux/delay.h> 22 #include <linux/err.h> 23 #include <linux/irq.h> 24 #include <linux/of.h> 25 #include <linux/sched/task_stack.h> 26 #include <linux/sched/mm.h> 27 #include <asm/irq.h> 28 #include <asm/mmu_context.h> 29 #include <asm/tlbflush.h> 30 #include <asm/sections.h> 31 #include <asm/sbi.h> 32 33 void *__cpu_up_stack_pointer[NR_CPUS]; 34 void *__cpu_up_task_pointer[NR_CPUS]; 35 static DECLARE_COMPLETION(cpu_running); 36 37 void __init smp_prepare_boot_cpu(void) 38 { 39 init_cpu_topology(); 40 } 41 42 void __init smp_prepare_cpus(unsigned int max_cpus) 43 { 44 int cpuid; 45 46 /* This covers non-smp usecase mandated by "nosmp" option */ 47 if (max_cpus == 0) 48 return; 49 50 for_each_possible_cpu(cpuid) { 51 if (cpuid == smp_processor_id()) 52 continue; 53 set_cpu_present(cpuid, true); 54 } 55 } 56 57 void __init setup_smp(void) 58 { 59 struct device_node *dn; 60 int hart; 61 bool found_boot_cpu = false; 62 int cpuid = 1; 63 64 for_each_of_cpu_node(dn) { 65 hart = riscv_of_processor_hartid(dn); 66 if (hart < 0) 67 continue; 68 69 if (hart == cpuid_to_hartid_map(0)) { 70 BUG_ON(found_boot_cpu); 71 found_boot_cpu = 1; 72 continue; 73 } 74 if (cpuid >= NR_CPUS) { 75 pr_warn("Invalid cpuid [%d] for hartid [%d]\n", 76 cpuid, hart); 77 break; 78 } 79 80 cpuid_to_hartid_map(cpuid) = hart; 81 cpuid++; 82 } 83 84 BUG_ON(!found_boot_cpu); 85 86 if (cpuid > nr_cpu_ids) 87 pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n", 88 cpuid, nr_cpu_ids); 89 90 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 91 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) 92 set_cpu_possible(cpuid, true); 93 } 94 } 95 96 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 97 { 98 int ret = 0; 99 int hartid = cpuid_to_hartid_map(cpu); 100 tidle->thread_info.cpu = cpu; 101 102 /* 103 * On RISC-V systems, all harts boot on their own accord. Our _start 104 * selects the first hart to boot the kernel and causes the remainder 105 * of the harts to spin in a loop waiting for their stack pointer to be 106 * setup by that main hart. Writing __cpu_up_stack_pointer signals to 107 * the spinning harts that they can continue the boot process. 108 */ 109 smp_mb(); 110 WRITE_ONCE(__cpu_up_stack_pointer[hartid], 111 task_stack_page(tidle) + THREAD_SIZE); 112 WRITE_ONCE(__cpu_up_task_pointer[hartid], tidle); 113 114 lockdep_assert_held(&cpu_running); 115 wait_for_completion_timeout(&cpu_running, 116 msecs_to_jiffies(1000)); 117 118 if (!cpu_online(cpu)) { 119 pr_crit("CPU%u: failed to come online\n", cpu); 120 ret = -EIO; 121 } 122 123 return ret; 124 } 125 126 void __init smp_cpus_done(unsigned int max_cpus) 127 { 128 } 129 130 /* 131 * C entry point for a secondary processor. 132 */ 133 asmlinkage void __init smp_callin(void) 134 { 135 struct mm_struct *mm = &init_mm; 136 137 /* All kernel threads share the same mm context. */ 138 mmgrab(mm); 139 current->active_mm = mm; 140 141 trap_init(); 142 notify_cpu_starting(smp_processor_id()); 143 update_siblings_masks(smp_processor_id()); 144 set_cpu_online(smp_processor_id(), 1); 145 /* 146 * Remote TLB flushes are ignored while the CPU is offline, so emit 147 * a local TLB flush right now just in case. 148 */ 149 local_flush_tlb_all(); 150 complete(&cpu_running); 151 /* 152 * Disable preemption before enabling interrupts, so we don't try to 153 * schedule a CPU that hasn't actually started yet. 154 */ 155 preempt_disable(); 156 local_irq_enable(); 157 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 158 } 159