1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP initialisation and IPI support 4 * Based on arch/arm64/kernel/smp.c 5 * 6 * Copyright (C) 2012 ARM Ltd. 7 * Copyright (C) 2015 Regents of the University of California 8 * Copyright (C) 2017 SiFive 9 */ 10 11 #include <linux/module.h> 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/mm.h> 15 #include <linux/sched.h> 16 #include <linux/kernel_stat.h> 17 #include <linux/notifier.h> 18 #include <linux/cpu.h> 19 #include <linux/percpu.h> 20 #include <linux/delay.h> 21 #include <linux/err.h> 22 #include <linux/irq.h> 23 #include <linux/of.h> 24 #include <linux/sched/task_stack.h> 25 #include <linux/sched/mm.h> 26 #include <asm/irq.h> 27 #include <asm/mmu_context.h> 28 #include <asm/tlbflush.h> 29 #include <asm/sections.h> 30 #include <asm/sbi.h> 31 32 void *__cpu_up_stack_pointer[NR_CPUS]; 33 void *__cpu_up_task_pointer[NR_CPUS]; 34 static DECLARE_COMPLETION(cpu_running); 35 36 void __init smp_prepare_boot_cpu(void) 37 { 38 } 39 40 void __init smp_prepare_cpus(unsigned int max_cpus) 41 { 42 int cpuid; 43 44 /* This covers non-smp usecase mandated by "nosmp" option */ 45 if (max_cpus == 0) 46 return; 47 48 for_each_possible_cpu(cpuid) { 49 if (cpuid == smp_processor_id()) 50 continue; 51 set_cpu_present(cpuid, true); 52 } 53 } 54 55 void __init setup_smp(void) 56 { 57 struct device_node *dn; 58 int hart; 59 bool found_boot_cpu = false; 60 int cpuid = 1; 61 62 for_each_of_cpu_node(dn) { 63 hart = riscv_of_processor_hartid(dn); 64 if (hart < 0) 65 continue; 66 67 if (hart == cpuid_to_hartid_map(0)) { 68 BUG_ON(found_boot_cpu); 69 found_boot_cpu = 1; 70 continue; 71 } 72 if (cpuid >= NR_CPUS) { 73 pr_warn("Invalid cpuid [%d] for hartid [%d]\n", 74 cpuid, hart); 75 break; 76 } 77 78 cpuid_to_hartid_map(cpuid) = hart; 79 cpuid++; 80 } 81 82 BUG_ON(!found_boot_cpu); 83 84 if (cpuid > nr_cpu_ids) 85 pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n", 86 cpuid, nr_cpu_ids); 87 88 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 89 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) 90 set_cpu_possible(cpuid, true); 91 } 92 } 93 94 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 95 { 96 int ret = 0; 97 int hartid = cpuid_to_hartid_map(cpu); 98 tidle->thread_info.cpu = cpu; 99 100 /* 101 * On RISC-V systems, all harts boot on their own accord. Our _start 102 * selects the first hart to boot the kernel and causes the remainder 103 * of the harts to spin in a loop waiting for their stack pointer to be 104 * setup by that main hart. Writing __cpu_up_stack_pointer signals to 105 * the spinning harts that they can continue the boot process. 106 */ 107 smp_mb(); 108 WRITE_ONCE(__cpu_up_stack_pointer[hartid], 109 task_stack_page(tidle) + THREAD_SIZE); 110 WRITE_ONCE(__cpu_up_task_pointer[hartid], tidle); 111 112 lockdep_assert_held(&cpu_running); 113 wait_for_completion_timeout(&cpu_running, 114 msecs_to_jiffies(1000)); 115 116 if (!cpu_online(cpu)) { 117 pr_crit("CPU%u: failed to come online\n", cpu); 118 ret = -EIO; 119 } 120 121 return ret; 122 } 123 124 void __init smp_cpus_done(unsigned int max_cpus) 125 { 126 } 127 128 /* 129 * C entry point for a secondary processor. 130 */ 131 asmlinkage void __init smp_callin(void) 132 { 133 struct mm_struct *mm = &init_mm; 134 135 /* All kernel threads share the same mm context. */ 136 mmgrab(mm); 137 current->active_mm = mm; 138 139 trap_init(); 140 notify_cpu_starting(smp_processor_id()); 141 set_cpu_online(smp_processor_id(), 1); 142 /* 143 * Remote TLB flushes are ignored while the CPU is offline, so emit 144 * a local TLB flush right now just in case. 145 */ 146 local_flush_tlb_all(); 147 complete(&cpu_running); 148 /* 149 * Disable preemption before enabling interrupts, so we don't try to 150 * schedule a CPU that hasn't actually started yet. 151 */ 152 preempt_disable(); 153 local_irq_enable(); 154 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 155 } 156