1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP initialisation and IPI support 4 * Based on arch/arm64/kernel/smp.c 5 * 6 * Copyright (C) 2012 ARM Ltd. 7 * Copyright (C) 2015 Regents of the University of California 8 * Copyright (C) 2017 SiFive 9 */ 10 11 #include <linux/arch_topology.h> 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/kernel.h> 15 #include <linux/mm.h> 16 #include <linux/sched.h> 17 #include <linux/kernel_stat.h> 18 #include <linux/notifier.h> 19 #include <linux/cpu.h> 20 #include <linux/percpu.h> 21 #include <linux/delay.h> 22 #include <linux/err.h> 23 #include <linux/irq.h> 24 #include <linux/of.h> 25 #include <linux/sched/task_stack.h> 26 #include <linux/sched/mm.h> 27 #include <asm/clint.h> 28 #include <asm/irq.h> 29 #include <asm/mmu_context.h> 30 #include <asm/tlbflush.h> 31 #include <asm/sections.h> 32 #include <asm/sbi.h> 33 #include <asm/smp.h> 34 35 #include "head.h" 36 37 void *__cpu_up_stack_pointer[NR_CPUS]; 38 void *__cpu_up_task_pointer[NR_CPUS]; 39 static DECLARE_COMPLETION(cpu_running); 40 41 void __init smp_prepare_boot_cpu(void) 42 { 43 init_cpu_topology(); 44 } 45 46 void __init smp_prepare_cpus(unsigned int max_cpus) 47 { 48 int cpuid; 49 50 /* This covers non-smp usecase mandated by "nosmp" option */ 51 if (max_cpus == 0) 52 return; 53 54 for_each_possible_cpu(cpuid) { 55 if (cpuid == smp_processor_id()) 56 continue; 57 set_cpu_present(cpuid, true); 58 } 59 } 60 61 void __init setup_smp(void) 62 { 63 struct device_node *dn; 64 int hart; 65 bool found_boot_cpu = false; 66 int cpuid = 1; 67 68 for_each_of_cpu_node(dn) { 69 hart = riscv_of_processor_hartid(dn); 70 if (hart < 0) 71 continue; 72 73 if (hart == cpuid_to_hartid_map(0)) { 74 BUG_ON(found_boot_cpu); 75 found_boot_cpu = 1; 76 continue; 77 } 78 if (cpuid >= NR_CPUS) { 79 pr_warn("Invalid cpuid [%d] for hartid [%d]\n", 80 cpuid, hart); 81 break; 82 } 83 84 cpuid_to_hartid_map(cpuid) = hart; 85 cpuid++; 86 } 87 88 BUG_ON(!found_boot_cpu); 89 90 if (cpuid > nr_cpu_ids) 91 pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n", 92 cpuid, nr_cpu_ids); 93 94 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 95 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) 96 set_cpu_possible(cpuid, true); 97 } 98 } 99 100 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 101 { 102 int ret = 0; 103 int hartid = cpuid_to_hartid_map(cpu); 104 tidle->thread_info.cpu = cpu; 105 106 /* 107 * On RISC-V systems, all harts boot on their own accord. Our _start 108 * selects the first hart to boot the kernel and causes the remainder 109 * of the harts to spin in a loop waiting for their stack pointer to be 110 * setup by that main hart. Writing __cpu_up_stack_pointer signals to 111 * the spinning harts that they can continue the boot process. 112 */ 113 smp_mb(); 114 WRITE_ONCE(__cpu_up_stack_pointer[hartid], 115 task_stack_page(tidle) + THREAD_SIZE); 116 WRITE_ONCE(__cpu_up_task_pointer[hartid], tidle); 117 118 lockdep_assert_held(&cpu_running); 119 wait_for_completion_timeout(&cpu_running, 120 msecs_to_jiffies(1000)); 121 122 if (!cpu_online(cpu)) { 123 pr_crit("CPU%u: failed to come online\n", cpu); 124 ret = -EIO; 125 } 126 127 return ret; 128 } 129 130 void __init smp_cpus_done(unsigned int max_cpus) 131 { 132 } 133 134 /* 135 * C entry point for a secondary processor. 136 */ 137 asmlinkage __visible void __init smp_callin(void) 138 { 139 struct mm_struct *mm = &init_mm; 140 141 if (!IS_ENABLED(CONFIG_RISCV_SBI)) 142 clint_clear_ipi(cpuid_to_hartid_map(smp_processor_id())); 143 144 /* All kernel threads share the same mm context. */ 145 mmgrab(mm); 146 current->active_mm = mm; 147 148 trap_init(); 149 notify_cpu_starting(smp_processor_id()); 150 update_siblings_masks(smp_processor_id()); 151 set_cpu_online(smp_processor_id(), 1); 152 /* 153 * Remote TLB flushes are ignored while the CPU is offline, so emit 154 * a local TLB flush right now just in case. 155 */ 156 local_flush_tlb_all(); 157 complete(&cpu_running); 158 /* 159 * Disable preemption before enabling interrupts, so we don't try to 160 * schedule a CPU that hasn't actually started yet. 161 */ 162 preempt_disable(); 163 local_irq_enable(); 164 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 165 } 166