1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP initialisation and IPI support 4 * Based on arch/arm64/kernel/smp.c 5 * 6 * Copyright (C) 2012 ARM Ltd. 7 * Copyright (C) 2015 Regents of the University of California 8 * Copyright (C) 2017 SiFive 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/arch_topology.h> 13 #include <linux/module.h> 14 #include <linux/init.h> 15 #include <linux/kernel.h> 16 #include <linux/mm.h> 17 #include <linux/sched.h> 18 #include <linux/kernel_stat.h> 19 #include <linux/notifier.h> 20 #include <linux/cpu.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/err.h> 24 #include <linux/irq.h> 25 #include <linux/of.h> 26 #include <linux/sched/task_stack.h> 27 #include <linux/sched/mm.h> 28 #include <asm/cpu_ops.h> 29 #include <asm/irq.h> 30 #include <asm/mmu_context.h> 31 #include <asm/numa.h> 32 #include <asm/tlbflush.h> 33 #include <asm/sections.h> 34 #include <asm/smp.h> 35 #include <uapi/asm/hwcap.h> 36 #include <asm/vector.h> 37 38 #include "head.h" 39 40 static DECLARE_COMPLETION(cpu_running); 41 42 void __init smp_prepare_boot_cpu(void) 43 { 44 } 45 46 void __init smp_prepare_cpus(unsigned int max_cpus) 47 { 48 int cpuid; 49 int ret; 50 unsigned int curr_cpuid; 51 52 init_cpu_topology(); 53 54 curr_cpuid = smp_processor_id(); 55 store_cpu_topology(curr_cpuid); 56 numa_store_cpu_info(curr_cpuid); 57 numa_add_cpu(curr_cpuid); 58 59 /* This covers non-smp usecase mandated by "nosmp" option */ 60 if (max_cpus == 0) 61 return; 62 63 for_each_possible_cpu(cpuid) { 64 if (cpuid == curr_cpuid) 65 continue; 66 if (cpu_ops[cpuid]->cpu_prepare) { 67 ret = cpu_ops[cpuid]->cpu_prepare(cpuid); 68 if (ret) 69 continue; 70 } 71 set_cpu_present(cpuid, true); 72 numa_store_cpu_info(cpuid); 73 } 74 } 75 76 #ifdef CONFIG_ACPI 77 static unsigned int cpu_count = 1; 78 79 static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const unsigned long end) 80 { 81 unsigned long hart; 82 static bool found_boot_cpu; 83 struct acpi_madt_rintc *processor = (struct acpi_madt_rintc *)header; 84 85 /* 86 * Each RINTC structure in MADT will have a flag. If ACPI_MADT_ENABLED 87 * bit in the flag is not enabled, it means OS should not try to enable 88 * the cpu to which RINTC belongs. 89 */ 90 if (!(processor->flags & ACPI_MADT_ENABLED)) 91 return 0; 92 93 if (BAD_MADT_ENTRY(processor, end)) 94 return -EINVAL; 95 96 acpi_table_print_madt_entry(&header->common); 97 98 hart = processor->hart_id; 99 if (hart == INVALID_HARTID) { 100 pr_warn("Invalid hartid\n"); 101 return 0; 102 } 103 104 if (hart == cpuid_to_hartid_map(0)) { 105 BUG_ON(found_boot_cpu); 106 found_boot_cpu = true; 107 early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count)); 108 return 0; 109 } 110 111 if (cpu_count >= NR_CPUS) { 112 pr_warn("NR_CPUS is too small for the number of ACPI tables.\n"); 113 return 0; 114 } 115 116 cpuid_to_hartid_map(cpu_count) = hart; 117 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count)); 118 cpu_count++; 119 120 return 0; 121 } 122 123 static void __init acpi_parse_and_init_cpus(void) 124 { 125 int cpuid; 126 127 cpu_set_ops(0); 128 129 acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_rintc, 0); 130 131 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 132 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { 133 cpu_set_ops(cpuid); 134 set_cpu_possible(cpuid, true); 135 } 136 } 137 } 138 #else 139 #define acpi_parse_and_init_cpus(...) do { } while (0) 140 #endif 141 142 static void __init of_parse_and_init_cpus(void) 143 { 144 struct device_node *dn; 145 unsigned long hart; 146 bool found_boot_cpu = false; 147 int cpuid = 1; 148 int rc; 149 150 cpu_set_ops(0); 151 152 for_each_of_cpu_node(dn) { 153 rc = riscv_early_of_processor_hartid(dn, &hart); 154 if (rc < 0) 155 continue; 156 157 if (hart == cpuid_to_hartid_map(0)) { 158 BUG_ON(found_boot_cpu); 159 found_boot_cpu = 1; 160 early_map_cpu_to_node(0, of_node_to_nid(dn)); 161 continue; 162 } 163 if (cpuid >= NR_CPUS) { 164 pr_warn("Invalid cpuid [%d] for hartid [%lu]\n", 165 cpuid, hart); 166 continue; 167 } 168 169 cpuid_to_hartid_map(cpuid) = hart; 170 early_map_cpu_to_node(cpuid, of_node_to_nid(dn)); 171 cpuid++; 172 } 173 174 BUG_ON(!found_boot_cpu); 175 176 if (cpuid > nr_cpu_ids) 177 pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n", 178 cpuid, nr_cpu_ids); 179 180 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 181 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { 182 cpu_set_ops(cpuid); 183 set_cpu_possible(cpuid, true); 184 } 185 } 186 } 187 188 void __init setup_smp(void) 189 { 190 if (acpi_disabled) 191 of_parse_and_init_cpus(); 192 else 193 acpi_parse_and_init_cpus(); 194 } 195 196 static int start_secondary_cpu(int cpu, struct task_struct *tidle) 197 { 198 if (cpu_ops[cpu]->cpu_start) 199 return cpu_ops[cpu]->cpu_start(cpu, tidle); 200 201 return -EOPNOTSUPP; 202 } 203 204 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 205 { 206 int ret = 0; 207 tidle->thread_info.cpu = cpu; 208 209 ret = start_secondary_cpu(cpu, tidle); 210 if (!ret) { 211 wait_for_completion_timeout(&cpu_running, 212 msecs_to_jiffies(1000)); 213 214 if (!cpu_online(cpu)) { 215 pr_crit("CPU%u: failed to come online\n", cpu); 216 ret = -EIO; 217 } 218 } else { 219 pr_crit("CPU%u: failed to start\n", cpu); 220 } 221 222 return ret; 223 } 224 225 void __init smp_cpus_done(unsigned int max_cpus) 226 { 227 } 228 229 /* 230 * C entry point for a secondary processor. 231 */ 232 asmlinkage __visible void smp_callin(void) 233 { 234 struct mm_struct *mm = &init_mm; 235 unsigned int curr_cpuid = smp_processor_id(); 236 237 /* All kernel threads share the same mm context. */ 238 mmgrab(mm); 239 current->active_mm = mm; 240 241 store_cpu_topology(curr_cpuid); 242 notify_cpu_starting(curr_cpuid); 243 244 riscv_ipi_enable(); 245 246 numa_add_cpu(curr_cpuid); 247 set_cpu_online(curr_cpuid, 1); 248 probe_vendor_features(curr_cpuid); 249 250 if (has_vector()) { 251 if (riscv_v_setup_vsize()) 252 elf_hwcap &= ~COMPAT_HWCAP_ISA_V; 253 } 254 255 /* 256 * Remote TLB flushes are ignored while the CPU is offline, so emit 257 * a local TLB flush right now just in case. 258 */ 259 local_flush_tlb_all(); 260 complete(&cpu_running); 261 /* 262 * Disable preemption before enabling interrupts, so we don't try to 263 * schedule a CPU that hasn't actually started yet. 264 */ 265 local_irq_enable(); 266 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 267 } 268