1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP initialisation and IPI support 4 * Based on arch/arm64/kernel/smp.c 5 * 6 * Copyright (C) 2012 ARM Ltd. 7 * Copyright (C) 2015 Regents of the University of California 8 * Copyright (C) 2017 SiFive 9 */ 10 11 #include <linux/cpu.h> 12 #include <linux/interrupt.h> 13 #include <linux/profile.h> 14 #include <linux/smp.h> 15 #include <linux/sched.h> 16 #include <linux/seq_file.h> 17 #include <linux/delay.h> 18 19 #include <asm/clint.h> 20 #include <asm/sbi.h> 21 #include <asm/tlbflush.h> 22 #include <asm/cacheflush.h> 23 24 enum ipi_message_type { 25 IPI_RESCHEDULE, 26 IPI_CALL_FUNC, 27 IPI_CPU_STOP, 28 IPI_MAX 29 }; 30 31 unsigned long __cpuid_to_hartid_map[NR_CPUS] = { 32 [0 ... NR_CPUS-1] = INVALID_HARTID 33 }; 34 35 void __init smp_setup_processor_id(void) 36 { 37 cpuid_to_hartid_map(0) = boot_cpu_hartid; 38 } 39 40 /* A collection of single bit ipi messages. */ 41 static struct { 42 unsigned long stats[IPI_MAX] ____cacheline_aligned; 43 unsigned long bits ____cacheline_aligned; 44 } ipi_data[NR_CPUS] __cacheline_aligned; 45 46 int riscv_hartid_to_cpuid(int hartid) 47 { 48 int i; 49 50 for (i = 0; i < NR_CPUS; i++) 51 if (cpuid_to_hartid_map(i) == hartid) 52 return i; 53 54 pr_err("Couldn't find cpu id for hartid [%d]\n", hartid); 55 return i; 56 } 57 58 void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) 59 { 60 int cpu; 61 62 cpumask_clear(out); 63 for_each_cpu(cpu, in) 64 cpumask_set_cpu(cpuid_to_hartid_map(cpu), out); 65 } 66 67 bool arch_match_cpu_phys_id(int cpu, u64 phys_id) 68 { 69 return phys_id == cpuid_to_hartid_map(cpu); 70 } 71 72 /* Unsupported */ 73 int setup_profiling_timer(unsigned int multiplier) 74 { 75 return -EINVAL; 76 } 77 78 static void ipi_stop(void) 79 { 80 set_cpu_online(smp_processor_id(), false); 81 while (1) 82 wait_for_interrupt(); 83 } 84 85 static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op) 86 { 87 struct cpumask hartid_mask; 88 int cpu; 89 90 smp_mb__before_atomic(); 91 for_each_cpu(cpu, mask) 92 set_bit(op, &ipi_data[cpu].bits); 93 smp_mb__after_atomic(); 94 95 riscv_cpuid_to_hartid_mask(mask, &hartid_mask); 96 if (IS_ENABLED(CONFIG_RISCV_SBI)) 97 sbi_send_ipi(cpumask_bits(&hartid_mask)); 98 else 99 clint_send_ipi_mask(&hartid_mask); 100 } 101 102 static void send_ipi_single(int cpu, enum ipi_message_type op) 103 { 104 int hartid = cpuid_to_hartid_map(cpu); 105 106 smp_mb__before_atomic(); 107 set_bit(op, &ipi_data[cpu].bits); 108 smp_mb__after_atomic(); 109 110 if (IS_ENABLED(CONFIG_RISCV_SBI)) 111 sbi_send_ipi(cpumask_bits(cpumask_of(hartid))); 112 else 113 clint_send_ipi_single(hartid); 114 } 115 116 static inline void clear_ipi(void) 117 { 118 if (IS_ENABLED(CONFIG_RISCV_SBI)) 119 csr_clear(CSR_IP, IE_SIE); 120 else 121 clint_clear_ipi(cpuid_to_hartid_map(smp_processor_id())); 122 } 123 124 void riscv_software_interrupt(void) 125 { 126 unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits; 127 unsigned long *stats = ipi_data[smp_processor_id()].stats; 128 129 clear_ipi(); 130 131 while (true) { 132 unsigned long ops; 133 134 /* Order bit clearing and data access. */ 135 mb(); 136 137 ops = xchg(pending_ipis, 0); 138 if (ops == 0) 139 return; 140 141 if (ops & (1 << IPI_RESCHEDULE)) { 142 stats[IPI_RESCHEDULE]++; 143 scheduler_ipi(); 144 } 145 146 if (ops & (1 << IPI_CALL_FUNC)) { 147 stats[IPI_CALL_FUNC]++; 148 generic_smp_call_function_interrupt(); 149 } 150 151 if (ops & (1 << IPI_CPU_STOP)) { 152 stats[IPI_CPU_STOP]++; 153 ipi_stop(); 154 } 155 156 BUG_ON((ops >> IPI_MAX) != 0); 157 158 /* Order data access and bit testing. */ 159 mb(); 160 } 161 } 162 163 static const char * const ipi_names[] = { 164 [IPI_RESCHEDULE] = "Rescheduling interrupts", 165 [IPI_CALL_FUNC] = "Function call interrupts", 166 [IPI_CPU_STOP] = "CPU stop interrupts", 167 }; 168 169 void show_ipi_stats(struct seq_file *p, int prec) 170 { 171 unsigned int cpu, i; 172 173 for (i = 0; i < IPI_MAX; i++) { 174 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, 175 prec >= 4 ? " " : ""); 176 for_each_online_cpu(cpu) 177 seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]); 178 seq_printf(p, " %s\n", ipi_names[i]); 179 } 180 } 181 182 void arch_send_call_function_ipi_mask(struct cpumask *mask) 183 { 184 send_ipi_mask(mask, IPI_CALL_FUNC); 185 } 186 187 void arch_send_call_function_single_ipi(int cpu) 188 { 189 send_ipi_single(cpu, IPI_CALL_FUNC); 190 } 191 192 void smp_send_stop(void) 193 { 194 unsigned long timeout; 195 196 if (num_online_cpus() > 1) { 197 cpumask_t mask; 198 199 cpumask_copy(&mask, cpu_online_mask); 200 cpumask_clear_cpu(smp_processor_id(), &mask); 201 202 if (system_state <= SYSTEM_RUNNING) 203 pr_crit("SMP: stopping secondary CPUs\n"); 204 send_ipi_mask(&mask, IPI_CPU_STOP); 205 } 206 207 /* Wait up to one second for other CPUs to stop */ 208 timeout = USEC_PER_SEC; 209 while (num_online_cpus() > 1 && timeout--) 210 udelay(1); 211 212 if (num_online_cpus() > 1) 213 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n", 214 cpumask_pr_args(cpu_online_mask)); 215 } 216 217 void smp_send_reschedule(int cpu) 218 { 219 send_ipi_single(cpu, IPI_RESCHEDULE); 220 } 221 EXPORT_SYMBOL_GPL(smp_send_reschedule); 222