1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP initialisation and IPI support 4 * Based on arch/arm64/kernel/smp.c 5 * 6 * Copyright (C) 2012 ARM Ltd. 7 * Copyright (C) 2015 Regents of the University of California 8 * Copyright (C) 2017 SiFive 9 */ 10 11 #include <linux/cpu.h> 12 #include <linux/interrupt.h> 13 #include <linux/module.h> 14 #include <linux/profile.h> 15 #include <linux/smp.h> 16 #include <linux/sched.h> 17 #include <linux/seq_file.h> 18 #include <linux/delay.h> 19 #include <linux/irq_work.h> 20 21 #include <asm/clint.h> 22 #include <asm/sbi.h> 23 #include <asm/tlbflush.h> 24 #include <asm/cacheflush.h> 25 26 enum ipi_message_type { 27 IPI_RESCHEDULE, 28 IPI_CALL_FUNC, 29 IPI_CPU_STOP, 30 IPI_IRQ_WORK, 31 IPI_MAX 32 }; 33 34 unsigned long __cpuid_to_hartid_map[NR_CPUS] = { 35 [0 ... NR_CPUS-1] = INVALID_HARTID 36 }; 37 38 void __init smp_setup_processor_id(void) 39 { 40 cpuid_to_hartid_map(0) = boot_cpu_hartid; 41 } 42 43 /* A collection of single bit ipi messages. */ 44 static struct { 45 unsigned long stats[IPI_MAX] ____cacheline_aligned; 46 unsigned long bits ____cacheline_aligned; 47 } ipi_data[NR_CPUS] __cacheline_aligned; 48 49 int riscv_hartid_to_cpuid(int hartid) 50 { 51 int i; 52 53 for (i = 0; i < NR_CPUS; i++) 54 if (cpuid_to_hartid_map(i) == hartid) 55 return i; 56 57 pr_err("Couldn't find cpu id for hartid [%d]\n", hartid); 58 return i; 59 } 60 61 void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) 62 { 63 int cpu; 64 65 cpumask_clear(out); 66 for_each_cpu(cpu, in) 67 cpumask_set_cpu(cpuid_to_hartid_map(cpu), out); 68 } 69 EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask); 70 71 bool arch_match_cpu_phys_id(int cpu, u64 phys_id) 72 { 73 return phys_id == cpuid_to_hartid_map(cpu); 74 } 75 76 /* Unsupported */ 77 int setup_profiling_timer(unsigned int multiplier) 78 { 79 return -EINVAL; 80 } 81 82 static void ipi_stop(void) 83 { 84 set_cpu_online(smp_processor_id(), false); 85 while (1) 86 wait_for_interrupt(); 87 } 88 89 static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op) 90 { 91 struct cpumask hartid_mask; 92 int cpu; 93 94 smp_mb__before_atomic(); 95 for_each_cpu(cpu, mask) 96 set_bit(op, &ipi_data[cpu].bits); 97 smp_mb__after_atomic(); 98 99 riscv_cpuid_to_hartid_mask(mask, &hartid_mask); 100 if (IS_ENABLED(CONFIG_RISCV_SBI)) 101 sbi_send_ipi(cpumask_bits(&hartid_mask)); 102 else 103 clint_send_ipi_mask(mask); 104 } 105 106 static void send_ipi_single(int cpu, enum ipi_message_type op) 107 { 108 int hartid = cpuid_to_hartid_map(cpu); 109 110 smp_mb__before_atomic(); 111 set_bit(op, &ipi_data[cpu].bits); 112 smp_mb__after_atomic(); 113 114 if (IS_ENABLED(CONFIG_RISCV_SBI)) 115 sbi_send_ipi(cpumask_bits(cpumask_of(hartid))); 116 else 117 clint_send_ipi_single(hartid); 118 } 119 120 static inline void clear_ipi(void) 121 { 122 if (IS_ENABLED(CONFIG_RISCV_SBI)) 123 csr_clear(CSR_IP, IE_SIE); 124 else 125 clint_clear_ipi(cpuid_to_hartid_map(smp_processor_id())); 126 } 127 128 #ifdef CONFIG_IRQ_WORK 129 void arch_irq_work_raise(void) 130 { 131 send_ipi_single(smp_processor_id(), IPI_IRQ_WORK); 132 } 133 #endif 134 135 void handle_IPI(struct pt_regs *regs) 136 { 137 struct pt_regs *old_regs = set_irq_regs(regs); 138 unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits; 139 unsigned long *stats = ipi_data[smp_processor_id()].stats; 140 141 irq_enter(); 142 143 clear_ipi(); 144 145 while (true) { 146 unsigned long ops; 147 148 /* Order bit clearing and data access. */ 149 mb(); 150 151 ops = xchg(pending_ipis, 0); 152 if (ops == 0) 153 goto done; 154 155 if (ops & (1 << IPI_RESCHEDULE)) { 156 stats[IPI_RESCHEDULE]++; 157 scheduler_ipi(); 158 } 159 160 if (ops & (1 << IPI_CALL_FUNC)) { 161 stats[IPI_CALL_FUNC]++; 162 generic_smp_call_function_interrupt(); 163 } 164 165 if (ops & (1 << IPI_CPU_STOP)) { 166 stats[IPI_CPU_STOP]++; 167 ipi_stop(); 168 } 169 170 if (ops & (1 << IPI_IRQ_WORK)) { 171 stats[IPI_IRQ_WORK]++; 172 irq_work_run(); 173 } 174 175 BUG_ON((ops >> IPI_MAX) != 0); 176 177 /* Order data access and bit testing. */ 178 mb(); 179 } 180 181 done: 182 irq_exit(); 183 set_irq_regs(old_regs); 184 } 185 186 static const char * const ipi_names[] = { 187 [IPI_RESCHEDULE] = "Rescheduling interrupts", 188 [IPI_CALL_FUNC] = "Function call interrupts", 189 [IPI_CPU_STOP] = "CPU stop interrupts", 190 [IPI_IRQ_WORK] = "IRQ work interrupts", 191 }; 192 193 void show_ipi_stats(struct seq_file *p, int prec) 194 { 195 unsigned int cpu, i; 196 197 for (i = 0; i < IPI_MAX; i++) { 198 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, 199 prec >= 4 ? " " : ""); 200 for_each_online_cpu(cpu) 201 seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]); 202 seq_printf(p, " %s\n", ipi_names[i]); 203 } 204 } 205 206 void arch_send_call_function_ipi_mask(struct cpumask *mask) 207 { 208 send_ipi_mask(mask, IPI_CALL_FUNC); 209 } 210 211 void arch_send_call_function_single_ipi(int cpu) 212 { 213 send_ipi_single(cpu, IPI_CALL_FUNC); 214 } 215 216 void smp_send_stop(void) 217 { 218 unsigned long timeout; 219 220 if (num_online_cpus() > 1) { 221 cpumask_t mask; 222 223 cpumask_copy(&mask, cpu_online_mask); 224 cpumask_clear_cpu(smp_processor_id(), &mask); 225 226 if (system_state <= SYSTEM_RUNNING) 227 pr_crit("SMP: stopping secondary CPUs\n"); 228 send_ipi_mask(&mask, IPI_CPU_STOP); 229 } 230 231 /* Wait up to one second for other CPUs to stop */ 232 timeout = USEC_PER_SEC; 233 while (num_online_cpus() > 1 && timeout--) 234 udelay(1); 235 236 if (num_online_cpus() > 1) 237 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n", 238 cpumask_pr_args(cpu_online_mask)); 239 } 240 241 void smp_send_reschedule(int cpu) 242 { 243 send_ipi_single(cpu, IPI_RESCHEDULE); 244 } 245 EXPORT_SYMBOL_GPL(smp_send_reschedule); 246