xref: /openbmc/linux/arch/riscv/kernel/irq.c (revision 04a7279f)
1 /*
2  * Copyright (C) 2012 Regents of the University of California
3  * Copyright (C) 2017 SiFive
4  *
5  *   This program is free software; you can redistribute it and/or
6  *   modify it under the terms of the GNU General Public License
7  *   as published by the Free Software Foundation, version 2.
8  *
9  *   This program is distributed in the hope that it will be useful,
10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  *   GNU General Public License for more details.
13  */
14 
15 #include <linux/interrupt.h>
16 #include <linux/irqchip.h>
17 #include <linux/irqdomain.h>
18 
19 #ifdef CONFIG_RISCV_INTC
20 #include <linux/irqchip/irq-riscv-intc.h>
21 #endif
22 
23 void __init init_IRQ(void)
24 {
25 	irqchip_init();
26 }
27 
28 asmlinkage void __irq_entry do_IRQ(unsigned int cause, struct pt_regs *regs)
29 {
30 #ifdef CONFIG_RISCV_INTC
31 	/*
32 	 * FIXME: We don't want a direct call to riscv_intc_irq here.  The plan
33 	 * is to put an IRQ domain here and let the interrupt controller
34 	 * register with that, but I poked around the arm64 code a bit and
35 	 * there might be a better way to do it (ie, something fully generic).
36 	 */
37 	riscv_intc_irq(cause, regs);
38 #endif
39 }
40