xref: /openbmc/linux/arch/riscv/kernel/cpu_ops.c (revision cfafe260)
12875fe05SAtish Patra // SPDX-License-Identifier: GPL-2.0-only
22875fe05SAtish Patra /*
32875fe05SAtish Patra  * Copyright (c) 2020 Western Digital Corporation or its affiliates.
42875fe05SAtish Patra  */
52875fe05SAtish Patra 
62875fe05SAtish Patra #include <linux/errno.h>
72875fe05SAtish Patra #include <linux/mm.h>
82875fe05SAtish Patra #include <linux/of.h>
92875fe05SAtish Patra #include <linux/string.h>
102875fe05SAtish Patra #include <linux/sched.h>
112875fe05SAtish Patra #include <linux/sched/task_stack.h>
122875fe05SAtish Patra #include <asm/cpu_ops.h>
132875fe05SAtish Patra #include <asm/sbi.h>
142875fe05SAtish Patra #include <asm/smp.h>
152875fe05SAtish Patra 
162875fe05SAtish Patra const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
172875fe05SAtish Patra 
182875fe05SAtish Patra void *__cpu_up_stack_pointer[NR_CPUS];
192875fe05SAtish Patra void *__cpu_up_task_pointer[NR_CPUS];
202875fe05SAtish Patra 
21cfafe260SAtish Patra extern const struct cpu_operations cpu_ops_sbi;
222875fe05SAtish Patra extern const struct cpu_operations cpu_ops_spinwait;
232875fe05SAtish Patra 
242875fe05SAtish Patra void cpu_update_secondary_bootdata(unsigned int cpuid,
252875fe05SAtish Patra 				   struct task_struct *tidle)
262875fe05SAtish Patra {
272875fe05SAtish Patra 	int hartid = cpuid_to_hartid_map(cpuid);
282875fe05SAtish Patra 
292875fe05SAtish Patra 	/* Make sure tidle is updated */
302875fe05SAtish Patra 	smp_mb();
312875fe05SAtish Patra 	WRITE_ONCE(__cpu_up_stack_pointer[hartid],
322875fe05SAtish Patra 		   task_stack_page(tidle) + THREAD_SIZE);
332875fe05SAtish Patra 	WRITE_ONCE(__cpu_up_task_pointer[hartid], tidle);
342875fe05SAtish Patra }
352875fe05SAtish Patra 
362875fe05SAtish Patra void __init cpu_set_ops(int cpuid)
372875fe05SAtish Patra {
38cfafe260SAtish Patra #if IS_ENABLED(CONFIG_RISCV_SBI)
39cfafe260SAtish Patra 	if (sbi_probe_extension(SBI_EXT_HSM) > 0) {
40cfafe260SAtish Patra 		if (!cpuid)
41cfafe260SAtish Patra 			pr_info("SBI v0.2 HSM extension detected\n");
42cfafe260SAtish Patra 		cpu_ops[cpuid] = &cpu_ops_sbi;
43cfafe260SAtish Patra 	} else
44cfafe260SAtish Patra #endif
452875fe05SAtish Patra 		cpu_ops[cpuid] = &cpu_ops_spinwait;
462875fe05SAtish Patra }
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